xref: /openbmc/u-boot/include/configs/M5272C3.h (revision 657fd2d0)
1 /*
2  * Configuation settings for the Motorola MC5272C3 board.
3  *
4  * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 /*
10  * board/config.h - configuration options, board specific
11  */
12 
13 #ifndef _M5272C3_H
14 #define _M5272C3_H
15 
16 /*
17  * High Level Configuration Options
18  * (easy to change)
19  */
20 #define CONFIG_MCFTMR
21 
22 #define CONFIG_MCFUART
23 #define CONFIG_SYS_UART_PORT		(0)
24 #define CONFIG_BAUDRATE		115200
25 
26 #undef CONFIG_WATCHDOG
27 #define CONFIG_WATCHDOG_TIMEOUT 10000	/* timeout in milliseconds */
28 
29 #undef CONFIG_MONITOR_IS_IN_RAM	/* define if monitor is started from a pre-loader */
30 
31 /* Configuration for environment
32  * Environment is embedded in u-boot in the second sector of the flash
33  */
34 #ifndef CONFIG_MONITOR_IS_IN_RAM
35 #define CONFIG_ENV_OFFSET		0x4000
36 #define CONFIG_ENV_SECT_SIZE	0x2000
37 #define CONFIG_ENV_IS_IN_FLASH	1
38 #else
39 #define CONFIG_ENV_ADDR		0xffe04000
40 #define CONFIG_ENV_SECT_SIZE	0x2000
41 #define CONFIG_ENV_IS_IN_FLASH	1
42 #endif
43 
44 #define LDS_BOARD_TEXT \
45         . = DEFINED(env_offset) ? env_offset : .; \
46         common/env_embedded.o (.text);
47 
48 /*
49  * BOOTP options
50  */
51 #define CONFIG_BOOTP_BOOTFILESIZE
52 #define CONFIG_BOOTP_BOOTPATH
53 #define CONFIG_BOOTP_GATEWAY
54 #define CONFIG_BOOTP_HOSTNAME
55 
56 /*
57  * Command line configuration.
58  */
59 #include <config_cmd_default.h>
60 
61 #define CONFIG_CMD_CACHE
62 #define CONFIG_CMD_MII
63 #define CONFIG_CMD_NET
64 #define CONFIG_CMD_PING
65 #define CONFIG_CMD_MISC
66 #define CONFIG_CMD_ELF
67 #define CONFIG_CMD_FLASH
68 #define CONFIG_CMD_MEMORY
69 
70 #undef CONFIG_CMD_LOADS
71 #undef CONFIG_CMD_LOADB
72 
73 #define CONFIG_BOOTDELAY	5
74 #define CONFIG_MCFFEC
75 #ifdef CONFIG_MCFFEC
76 #	define CONFIG_MII		1
77 #	define CONFIG_MII_INIT		1
78 #	define CONFIG_SYS_DISCOVER_PHY
79 #	define CONFIG_SYS_RX_ETH_BUFFER	8
80 #	define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
81 
82 #	define CONFIG_SYS_FEC0_PINMUX		0
83 #	define CONFIG_SYS_FEC0_MIIBASE		CONFIG_SYS_FEC0_IOBASE
84 #	define MCFFEC_TOUT_LOOP		50000
85 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
86 #	ifndef CONFIG_SYS_DISCOVER_PHY
87 #		define FECDUPLEX	FULL
88 #		define FECSPEED		_100BASET
89 #	else
90 #		ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
91 #			define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
92 #		endif
93 #	endif			/* CONFIG_SYS_DISCOVER_PHY */
94 #endif
95 
96 #ifdef CONFIG_MCFFEC
97 #	define CONFIG_IPADDR	192.162.1.2
98 #	define CONFIG_NETMASK	255.255.255.0
99 #	define CONFIG_SERVERIP	192.162.1.1
100 #	define CONFIG_GATEWAYIP	192.162.1.1
101 #endif				/* CONFIG_MCFFEC */
102 
103 #define CONFIG_HOSTNAME		M5272C3
104 #define CONFIG_EXTRA_ENV_SETTINGS		\
105 	"netdev=eth0\0"				\
106 	"loadaddr=10000\0"			\
107 	"u-boot=u-boot.bin\0"			\
108 	"load=tftp ${loadaddr) ${u-boot}\0"	\
109 	"upd=run load; run prog\0"		\
110 	"prog=prot off ffe00000 ffe3ffff;"	\
111 	"era ffe00000 ffe3ffff;"		\
112 	"cp.b ${loadaddr} ffe00000 ${filesize};"\
113 	"save\0"				\
114 	""
115 
116 #define CONFIG_SYS_PROMPT		"-> "
117 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
118 
119 #if defined(CONFIG_CMD_KGDB)
120 #define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size      */
121 #else
122 #define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size      */
123 #endif
124 
125 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)	/* Print Buffer Size */
126 #define CONFIG_SYS_MAXARGS		16	/* max number of command args   */
127 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size    */
128 #define CONFIG_SYS_LOAD_ADDR		0x20000
129 #define CONFIG_SYS_MEMTEST_START	0x400
130 #define CONFIG_SYS_MEMTEST_END		0x380000
131 #define CONFIG_SYS_CLK			66000000
132 
133 /*
134  * Low Level Configuration Settings
135  * (address mappings, register initial values, etc.)
136  * You should know what you are doing if you make changes here.
137  */
138 #define CONFIG_SYS_MBAR		0x10000000	/* Register Base Addrs */
139 #define CONFIG_SYS_SCR			0x0003
140 #define CONFIG_SYS_SPR			0xffff
141 
142 /*-----------------------------------------------------------------------
143  * Definitions for initial stack pointer and data area (in DPRAM)
144  */
145 #define CONFIG_SYS_INIT_RAM_ADDR	0x20000000
146 #define CONFIG_SYS_INIT_RAM_SIZE	0x1000	/* Size of used area in internal SRAM    */
147 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
148 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
149 
150 /*-----------------------------------------------------------------------
151  * Start addresses for the final memory configuration
152  * (Set up by the startup code)
153  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
154  */
155 #define CONFIG_SYS_SDRAM_BASE		0x00000000
156 #define CONFIG_SYS_SDRAM_SIZE		4	/* SDRAM size in MB */
157 #define CONFIG_SYS_FLASH_BASE		0xffe00000
158 
159 #ifdef	CONFIG_MONITOR_IS_IN_RAM
160 #define CONFIG_SYS_MONITOR_BASE	0x20000
161 #else
162 #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE + 0x400)
163 #endif
164 
165 #define CONFIG_SYS_MONITOR_LEN		0x20000
166 #define CONFIG_SYS_MALLOC_LEN		(256 << 10)
167 #define CONFIG_SYS_BOOTPARAMS_LEN	64*1024
168 
169 /*
170  * For booting Linux, the board info and command line data
171  * have to be in the first 8 MB of memory, since this is
172  * the maximum mapped by the Linux kernel during initialization ??
173  */
174 #define CONFIG_SYS_BOOTMAPSZ		(CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
175 
176 /*
177  * FLASH organization
178  */
179 #define CONFIG_SYS_FLASH_CFI
180 #ifdef CONFIG_SYS_FLASH_CFI
181 #	define CONFIG_FLASH_CFI_DRIVER	1
182 #	define CONFIG_SYS_FLASH_SIZE		0x800000	/* Max size that the board might have */
183 #	define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
184 #	define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks */
185 #	define CONFIG_SYS_MAX_FLASH_SECT	137	/* max number of sectors on one chip */
186 #	define CONFIG_SYS_FLASH_PROTECTION	/* "Real" (hardware) sectors protection */
187 #endif
188 
189 /*-----------------------------------------------------------------------
190  * Cache Configuration
191  */
192 #define CONFIG_SYS_CACHELINE_SIZE	16
193 
194 #define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
195 					 CONFIG_SYS_INIT_RAM_SIZE - 8)
196 #define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
197 					 CONFIG_SYS_INIT_RAM_SIZE - 4)
198 #define CONFIG_SYS_ICACHE_INV		(CF_CACR_CINV | CF_CACR_INVI)
199 #define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_SDRAM_BASE | \
200 					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
201 					 CF_ACR_EN | CF_ACR_SM_ALL)
202 #define CONFIG_SYS_CACHE_ICACR		(CF_CACR_CENB | CF_CACR_CINV | \
203 					 CF_CACR_DISD | CF_CACR_INVI | \
204 					 CF_CACR_CEIB | CF_CACR_DCM | \
205 					 CF_CACR_EUSP)
206 
207 /*-----------------------------------------------------------------------
208  * Memory bank definitions
209  */
210 #define CONFIG_SYS_BR0_PRELIM		0xFFE00201
211 #define CONFIG_SYS_OR0_PRELIM		0xFFE00014
212 #define CONFIG_SYS_BR1_PRELIM		0
213 #define CONFIG_SYS_OR1_PRELIM		0
214 #define CONFIG_SYS_BR2_PRELIM		0x30000001
215 #define CONFIG_SYS_OR2_PRELIM		0xFFF80000
216 #define CONFIG_SYS_BR3_PRELIM		0
217 #define CONFIG_SYS_OR3_PRELIM		0
218 #define CONFIG_SYS_BR4_PRELIM		0
219 #define CONFIG_SYS_OR4_PRELIM		0
220 #define CONFIG_SYS_BR5_PRELIM		0
221 #define CONFIG_SYS_OR5_PRELIM		0
222 #define CONFIG_SYS_BR6_PRELIM		0
223 #define CONFIG_SYS_OR6_PRELIM		0
224 #define CONFIG_SYS_BR7_PRELIM		0x00000701
225 #define CONFIG_SYS_OR7_PRELIM		0xFFC0007C
226 
227 /*-----------------------------------------------------------------------
228  * Port configuration
229  */
230 #define CONFIG_SYS_PACNT		0x00000000
231 #define CONFIG_SYS_PADDR		0x0000
232 #define CONFIG_SYS_PADAT		0x0000
233 #define CONFIG_SYS_PBCNT		0x55554155	/* Ethernet/UART configuration */
234 #define CONFIG_SYS_PBDDR		0x0000
235 #define CONFIG_SYS_PBDAT		0x0000
236 #define CONFIG_SYS_PDCNT		0x00000000
237 #endif				/* _M5272C3_H */
238