1 /* 2 * Configuation settings for the Motorola MC5272C3 board. 3 * 4 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 */ 24 25 /* 26 * board/config.h - configuration options, board specific 27 */ 28 29 #ifndef _M5272C3_H 30 #define _M5272C3_H 31 32 /* 33 * High Level Configuration Options 34 * (easy to change) 35 */ 36 #define CONFIG_MCF52x2 /* define processor family */ 37 #define CONFIG_M5272 /* define processor type */ 38 39 #define CONFIG_MCFTMR 40 41 #define CONFIG_MCFUART 42 #define CONFIG_SYS_UART_PORT (0) 43 #define CONFIG_BAUDRATE 115200 44 45 #undef CONFIG_WATCHDOG 46 #define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */ 47 48 #undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */ 49 50 /* Configuration for environment 51 * Environment is embedded in u-boot in the second sector of the flash 52 */ 53 #ifndef CONFIG_MONITOR_IS_IN_RAM 54 #define CONFIG_ENV_OFFSET 0x4000 55 #define CONFIG_ENV_SECT_SIZE 0x2000 56 #define CONFIG_ENV_IS_IN_FLASH 1 57 #else 58 #define CONFIG_ENV_ADDR 0xffe04000 59 #define CONFIG_ENV_SECT_SIZE 0x2000 60 #define CONFIG_ENV_IS_IN_FLASH 1 61 #endif 62 63 /* 64 * BOOTP options 65 */ 66 #define CONFIG_BOOTP_BOOTFILESIZE 67 #define CONFIG_BOOTP_BOOTPATH 68 #define CONFIG_BOOTP_GATEWAY 69 #define CONFIG_BOOTP_HOSTNAME 70 71 /* 72 * Command line configuration. 73 */ 74 #include <config_cmd_default.h> 75 76 #define CONFIG_CMD_CACHE 77 #define CONFIG_CMD_MII 78 #define CONFIG_CMD_NET 79 #define CONFIG_CMD_PING 80 #define CONFIG_CMD_MISC 81 #define CONFIG_CMD_ELF 82 #define CONFIG_CMD_FLASH 83 #define CONFIG_CMD_MEMORY 84 85 #undef CONFIG_CMD_LOADS 86 #undef CONFIG_CMD_LOADB 87 88 #define CONFIG_BOOTDELAY 5 89 #define CONFIG_MCFFEC 90 #ifdef CONFIG_MCFFEC 91 # define CONFIG_MII 1 92 # define CONFIG_MII_INIT 1 93 # define CONFIG_SYS_DISCOVER_PHY 94 # define CONFIG_SYS_RX_ETH_BUFFER 8 95 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 96 97 # define CONFIG_SYS_FEC0_PINMUX 0 98 # define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE 99 # define MCFFEC_TOUT_LOOP 50000 100 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ 101 # ifndef CONFIG_SYS_DISCOVER_PHY 102 # define FECDUPLEX FULL 103 # define FECSPEED _100BASET 104 # else 105 # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN 106 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 107 # endif 108 # endif /* CONFIG_SYS_DISCOVER_PHY */ 109 #endif 110 111 #ifdef CONFIG_MCFFEC 112 # define CONFIG_ETHADDR 00:e0:0c:bc:e5:60 113 # define CONFIG_IPADDR 192.162.1.2 114 # define CONFIG_NETMASK 255.255.255.0 115 # define CONFIG_SERVERIP 192.162.1.1 116 # define CONFIG_GATEWAYIP 192.162.1.1 117 # define CONFIG_OVERWRITE_ETHADDR_ONCE 118 #endif /* CONFIG_MCFFEC */ 119 120 #define CONFIG_HOSTNAME M5272C3 121 #define CONFIG_EXTRA_ENV_SETTINGS \ 122 "netdev=eth0\0" \ 123 "loadaddr=10000\0" \ 124 "u-boot=u-boot.bin\0" \ 125 "load=tftp ${loadaddr) ${u-boot}\0" \ 126 "upd=run load; run prog\0" \ 127 "prog=prot off ffe00000 ffe3ffff;" \ 128 "era ffe00000 ffe3ffff;" \ 129 "cp.b ${loadaddr} ffe00000 ${filesize};"\ 130 "save\0" \ 131 "" 132 133 #define CONFIG_SYS_PROMPT "-> " 134 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 135 136 #if defined(CONFIG_CMD_KGDB) 137 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 138 #else 139 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 140 #endif 141 142 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 143 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 144 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 145 #define CONFIG_SYS_LOAD_ADDR 0x20000 146 #define CONFIG_SYS_MEMTEST_START 0x400 147 #define CONFIG_SYS_MEMTEST_END 0x380000 148 #define CONFIG_SYS_HZ 1000 149 #define CONFIG_SYS_CLK 66000000 150 151 /* 152 * Low Level Configuration Settings 153 * (address mappings, register initial values, etc.) 154 * You should know what you are doing if you make changes here. 155 */ 156 #define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */ 157 #define CONFIG_SYS_SCR 0x0003 158 #define CONFIG_SYS_SPR 0xffff 159 160 /*----------------------------------------------------------------------- 161 * Definitions for initial stack pointer and data area (in DPRAM) 162 */ 163 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 164 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */ 165 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 166 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 167 168 /*----------------------------------------------------------------------- 169 * Start addresses for the final memory configuration 170 * (Set up by the startup code) 171 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 172 */ 173 #define CONFIG_SYS_SDRAM_BASE 0x00000000 174 #define CONFIG_SYS_SDRAM_SIZE 4 /* SDRAM size in MB */ 175 #define CONFIG_SYS_FLASH_BASE 0xffe00000 176 177 #ifdef CONFIG_MONITOR_IS_IN_RAM 178 #define CONFIG_SYS_MONITOR_BASE 0x20000 179 #else 180 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 181 #endif 182 183 #define CONFIG_SYS_MONITOR_LEN 0x20000 184 #define CONFIG_SYS_MALLOC_LEN (256 << 10) 185 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 186 187 /* 188 * For booting Linux, the board info and command line data 189 * have to be in the first 8 MB of memory, since this is 190 * the maximum mapped by the Linux kernel during initialization ?? 191 */ 192 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) 193 194 /* 195 * FLASH organization 196 */ 197 #define CONFIG_SYS_FLASH_CFI 198 #ifdef CONFIG_SYS_FLASH_CFI 199 # define CONFIG_FLASH_CFI_DRIVER 1 200 # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ 201 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 202 # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 203 # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ 204 # define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ 205 #endif 206 207 /*----------------------------------------------------------------------- 208 * Cache Configuration 209 */ 210 #define CONFIG_SYS_CACHELINE_SIZE 16 211 212 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 213 CONFIG_SYS_INIT_RAM_SIZE - 8) 214 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 215 CONFIG_SYS_INIT_RAM_SIZE - 4) 216 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) 217 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ 218 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ 219 CF_ACR_EN | CF_ACR_SM_ALL) 220 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ 221 CF_CACR_DISD | CF_CACR_INVI | \ 222 CF_CACR_CEIB | CF_CACR_DCM | \ 223 CF_CACR_EUSP) 224 225 /*----------------------------------------------------------------------- 226 * Memory bank definitions 227 */ 228 #define CONFIG_SYS_BR0_PRELIM 0xFFE00201 229 #define CONFIG_SYS_OR0_PRELIM 0xFFE00014 230 #define CONFIG_SYS_BR1_PRELIM 0 231 #define CONFIG_SYS_OR1_PRELIM 0 232 #define CONFIG_SYS_BR2_PRELIM 0x30000001 233 #define CONFIG_SYS_OR2_PRELIM 0xFFF80000 234 #define CONFIG_SYS_BR3_PRELIM 0 235 #define CONFIG_SYS_OR3_PRELIM 0 236 #define CONFIG_SYS_BR4_PRELIM 0 237 #define CONFIG_SYS_OR4_PRELIM 0 238 #define CONFIG_SYS_BR5_PRELIM 0 239 #define CONFIG_SYS_OR5_PRELIM 0 240 #define CONFIG_SYS_BR6_PRELIM 0 241 #define CONFIG_SYS_OR6_PRELIM 0 242 #define CONFIG_SYS_BR7_PRELIM 0x00000701 243 #define CONFIG_SYS_OR7_PRELIM 0xFFC0007C 244 245 /*----------------------------------------------------------------------- 246 * Port configuration 247 */ 248 #define CONFIG_SYS_PACNT 0x00000000 249 #define CONFIG_SYS_PADDR 0x0000 250 #define CONFIG_SYS_PADAT 0x0000 251 #define CONFIG_SYS_PBCNT 0x55554155 /* Ethernet/UART configuration */ 252 #define CONFIG_SYS_PBDDR 0x0000 253 #define CONFIG_SYS_PBDAT 0x0000 254 #define CONFIG_SYS_PDCNT 0x00000000 255 #endif /* _M5272C3_H */ 256