1 /* 2 * Configuation settings for the Motorola MC5272C3 board. 3 * 4 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 /* 10 * board/config.h - configuration options, board specific 11 */ 12 13 #ifndef _M5272C3_H 14 #define _M5272C3_H 15 16 /* 17 * High Level Configuration Options 18 * (easy to change) 19 */ 20 #define CONFIG_MCFTMR 21 22 #define CONFIG_MCFUART 23 #define CONFIG_SYS_UART_PORT (0) 24 #define CONFIG_BAUDRATE 115200 25 26 #undef CONFIG_WATCHDOG 27 #define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */ 28 29 #undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */ 30 31 /* Configuration for environment 32 * Environment is embedded in u-boot in the second sector of the flash 33 */ 34 #ifndef CONFIG_MONITOR_IS_IN_RAM 35 #define CONFIG_ENV_OFFSET 0x4000 36 #define CONFIG_ENV_SECT_SIZE 0x2000 37 #define CONFIG_ENV_IS_IN_FLASH 1 38 #else 39 #define CONFIG_ENV_ADDR 0xffe04000 40 #define CONFIG_ENV_SECT_SIZE 0x2000 41 #define CONFIG_ENV_IS_IN_FLASH 1 42 #endif 43 44 #define LDS_BOARD_TEXT \ 45 . = DEFINED(env_offset) ? env_offset : .; \ 46 common/env_embedded.o (.text); 47 48 /* 49 * BOOTP options 50 */ 51 #define CONFIG_BOOTP_BOOTFILESIZE 52 #define CONFIG_BOOTP_BOOTPATH 53 #define CONFIG_BOOTP_GATEWAY 54 #define CONFIG_BOOTP_HOSTNAME 55 56 /* 57 * Command line configuration. 58 */ 59 60 #define CONFIG_MCFFEC 61 #ifdef CONFIG_MCFFEC 62 # define CONFIG_MII 1 63 # define CONFIG_MII_INIT 1 64 # define CONFIG_SYS_DISCOVER_PHY 65 # define CONFIG_SYS_RX_ETH_BUFFER 8 66 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 67 68 # define CONFIG_SYS_FEC0_PINMUX 0 69 # define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE 70 # define MCFFEC_TOUT_LOOP 50000 71 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ 72 # ifndef CONFIG_SYS_DISCOVER_PHY 73 # define FECDUPLEX FULL 74 # define FECSPEED _100BASET 75 # else 76 # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN 77 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 78 # endif 79 # endif /* CONFIG_SYS_DISCOVER_PHY */ 80 #endif 81 82 #ifdef CONFIG_MCFFEC 83 # define CONFIG_IPADDR 192.162.1.2 84 # define CONFIG_NETMASK 255.255.255.0 85 # define CONFIG_SERVERIP 192.162.1.1 86 # define CONFIG_GATEWAYIP 192.162.1.1 87 #endif /* CONFIG_MCFFEC */ 88 89 #define CONFIG_HOSTNAME M5272C3 90 #define CONFIG_EXTRA_ENV_SETTINGS \ 91 "netdev=eth0\0" \ 92 "loadaddr=10000\0" \ 93 "u-boot=u-boot.bin\0" \ 94 "load=tftp ${loadaddr) ${u-boot}\0" \ 95 "upd=run load; run prog\0" \ 96 "prog=prot off ffe00000 ffe3ffff;" \ 97 "era ffe00000 ffe3ffff;" \ 98 "cp.b ${loadaddr} ffe00000 ${filesize};"\ 99 "save\0" \ 100 "" 101 102 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 103 104 #if defined(CONFIG_CMD_KGDB) 105 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 106 #else 107 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 108 #endif 109 110 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 111 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 112 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 113 #define CONFIG_SYS_LOAD_ADDR 0x20000 114 #define CONFIG_SYS_MEMTEST_START 0x400 115 #define CONFIG_SYS_MEMTEST_END 0x380000 116 #define CONFIG_SYS_CLK 66000000 117 118 /* 119 * Low Level Configuration Settings 120 * (address mappings, register initial values, etc.) 121 * You should know what you are doing if you make changes here. 122 */ 123 #define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */ 124 #define CONFIG_SYS_SCR 0x0003 125 #define CONFIG_SYS_SPR 0xffff 126 127 /*----------------------------------------------------------------------- 128 * Definitions for initial stack pointer and data area (in DPRAM) 129 */ 130 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 131 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */ 132 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 133 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 134 135 /*----------------------------------------------------------------------- 136 * Start addresses for the final memory configuration 137 * (Set up by the startup code) 138 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 139 */ 140 #define CONFIG_SYS_SDRAM_BASE 0x00000000 141 #define CONFIG_SYS_SDRAM_SIZE 4 /* SDRAM size in MB */ 142 #define CONFIG_SYS_FLASH_BASE 0xffe00000 143 144 #ifdef CONFIG_MONITOR_IS_IN_RAM 145 #define CONFIG_SYS_MONITOR_BASE 0x20000 146 #else 147 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 148 #endif 149 150 #define CONFIG_SYS_MONITOR_LEN 0x20000 151 #define CONFIG_SYS_MALLOC_LEN (256 << 10) 152 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 153 154 /* 155 * For booting Linux, the board info and command line data 156 * have to be in the first 8 MB of memory, since this is 157 * the maximum mapped by the Linux kernel during initialization ?? 158 */ 159 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) 160 161 /* 162 * FLASH organization 163 */ 164 #define CONFIG_SYS_FLASH_CFI 165 #ifdef CONFIG_SYS_FLASH_CFI 166 # define CONFIG_FLASH_CFI_DRIVER 1 167 # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ 168 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 169 # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 170 # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ 171 # define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ 172 #endif 173 174 /*----------------------------------------------------------------------- 175 * Cache Configuration 176 */ 177 #define CONFIG_SYS_CACHELINE_SIZE 16 178 179 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 180 CONFIG_SYS_INIT_RAM_SIZE - 8) 181 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 182 CONFIG_SYS_INIT_RAM_SIZE - 4) 183 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) 184 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ 185 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ 186 CF_ACR_EN | CF_ACR_SM_ALL) 187 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ 188 CF_CACR_DISD | CF_CACR_INVI | \ 189 CF_CACR_CEIB | CF_CACR_DCM | \ 190 CF_CACR_EUSP) 191 192 /*----------------------------------------------------------------------- 193 * Memory bank definitions 194 */ 195 #define CONFIG_SYS_BR0_PRELIM 0xFFE00201 196 #define CONFIG_SYS_OR0_PRELIM 0xFFE00014 197 #define CONFIG_SYS_BR1_PRELIM 0 198 #define CONFIG_SYS_OR1_PRELIM 0 199 #define CONFIG_SYS_BR2_PRELIM 0x30000001 200 #define CONFIG_SYS_OR2_PRELIM 0xFFF80000 201 #define CONFIG_SYS_BR3_PRELIM 0 202 #define CONFIG_SYS_OR3_PRELIM 0 203 #define CONFIG_SYS_BR4_PRELIM 0 204 #define CONFIG_SYS_OR4_PRELIM 0 205 #define CONFIG_SYS_BR5_PRELIM 0 206 #define CONFIG_SYS_OR5_PRELIM 0 207 #define CONFIG_SYS_BR6_PRELIM 0 208 #define CONFIG_SYS_OR6_PRELIM 0 209 #define CONFIG_SYS_BR7_PRELIM 0x00000701 210 #define CONFIG_SYS_OR7_PRELIM 0xFFC0007C 211 212 /*----------------------------------------------------------------------- 213 * Port configuration 214 */ 215 #define CONFIG_SYS_PACNT 0x00000000 216 #define CONFIG_SYS_PADDR 0x0000 217 #define CONFIG_SYS_PADAT 0x0000 218 #define CONFIG_SYS_PBCNT 0x55554155 /* Ethernet/UART configuration */ 219 #define CONFIG_SYS_PBDDR 0x0000 220 #define CONFIG_SYS_PBDAT 0x0000 221 #define CONFIG_SYS_PDCNT 0x00000000 222 #endif /* _M5272C3_H */ 223