xref: /openbmc/u-boot/include/configs/M52277EVB.h (revision e7670f6c)
1 /*
2  * Configuation settings for the Freescale MCF52277 EVB board.
3  *
4  * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
5  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
6  *
7  * See file CREDITS for list of people who contributed to this
8  * project.
9  *
10  * This program is free software; you can redistribute it and/or
11  * modify it under the terms of the GNU General Public License as
12  * published by the Free Software Foundation; either version 2 of
13  * the License, or (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
18  * GNU General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License
21  * along with this program; if not, write to the Free Software
22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23  * MA 02111-1307 USA
24  */
25 
26 /*
27  * board/config.h - configuration options, board specific
28  */
29 
30 #ifndef _M52277EVB_H
31 #define _M52277EVB_H
32 
33 /*
34  * High Level Configuration Options
35  * (easy to change)
36  */
37 #define CONFIG_MCF5227x		/* define processor family */
38 #define CONFIG_M52277		/* define processor type */
39 #define CONFIG_M52277EVB	/* M52277EVB board */
40 
41 #define CONFIG_MCFUART
42 #define CFG_UART_PORT		(0)
43 #define CONFIG_BAUDRATE		115200
44 #define CFG_BAUDRATE_TABLE	{ 9600 , 19200 , 38400 , 57600, 115200 }
45 
46 #undef CONFIG_WATCHDOG
47 
48 #define CONFIG_TIMESTAMP	/* Print image info with timestamp */
49 
50 /*
51  * BOOTP options
52  */
53 #define CONFIG_BOOTP_BOOTFILESIZE
54 #define CONFIG_BOOTP_BOOTPATH
55 #define CONFIG_BOOTP_GATEWAY
56 #define CONFIG_BOOTP_HOSTNAME
57 
58 /* Command line configuration */
59 #include <config_cmd_default.h>
60 
61 #define CONFIG_CMD_CACHE
62 #define CONFIG_CMD_DATE
63 #define CONFIG_CMD_ELF
64 #define CONFIG_CMD_FLASH
65 #define CONFIG_CMD_I2C
66 #define CONFIG_CMD_JFFS2
67 #define CONFIG_CMD_LOADB
68 #define CONFIG_CMD_LOADS
69 #define CONFIG_CMD_MEMORY
70 #define CONFIG_CMD_MISC
71 #undef CONFIG_CMD_NET
72 #define CONFIG_CMD_REGINFO
73 #undef CONFIG_CMD_USB
74 #undef CONFIG_CMD_BMP
75 
76 #define CONFIG_HOSTNAME		M52277EVB
77 #define CONFIG_EXTRA_ENV_SETTINGS		\
78 	"inpclk=" MK_STR(CFG_INPUT_CLKSRC) "\0"	\
79 	"loadaddr=" MK_STR(CFG_LOAD_ADDR) "\0"	\
80 	"u-boot=u-boot.bin\0"			\
81 	"load=tftp ${loadaddr) ${u-boot}\0"	\
82 	"upd=run load; run prog\0"		\
83 	"prog=prot off 0 0x3ffff;"		\
84 	"era 0 3ffff;"				\
85 	"cp.b ${loadaddr} 0 ${filesize};"	\
86 	"save\0"				\
87 	""
88 
89 /* LCD */
90 #ifdef CONFIG_CMD_BMP
91 #define CONFIG_LCD
92 #define CONFIG_SPLASH_SCREEN
93 #define CONFIG_LCD_LOGO
94 #define CONFIG_SHARP_LQ035Q7DH06
95 #endif
96 
97 /* USB */
98 #ifdef CONFIG_CMD_USB
99 #define CONFIG_USB_EHCI
100 #define CONFIG_USB_STORAGE
101 #define CONFIG_DOS_PARTITION
102 #define CONFIG_MAC_PARTITION
103 #define CONFIG_ISO_PARTITION
104 #define CFG_USB_EHCI_REGS_BASE		0xFC0B0000
105 #define CFG_USB_EHCI_CPU_INIT
106 #endif
107 
108 /* Realtime clock */
109 #define CONFIG_MCFRTC
110 #undef RTC_DEBUG
111 #define CFG_RTC_OSCILLATOR	(32 * CFG_HZ)
112 
113 /* Timer */
114 #define CONFIG_MCFTMR
115 #undef CONFIG_MCFPIT
116 
117 /* I2c */
118 #define CONFIG_FSL_I2C
119 #define CONFIG_HARD_I2C		/* I2C with hardware support */
120 #undef	CONFIG_SOFT_I2C		/* I2C bit-banged               */
121 #define CFG_I2C_SPEED		80000	/* I2C speed and slave address  */
122 #define CFG_I2C_SLAVE		0x7F
123 #define CFG_I2C_OFFSET		0x58000
124 #define CFG_IMMR		CFG_MBAR
125 
126 /* Input, PCI, Flexbus, and VCO */
127 #define CONFIG_EXTRA_CLOCK
128 
129 #define CFG_INPUT_CLKSRC	16000000
130 
131 #define CONFIG_PRAM		512	/* 512 KB */
132 
133 #define CFG_PROMPT		"-> "
134 #define CFG_LONGHELP		/* undef to save memory */
135 
136 #if defined(CONFIG_CMD_KGDB)
137 #define CFG_CBSIZE		1024	/* Console I/O Buffer Size */
138 #else
139 #define CFG_CBSIZE		256	/* Console I/O Buffer Size */
140 #endif
141 #define CFG_PBSIZE		(CFG_CBSIZE+sizeof(CFG_PROMPT)+16)	/* Print Buffer Size */
142 #define CFG_MAXARGS		16	/* max number of command args */
143 #define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size    */
144 
145 #define CFG_LOAD_ADDR		(CFG_SDRAM_BASE + 0x10000)
146 
147 #define CFG_HZ			1000
148 
149 #define CFG_MBAR		0xFC000000
150 
151 /*
152  * Low Level Configuration Settings
153  * (address mappings, register initial values, etc.)
154  * You should know what you are doing if you make changes here.
155  */
156 
157 /*-----------------------------------------------------------------------
158  * Definitions for initial stack pointer and data area (in DPRAM)
159  */
160 #define CFG_INIT_RAM_ADDR	0x80000000
161 #define CFG_INIT_RAM_END	0x8000	/* End of used area in internal SRAM */
162 #define CFG_INIT_RAM_CTRL	0x21
163 #define CFG_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
164 #define CFG_GBL_DATA_OFFSET	((CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) - 16)
165 #define CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET
166 
167 /*-----------------------------------------------------------------------
168  * Start addresses for the final memory configuration
169  * (Set up by the startup code)
170  * Please note that CFG_SDRAM_BASE _must_ start at 0
171  */
172 #define CFG_SDRAM_BASE		0x40000000
173 #define CFG_SDRAM_SIZE		64	/* SDRAM size in MB */
174 #define CFG_SDRAM_CFG1		0x43711630
175 #define CFG_SDRAM_CFG2		0x56670000
176 #define CFG_SDRAM_CTRL		0xE1092000
177 #define CFG_SDRAM_EMOD		0x81810000
178 #define CFG_SDRAM_MODE		0x00CD0000
179 
180 #define CFG_MEMTEST_START	CFG_SDRAM_BASE + 0x400
181 #define CFG_MEMTEST_END		((CFG_SDRAM_SIZE - 3) << 20)
182 
183 #define CFG_MONITOR_BASE	(CFG_FLASH_BASE + 0x400)
184 #define CFG_BOOTPARAMS_LEN	64*1024
185 #define CFG_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor */
186 #define CFG_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc() */
187 
188 /* Initial Memory map for Linux */
189 #define CFG_BOOTMAPSZ		(CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20))
190 
191 /* Configuration for environment
192  * Environment is embedded in u-boot in the second sector of the flash
193  */
194 #define CFG_ENV_IS_IN_FLASH	1
195 #define CONFIG_ENV_OVERWRITE	1
196 #undef CFG_ENV_IS_EMBEDDED
197 
198 /*-----------------------------------------------------------------------
199  * FLASH organization
200  */
201 #define CFG_FLASH_BASE		CFG_CS0_BASE
202 #define CFG_FLASH0_BASE		CFG_CS0_BASE
203 #define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x8000)
204 #define CFG_ENV_SECT_SIZE	0x8000
205 
206 #define CFG_FLASH_CFI
207 #ifdef CFG_FLASH_CFI
208 
209 #	define CFG_FLASH_CFI_DRIVER	1
210 #	define CFG_FLASH_SIZE		0x1000000	/* Max size that the board might have */
211 #	define CFG_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
212 #	define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks */
213 #	define CFG_MAX_FLASH_SECT	137	/* max number of sectors on one chip */
214 #	define CFG_FLASH_PROTECTION	/* "Real" (hardware) sectors protection */
215 #	define CFG_FLASH_CHECKSUM
216 #endif
217 
218 /*
219  * This is setting for JFFS2 support in u-boot.
220  * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support.
221  */
222 #ifdef CONFIG_CMD_JFFS2
223 #	define CONFIG_JFFS2_DEV		"nor0"
224 #	define CONFIG_JFFS2_PART_SIZE	(0x01000000 - 0x40000)
225 #	define CONFIG_JFFS2_PART_OFFSET	(CFG_FLASH0_BASE + 0x40000)
226 #endif
227 
228 /*-----------------------------------------------------------------------
229  * Cache Configuration
230  */
231 #define CFG_CACHELINE_SIZE		16
232 
233 /*-----------------------------------------------------------------------
234  * Memory bank definitions
235  */
236 /*
237  * CS0 - NOR Flash
238  * CS1 - Available
239  * CS2 - Available
240  * CS3 - Available
241  * CS4 - Available
242  * CS5 - Available
243  */
244 
245 #define CFG_CS0_BASE		0x00000000
246 #define CFG_CS0_MASK		0x00FF0001
247 #define CFG_CS0_CTRL		0x00001FA0
248 
249 #endif				/* _M52277EVB_H */
250