1 /* 2 * Configuation settings for the Freescale MCF52277 EVB board. 3 * 4 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. 5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com) 6 * 7 * See file CREDITS for list of people who contributed to this 8 * project. 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as 12 * published by the Free Software Foundation; either version 2 of 13 * the License, or (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23 * MA 02111-1307 USA 24 */ 25 26 /* 27 * board/config.h - configuration options, board specific 28 */ 29 30 #ifndef _M52277EVB_H 31 #define _M52277EVB_H 32 33 /* 34 * High Level Configuration Options 35 * (easy to change) 36 */ 37 #define CONFIG_MCF5227x /* define processor family */ 38 #define CONFIG_M52277 /* define processor type */ 39 #define CONFIG_M52277EVB /* M52277EVB board */ 40 41 #define CONFIG_MCFUART 42 #define CFG_UART_PORT (0) 43 #define CONFIG_BAUDRATE 115200 44 #define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } 45 46 #undef CONFIG_WATCHDOG 47 48 #define CONFIG_TIMESTAMP /* Print image info with timestamp */ 49 50 /* 51 * BOOTP options 52 */ 53 #define CONFIG_BOOTP_BOOTFILESIZE 54 #define CONFIG_BOOTP_BOOTPATH 55 #define CONFIG_BOOTP_GATEWAY 56 #define CONFIG_BOOTP_HOSTNAME 57 58 /* Command line configuration */ 59 #include <config_cmd_default.h> 60 61 #define CONFIG_CMD_CACHE 62 #define CONFIG_CMD_DATE 63 #define CONFIG_CMD_ELF 64 #define CONFIG_CMD_FLASH 65 #define CONFIG_CMD_I2C 66 #define CONFIG_CMD_JFFS2 67 #define CONFIG_CMD_LOADB 68 #define CONFIG_CMD_LOADS 69 #define CONFIG_CMD_MEMORY 70 #define CONFIG_CMD_MISC 71 #undef CONFIG_CMD_NET 72 #define CONFIG_CMD_REGINFO 73 #undef CONFIG_CMD_USB 74 #undef CONFIG_CMD_BMP 75 76 #define CONFIG_HOSTNAME M52277EVB 77 #define CONFIG_EXTRA_ENV_SETTINGS \ 78 "inpclk=" MK_STR(CFG_INPUT_CLKSRC) "\0" \ 79 "loadaddr=" MK_STR(CFG_LOAD_ADDR) "\0" \ 80 "u-boot=u-boot.bin\0" \ 81 "load=tftp ${loadaddr) ${u-boot}\0" \ 82 "upd=run load; run prog\0" \ 83 "prog=prot off 0 0x3ffff;" \ 84 "era 0 3ffff;" \ 85 "cp.b ${loadaddr} 0 ${filesize};" \ 86 "save\0" \ 87 "" 88 89 #define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */ 90 /* LCD */ 91 #ifdef CONFIG_CMD_BMP 92 #define CONFIG_LCD 93 #define CONFIG_SPLASH_SCREEN 94 #define CONFIG_LCD_LOGO 95 #define CONFIG_SHARP_LQ035Q7DH06 96 #endif 97 98 /* USB */ 99 #ifdef CONFIG_CMD_USB 100 #define CONFIG_USB_EHCI 101 #define CONFIG_USB_STORAGE 102 #define CONFIG_DOS_PARTITION 103 #define CONFIG_MAC_PARTITION 104 #define CONFIG_ISO_PARTITION 105 #define CFG_USB_EHCI_REGS_BASE 0xFC0B0000 106 #define CFG_USB_EHCI_CPU_INIT 107 #endif 108 109 /* Realtime clock */ 110 #define CONFIG_MCFRTC 111 #undef RTC_DEBUG 112 #define CFG_RTC_OSCILLATOR (32 * CFG_HZ) 113 114 /* Timer */ 115 #define CONFIG_MCFTMR 116 #undef CONFIG_MCFPIT 117 118 /* I2c */ 119 #define CONFIG_FSL_I2C 120 #define CONFIG_HARD_I2C /* I2C with hardware support */ 121 #undef CONFIG_SOFT_I2C /* I2C bit-banged */ 122 #define CFG_I2C_SPEED 80000 /* I2C speed and slave address */ 123 #define CFG_I2C_SLAVE 0x7F 124 #define CFG_I2C_OFFSET 0x58000 125 #define CFG_IMMR CFG_MBAR 126 127 /* Input, PCI, Flexbus, and VCO */ 128 #define CONFIG_EXTRA_CLOCK 129 130 #define CFG_INPUT_CLKSRC 16000000 131 132 #define CONFIG_PRAM 512 /* 512 KB */ 133 134 #define CFG_PROMPT "-> " 135 #define CFG_LONGHELP /* undef to save memory */ 136 137 #if defined(CONFIG_CMD_KGDB) 138 #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ 139 #else 140 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ 141 #endif 142 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ 143 #define CFG_MAXARGS 16 /* max number of command args */ 144 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ 145 146 #define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 0x10000) 147 148 #define CFG_HZ 1000 149 150 #define CFG_MBAR 0xFC000000 151 152 /* 153 * Low Level Configuration Settings 154 * (address mappings, register initial values, etc.) 155 * You should know what you are doing if you make changes here. 156 */ 157 158 /*----------------------------------------------------------------------- 159 * Definitions for initial stack pointer and data area (in DPRAM) 160 */ 161 #define CFG_INIT_RAM_ADDR 0x80000000 162 #define CFG_INIT_RAM_END 0x8000 /* End of used area in internal SRAM */ 163 #define CFG_INIT_RAM_CTRL 0x21 164 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ 165 #define CFG_GBL_DATA_OFFSET ((CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) - 16) 166 #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET 167 168 /*----------------------------------------------------------------------- 169 * Start addresses for the final memory configuration 170 * (Set up by the startup code) 171 * Please note that CFG_SDRAM_BASE _must_ start at 0 172 */ 173 #define CFG_SDRAM_BASE 0x40000000 174 #define CFG_SDRAM_SIZE 64 /* SDRAM size in MB */ 175 #define CFG_SDRAM_CFG1 0x43711630 176 #define CFG_SDRAM_CFG2 0x56670000 177 #define CFG_SDRAM_CTRL 0xE1092000 178 #define CFG_SDRAM_EMOD 0x81810000 179 #define CFG_SDRAM_MODE 0x00CD0000 180 181 #define CFG_MEMTEST_START CFG_SDRAM_BASE + 0x400 182 #define CFG_MEMTEST_END ((CFG_SDRAM_SIZE - 3) << 20) 183 184 #define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400) 185 #define CFG_BOOTPARAMS_LEN 64*1024 186 #define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ 187 #define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ 188 189 /* Initial Memory map for Linux */ 190 #define CFG_BOOTMAPSZ (CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20)) 191 192 /* Configuration for environment 193 * Environment is embedded in u-boot in the second sector of the flash 194 */ 195 #define CFG_ENV_IS_IN_FLASH 1 196 #define CONFIG_ENV_OVERWRITE 1 197 #undef CFG_ENV_IS_EMBEDDED 198 199 /*----------------------------------------------------------------------- 200 * FLASH organization 201 */ 202 #define CFG_FLASH_BASE CFG_CS0_BASE 203 #define CFG_FLASH0_BASE CFG_CS0_BASE 204 #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x8000) 205 #define CFG_ENV_SECT_SIZE 0x8000 206 207 #define CFG_FLASH_CFI 208 #ifdef CFG_FLASH_CFI 209 210 # define CFG_FLASH_CFI_DRIVER 1 211 # define CFG_FLASH_SIZE 0x1000000 /* Max size that the board might have */ 212 # define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT 213 # define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ 214 # define CFG_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ 215 # define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ 216 # define CFG_FLASH_CHECKSUM 217 #endif 218 219 /* 220 * This is setting for JFFS2 support in u-boot. 221 * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support. 222 */ 223 #ifdef CONFIG_CMD_JFFS2 224 # define CONFIG_JFFS2_DEV "nor0" 225 # define CONFIG_JFFS2_PART_SIZE (0x01000000 - 0x40000) 226 # define CONFIG_JFFS2_PART_OFFSET (CFG_FLASH0_BASE + 0x40000) 227 #endif 228 229 /*----------------------------------------------------------------------- 230 * Cache Configuration 231 */ 232 #define CFG_CACHELINE_SIZE 16 233 234 /*----------------------------------------------------------------------- 235 * Memory bank definitions 236 */ 237 /* 238 * CS0 - NOR Flash 239 * CS1 - Available 240 * CS2 - Available 241 * CS3 - Available 242 * CS4 - Available 243 * CS5 - Available 244 */ 245 246 #define CFG_CS0_BASE 0x00000000 247 #define CFG_CS0_MASK 0x00FF0001 248 #define CFG_CS0_CTRL 0x00001FA0 249 250 #endif /* _M52277EVB_H */ 251