1 /* 2 * Configuation settings for the Freescale MCF52277 EVB board. 3 * 4 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. 5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com) 6 * 7 * See file CREDITS for list of people who contributed to this 8 * project. 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as 12 * published by the Free Software Foundation; either version 2 of 13 * the License, or (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23 * MA 02111-1307 USA 24 */ 25 26 /* 27 * board/config.h - configuration options, board specific 28 */ 29 30 #ifndef _M52277EVB_H 31 #define _M52277EVB_H 32 33 /* 34 * High Level Configuration Options 35 * (easy to change) 36 */ 37 #define CONFIG_MCF5227x /* define processor family */ 38 #define CONFIG_M52277 /* define processor type */ 39 #define CONFIG_M52277EVB /* M52277EVB board */ 40 41 #undef DEBUG 42 43 #define CONFIG_MCFUART 44 #define CFG_UART_PORT (0) 45 #define CONFIG_BAUDRATE 115200 46 #define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } 47 48 #undef CONFIG_WATCHDOG 49 50 #define CONFIG_TIMESTAMP /* Print image info with timestamp */ 51 52 /* 53 * BOOTP options 54 */ 55 #define CONFIG_BOOTP_BOOTFILESIZE 56 #define CONFIG_BOOTP_BOOTPATH 57 #define CONFIG_BOOTP_GATEWAY 58 #define CONFIG_BOOTP_HOSTNAME 59 60 /* Command line configuration */ 61 #include <config_cmd_default.h> 62 63 #define CONFIG_CMD_CACHE 64 #define CONFIG_CMD_DATE 65 #define CONFIG_CMD_ELF 66 #define CONFIG_CMD_FLASH 67 #define CONFIG_CMD_I2C 68 #define CONFIG_CMD_JFFS2 69 #define CONFIG_CMD_LOADB 70 #define CONFIG_CMD_LOADS 71 #define CONFIG_CMD_MEMORY 72 #define CONFIG_CMD_MISC 73 #undef CONFIG_CMD_NET 74 #define CONFIG_CMD_REGINFO 75 #undef CONFIG_CMD_USB 76 #undef CONFIG_CMD_BMP 77 78 #define CONFIG_HOSTNAME M52277EVB 79 #define CONFIG_EXTRA_ENV_SETTINGS \ 80 "inpclk=" MK_STR(CFG_INPUT_CLKSRC) "\0" \ 81 "loadaddr=" MK_STR(CFG_LOAD_ADDR) "\0" \ 82 "u-boot=u-boot.bin\0" \ 83 "load=tftp ${loadaddr) ${u-boot}\0" \ 84 "upd=run load; run prog\0" \ 85 "prog=prot off 0 0x3ffff;" \ 86 "era 0 3ffff;" \ 87 "cp.b ${loadaddr} 0 ${filesize};" \ 88 "save\0" \ 89 "" 90 91 /* LCD */ 92 #ifdef CONFIG_CMD_BMP 93 #define CONFIG_LCD 94 #define CONFIG_SPLASH_SCREEN 95 #define CONFIG_LCD_LOGO 96 #define CONFIG_SHARP_LQ035Q7DH06 97 #endif 98 99 /* USB */ 100 #ifdef CONFIG_CMD_USB 101 #define CONFIG_USB_EHCI 102 #define CONFIG_USB_STORAGE 103 #define CONFIG_DOS_PARTITION 104 #define CONFIG_MAC_PARTITION 105 #define CONFIG_ISO_PARTITION 106 #define CFG_USB_EHCI_REGS_BASE 0xFC0B0000 107 #define CFG_USB_EHCI_CPU_INIT 108 #endif 109 110 /* Realtime clock */ 111 #define CONFIG_MCFRTC 112 #undef RTC_DEBUG 113 #define CFG_RTC_OSCILLATOR (32 * CFG_HZ) 114 115 /* Timer */ 116 #define CONFIG_MCFTMR 117 #undef CONFIG_MCFPIT 118 119 /* I2c */ 120 #define CONFIG_FSL_I2C 121 #define CONFIG_HARD_I2C /* I2C with hardware support */ 122 #undef CONFIG_SOFT_I2C /* I2C bit-banged */ 123 #define CFG_I2C_SPEED 80000 /* I2C speed and slave address */ 124 #define CFG_I2C_SLAVE 0x7F 125 #define CFG_I2C_OFFSET 0x58000 126 #define CFG_IMMR CFG_MBAR 127 128 /* Input, PCI, Flexbus, and VCO */ 129 #define CONFIG_EXTRA_CLOCK 130 131 #define CFG_INPUT_CLKSRC 16000000 132 133 #define CONFIG_PRAM 512 /* 512 KB */ 134 135 #define CFG_PROMPT "-> " 136 #define CFG_LONGHELP /* undef to save memory */ 137 138 #if defined(CONFIG_CMD_KGDB) 139 #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ 140 #else 141 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ 142 #endif 143 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ 144 #define CFG_MAXARGS 16 /* max number of command args */ 145 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ 146 147 #define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 0x10000) 148 149 #define CFG_HZ 1000 150 151 #define CFG_MBAR 0xFC000000 152 153 /* 154 * Low Level Configuration Settings 155 * (address mappings, register initial values, etc.) 156 * You should know what you are doing if you make changes here. 157 */ 158 159 /*----------------------------------------------------------------------- 160 * Definitions for initial stack pointer and data area (in DPRAM) 161 */ 162 #define CFG_INIT_RAM_ADDR 0x80000000 163 #define CFG_INIT_RAM_END 0x8000 /* End of used area in internal SRAM */ 164 #define CFG_INIT_RAM_CTRL 0x21 165 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ 166 #define CFG_GBL_DATA_OFFSET ((CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) - 16) 167 #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET 168 169 /*----------------------------------------------------------------------- 170 * Start addresses for the final memory configuration 171 * (Set up by the startup code) 172 * Please note that CFG_SDRAM_BASE _must_ start at 0 173 */ 174 #define CFG_SDRAM_BASE 0x40000000 175 #define CFG_SDRAM_SIZE 64 /* SDRAM size in MB */ 176 #define CFG_SDRAM_CFG1 0x43711630 177 #define CFG_SDRAM_CFG2 0x56670000 178 #define CFG_SDRAM_CTRL 0xE1092000 179 #define CFG_SDRAM_EMOD 0x81810000 180 #define CFG_SDRAM_MODE 0x00CD0000 181 182 #define CFG_MEMTEST_START CFG_SDRAM_BASE + 0x400 183 #define CFG_MEMTEST_END ((CFG_SDRAM_SIZE - 3) << 20) 184 185 #define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400) 186 #define CFG_BOOTPARAMS_LEN 64*1024 187 #define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ 188 #define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ 189 190 /* Initial Memory map for Linux */ 191 #define CFG_BOOTMAPSZ (CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20)) 192 193 /* Configuration for environment 194 * Environment is embedded in u-boot in the second sector of the flash 195 */ 196 #define CFG_ENV_IS_IN_FLASH 1 197 #define CONFIG_ENV_OVERWRITE 1 198 #undef CFG_ENV_IS_EMBEDDED 199 200 /*----------------------------------------------------------------------- 201 * FLASH organization 202 */ 203 #define CFG_FLASH_BASE CFG_CS0_BASE 204 #define CFG_FLASH0_BASE CFG_CS0_BASE 205 #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x8000) 206 #define CFG_ENV_SECT_SIZE 0x8000 207 208 #define CFG_FLASH_CFI 209 #ifdef CFG_FLASH_CFI 210 211 # define CFG_FLASH_CFI_DRIVER 1 212 # define CFG_FLASH_SIZE 0x1000000 /* Max size that the board might have */ 213 # define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT 214 # define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ 215 # define CFG_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ 216 # define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ 217 # define CFG_FLASH_CHECKSUM 218 #endif 219 220 /* 221 * This is setting for JFFS2 support in u-boot. 222 * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support. 223 */ 224 #ifdef CONFIG_CMD_JFFS2 225 # define CONFIG_JFFS2_DEV "nor0" 226 # define CONFIG_JFFS2_PART_SIZE (0x01000000 - 0x40000) 227 # define CONFIG_JFFS2_PART_OFFSET (CFG_FLASH0_BASE + 0x40000) 228 #endif 229 230 /*----------------------------------------------------------------------- 231 * Cache Configuration 232 */ 233 #define CFG_CACHELINE_SIZE 16 234 235 /*----------------------------------------------------------------------- 236 * Memory bank definitions 237 */ 238 /* 239 * CS0 - NOR Flash 240 * CS1 - Available 241 * CS2 - Available 242 * CS3 - Available 243 * CS4 - Available 244 * CS5 - Available 245 */ 246 247 #define CFG_CS0_BASE 0x00000000 248 #define CFG_CS0_MASK 0x00FF0001 249 #define CFG_CS0_CTRL 0x00001FA0 250 251 #endif /* _M52277EVB_H */ 252