1 /* 2 * Configuation settings for the Freescale MCF5208EVBe. 3 * 4 * Copyright (C) 2004-2008 Freescale Semiconductor, Inc. 5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com) 6 * 7 * See file CREDITS for list of people who contributed to this 8 * project. 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as 12 * published by the Free Software Foundation; either version 2 of 13 * the License, or (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23 * MA 02111-1307 USA 24 */ 25 26 #ifndef _M5208EVBE_H 27 #define _M5208EVBE_H 28 29 /* 30 * High Level Configuration Options 31 * (easy to change) 32 */ 33 #define CONFIG_MCF520x /* define processor family */ 34 #define CONFIG_M5208 /* define processor type */ 35 36 #define CONFIG_MCFUART 37 #define CONFIG_SYS_UART_PORT (0) 38 #define CONFIG_BAUDRATE 115200 39 40 #undef CONFIG_WATCHDOG 41 #define CONFIG_WATCHDOG_TIMEOUT 5000 42 43 /* Command line configuration */ 44 #include <config_cmd_default.h> 45 46 #define CONFIG_CMD_CACHE 47 #define CONFIG_CMD_ELF 48 #define CONFIG_CMD_FLASH 49 #undef CONFIG_CMD_I2C 50 #define CONFIG_CMD_MEMORY 51 #define CONFIG_CMD_MISC 52 #define CONFIG_CMD_MII 53 #define CONFIG_CMD_NET 54 #define CONFIG_CMD_PING 55 #define CONFIG_CMD_REGINFO 56 57 #define CONFIG_MCFFEC 58 #ifdef CONFIG_MCFFEC 59 # define CONFIG_MII 1 60 # define CONFIG_MII_INIT 1 61 # define CONFIG_SYS_DISCOVER_PHY 62 # define CONFIG_SYS_RX_ETH_BUFFER 8 63 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 64 # define CONFIG_HAS_ETH1 65 66 # define CONFIG_SYS_FEC0_PINMUX 0 67 # define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE 68 # define MCFFEC_TOUT_LOOP 50000 69 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ 70 # ifndef CONFIG_SYS_DISCOVER_PHY 71 # define FECDUPLEX FULL 72 # define FECSPEED _100BASET 73 # else 74 # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN 75 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 76 # endif 77 # endif /* CONFIG_SYS_DISCOVER_PHY */ 78 #endif 79 80 /* Timer */ 81 #define CONFIG_MCFTMR 82 #undef CONFIG_MCFPIT 83 84 /* I2C */ 85 #define CONFIG_SYS_I2C 86 #define CONFIG_SYS_I2C_FSL 87 #define CONFIG_SYS_FSL_I2C_SPEED 80000 88 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F 89 #define CONFIG_SYS_FSL_I2C_OFFSET 0x58000 90 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR 91 92 #define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */ 93 #define CONFIG_UDP_CHECKSUM 94 95 #ifdef CONFIG_MCFFEC 96 # define CONFIG_ETHADDR 00:e0:0c:bc:e5:60 97 # define CONFIG_IPADDR 192.162.1.2 98 # define CONFIG_NETMASK 255.255.255.0 99 # define CONFIG_SERVERIP 192.162.1.1 100 # define CONFIG_GATEWAYIP 192.162.1.1 101 # define CONFIG_OVERWRITE_ETHADDR_ONCE 102 #endif /* CONFIG_MCFFEC */ 103 104 #define CONFIG_HOSTNAME M5208EVBe 105 #define CONFIG_EXTRA_ENV_SETTINGS \ 106 "netdev=eth0\0" \ 107 "loadaddr=40010000\0" \ 108 "u-boot=u-boot.bin\0" \ 109 "load=tftp ${loadaddr) ${u-boot}\0" \ 110 "upd=run load; run prog\0" \ 111 "prog=prot off 0 3ffff;" \ 112 "era 0 3ffff;" \ 113 "cp.b ${loadaddr} 0 ${filesize};" \ 114 "save\0" \ 115 "" 116 117 #define CONFIG_PRAM 512 /* 512 KB */ 118 #define CONFIG_SYS_PROMPT "-> " 119 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 120 121 #ifdef CONFIG_CMD_KGDB 122 # define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 123 #else 124 # define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 125 #endif 126 127 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 128 #define CONFIG_SYS_MAXARGS 16 /* max number of cmd args */ 129 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Arg Buf Sz */ 130 #define CONFIG_SYS_LOAD_ADDR 0x40010000 131 132 #define CONFIG_SYS_HZ 1000 133 #define CONFIG_SYS_CLK 166666666 /* CPU Core Clock */ 134 #define CONFIG_SYS_PLL_ODR 0x36 135 #define CONFIG_SYS_PLL_FDR 0x7D 136 137 #define CONFIG_SYS_MBAR 0xFC000000 138 139 /* 140 * Low Level Configuration Settings 141 * (address mappings, register initial values, etc.) 142 * You should know what you are doing if you make changes here. 143 */ 144 /* Definitions for initial stack pointer and data area (in DPRAM) */ 145 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 146 #define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in internal SRAM */ 147 #define CONFIG_SYS_INIT_RAM_CTRL 0x221 148 #define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 0x10) 149 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 150 151 /* 152 * Start addresses for the final memory configuration 153 * (Set up by the startup code) 154 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 155 */ 156 #define CONFIG_SYS_SDRAM_BASE 0x40000000 157 #define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ 158 #define CONFIG_SYS_SDRAM_CFG1 0x43711630 159 #define CONFIG_SYS_SDRAM_CFG2 0x56670000 160 #define CONFIG_SYS_SDRAM_CTRL 0xE1002000 161 #define CONFIG_SYS_SDRAM_EMOD 0x80010000 162 #define CONFIG_SYS_SDRAM_MODE 0x00CD0000 163 164 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400 165 #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) 166 167 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 168 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ 169 170 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 171 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ 172 173 /* 174 * For booting Linux, the board info and command line data 175 * have to be in the first 8 MB of memory, since this is 176 * the maximum mapped by the Linux kernel during initialization ?? 177 */ 178 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) 179 #define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20) 180 181 /* FLASH organization */ 182 #define CONFIG_SYS_FLASH_CFI 183 #ifdef CONFIG_SYS_FLASH_CFI 184 # define CONFIG_FLASH_CFI_DRIVER 1 185 # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ 186 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 187 # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 188 # define CONFIG_SYS_MAX_FLASH_SECT 254 /* max number of sectors on one chip */ 189 # define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ 190 #endif 191 192 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE 193 194 /* 195 * Configuration for environment 196 * Environment is embedded in u-boot in the second sector of the flash 197 */ 198 #define CONFIG_ENV_OFFSET 0x2000 199 #define CONFIG_ENV_SIZE 0x1000 200 #define CONFIG_ENV_SECT_SIZE 0x2000 201 #define CONFIG_ENV_IS_IN_FLASH 1 202 203 /* Cache Configuration */ 204 #define CONFIG_SYS_CACHELINE_SIZE 16 205 206 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 207 CONFIG_SYS_INIT_RAM_SIZE - 8) 208 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 209 CONFIG_SYS_INIT_RAM_SIZE - 4) 210 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) 211 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ 212 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ 213 CF_ACR_EN | CF_ACR_SM_ALL) 214 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ 215 CF_CACR_DISD | CF_CACR_INVI | \ 216 CF_CACR_CEIB | CF_CACR_DCM | \ 217 CF_CACR_EUSP) 218 219 /* Chipselect bank definitions */ 220 /* 221 * CS0 - NOR Flash 222 * CS1 - Available 223 * CS2 - Available 224 * CS3 - Available 225 * CS4 - Available 226 * CS5 - Available 227 */ 228 #define CONFIG_SYS_CS0_BASE 0 229 #define CONFIG_SYS_CS0_MASK 0x007F0001 230 #define CONFIG_SYS_CS0_CTRL 0x00001FA0 231 232 #endif /* _M5208EVBE_H */ 233