1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 25c7f10fdSOliver Schinagl /* 35c7f10fdSOliver Schinagl * (C) Copyright 2013 Oliver Schinagl <oliver@schinagl.nl> 45c7f10fdSOliver Schinagl * 55c7f10fdSOliver Schinagl * X-Powers AXP221 Power Management IC driver 65c7f10fdSOliver Schinagl */ 75c7f10fdSOliver Schinagl 8f3fba566SHans de Goede /* Page 0 addresses */ 95c7f10fdSOliver Schinagl #define AXP221_CHIP_ID 0x03 105c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL1 0x10 1150e0d5e6SHans de Goede #define AXP221_OUTPUT_CTRL1_DCDC0_EN (1 << 0) 1250e0d5e6SHans de Goede #define AXP221_OUTPUT_CTRL1_DCDC1_EN (1 << 1) 1350e0d5e6SHans de Goede #define AXP221_OUTPUT_CTRL1_DCDC2_EN (1 << 2) 1450e0d5e6SHans de Goede #define AXP221_OUTPUT_CTRL1_DCDC3_EN (1 << 3) 1550e0d5e6SHans de Goede #define AXP221_OUTPUT_CTRL1_DCDC4_EN (1 << 4) 1650e0d5e6SHans de Goede #define AXP221_OUTPUT_CTRL1_DCDC5_EN (1 << 5) 175c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL1_ALDO1_EN (1 << 6) 185c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL1_ALDO2_EN (1 << 7) 195c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL2 0x12 206906df1aSSiarhei Siamashka #define AXP221_OUTPUT_CTRL2_ELDO1_EN (1 << 0) 216906df1aSSiarhei Siamashka #define AXP221_OUTPUT_CTRL2_ELDO2_EN (1 << 1) 226906df1aSSiarhei Siamashka #define AXP221_OUTPUT_CTRL2_ELDO3_EN (1 << 2) 235c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL2_DLDO1_EN (1 << 3) 245c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL2_DLDO2_EN (1 << 4) 255c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL2_DLDO3_EN (1 << 5) 265c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL2_DLDO4_EN (1 << 6) 2750e0d5e6SHans de Goede #define AXP221_OUTPUT_CTRL2_DCDC1SW_EN (1 << 7) 285c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL3 0x13 295c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL3_ALDO3_EN (1 << 7) 305c7f10fdSOliver Schinagl #define AXP221_DLDO1_CTRL 0x15 315c7f10fdSOliver Schinagl #define AXP221_DLDO2_CTRL 0x16 325c7f10fdSOliver Schinagl #define AXP221_DLDO3_CTRL 0x17 335c7f10fdSOliver Schinagl #define AXP221_DLDO4_CTRL 0x18 346906df1aSSiarhei Siamashka #define AXP221_ELDO1_CTRL 0x19 356906df1aSSiarhei Siamashka #define AXP221_ELDO2_CTRL 0x1a 366906df1aSSiarhei Siamashka #define AXP221_ELDO3_CTRL 0x1b 375c7f10fdSOliver Schinagl #define AXP221_DCDC1_CTRL 0x21 385c7f10fdSOliver Schinagl #define AXP221_DCDC2_CTRL 0x22 395c7f10fdSOliver Schinagl #define AXP221_DCDC3_CTRL 0x23 405c7f10fdSOliver Schinagl #define AXP221_DCDC4_CTRL 0x24 415c7f10fdSOliver Schinagl #define AXP221_DCDC5_CTRL 0x25 425c7f10fdSOliver Schinagl #define AXP221_ALDO1_CTRL 0x28 435ba47194SHans de Goede #define AXP221_ALDO2_CTRL 0x29 445c7f10fdSOliver Schinagl #define AXP221_ALDO3_CTRL 0x2a 45fe4b71b2SHans de Goede #define AXP221_SHUTDOWN 0x32 46fe4b71b2SHans de Goede #define AXP221_SHUTDOWN_POWEROFF (1 << 7) 47f3fba566SHans de Goede #define AXP221_PAGE 0xff 48f3fba566SHans de Goede 49f3fba566SHans de Goede /* Page 1 addresses */ 50f3fba566SHans de Goede #define AXP221_SID 0x20 515c7f10fdSOliver Schinagl 522fcf033dSHans de Goede /* For axp_gpio.c */ 532fcf033dSHans de Goede #define AXP_POWER_STATUS 0x00 542fcf033dSHans de Goede #define AXP_POWER_STATUS_VBUS_PRESENT (1 << 5) 5581a8aa3aSChen-Yu Tsai #define AXP_VBUS_IPSOUT 0x30 5681a8aa3aSChen-Yu Tsai #define AXP_VBUS_IPSOUT_DRIVEBUS (1 << 2) 5781a8aa3aSChen-Yu Tsai #define AXP_MISC_CTRL 0x8f 5881a8aa3aSChen-Yu Tsai #define AXP_MISC_CTRL_N_VBUSEN_FUNC (1 << 4) 592fcf033dSHans de Goede #define AXP_GPIO0_CTRL 0x90 602fcf033dSHans de Goede #define AXP_GPIO1_CTRL 0x92 612fcf033dSHans de Goede #define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */ 622fcf033dSHans de Goede #define AXP_GPIO_CTRL_OUTPUT_HIGH 0x01 /* Drive pin high */ 632fcf033dSHans de Goede #define AXP_GPIO_CTRL_INPUT 0x02 /* Input */ 642fcf033dSHans de Goede #define AXP_GPIO_STATE 0x94 652fcf033dSHans de Goede #define AXP_GPIO_STATE_OFFSET 0 66