1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 224289208SHans de Goede /* 324289208SHans de Goede * (C) Copyright 2012 Henrik Nordstrom <henrik@henriknordstrom.net> 424289208SHans de Goede */ 5558ccc7fSPaul Kocialkowski 6558ccc7fSPaul Kocialkowski enum axp152_reg { 7558ccc7fSPaul Kocialkowski AXP152_CHIP_VERSION = 0x3, 8558ccc7fSPaul Kocialkowski AXP152_DCDC2_VOLTAGE = 0x23, 9558ccc7fSPaul Kocialkowski AXP152_DCDC3_VOLTAGE = 0x27, 10558ccc7fSPaul Kocialkowski AXP152_DCDC4_VOLTAGE = 0x2B, 11558ccc7fSPaul Kocialkowski AXP152_LDO2_VOLTAGE = 0x2A, 12558ccc7fSPaul Kocialkowski AXP152_SHUTDOWN = 0x32, 13558ccc7fSPaul Kocialkowski }; 14558ccc7fSPaul Kocialkowski 15558ccc7fSPaul Kocialkowski #define AXP152_POWEROFF (1 << 7) 16558ccc7fSPaul Kocialkowski 172fcf033dSHans de Goede /* For axp_gpio.c */ 182fcf033dSHans de Goede #define AXP_GPIO0_CTRL 0x90 192fcf033dSHans de Goede #define AXP_GPIO1_CTRL 0x91 202fcf033dSHans de Goede #define AXP_GPIO2_CTRL 0x92 212fcf033dSHans de Goede #define AXP_GPIO3_CTRL 0x93 222fcf033dSHans de Goede #define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */ 232fcf033dSHans de Goede #define AXP_GPIO_CTRL_OUTPUT_HIGH 0x01 /* Drive pin high */ 242fcf033dSHans de Goede #define AXP_GPIO_CTRL_INPUT 0x02 /* Input */ 252fcf033dSHans de Goede #define AXP_GPIO_STATE 0x97 262fcf033dSHans de Goede #define AXP_GPIO_STATE_OFFSET 0 27