1*baaa7dd7SNikita Kiryanov /* 2*baaa7dd7SNikita Kiryanov * atmel_lcd.h - Atmel LCD Controller structures 3*baaa7dd7SNikita Kiryanov * 4*baaa7dd7SNikita Kiryanov * (C) Copyright 2001 5*baaa7dd7SNikita Kiryanov * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 6*baaa7dd7SNikita Kiryanov * 7*baaa7dd7SNikita Kiryanov * SPDX-License-Identifier: GPL-2.0+ 8*baaa7dd7SNikita Kiryanov */ 9*baaa7dd7SNikita Kiryanov 10*baaa7dd7SNikita Kiryanov #ifndef _ATMEL_LCD_H_ 11*baaa7dd7SNikita Kiryanov #define _ATMEL_LCD_H_ 12*baaa7dd7SNikita Kiryanov 13*baaa7dd7SNikita Kiryanov typedef struct vidinfo { 14*baaa7dd7SNikita Kiryanov ushort vl_col; /* Number of columns (i.e. 640) */ 15*baaa7dd7SNikita Kiryanov ushort vl_row; /* Number of rows (i.e. 480) */ 16*baaa7dd7SNikita Kiryanov u_long vl_clk; /* pixel clock in ps */ 17*baaa7dd7SNikita Kiryanov 18*baaa7dd7SNikita Kiryanov /* LCD configuration register */ 19*baaa7dd7SNikita Kiryanov u_long vl_sync; /* Horizontal / vertical sync */ 20*baaa7dd7SNikita Kiryanov u_long vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */ 21*baaa7dd7SNikita Kiryanov u_long vl_tft; /* 0 = passive, 1 = TFT */ 22*baaa7dd7SNikita Kiryanov u_long vl_cont_pol_low; /* contrast polarity is low */ 23*baaa7dd7SNikita Kiryanov u_long vl_clk_pol; /* clock polarity */ 24*baaa7dd7SNikita Kiryanov 25*baaa7dd7SNikita Kiryanov /* Horizontal control register. */ 26*baaa7dd7SNikita Kiryanov u_long vl_hsync_len; /* Length of horizontal sync */ 27*baaa7dd7SNikita Kiryanov u_long vl_left_margin; /* Time from sync to picture */ 28*baaa7dd7SNikita Kiryanov u_long vl_right_margin; /* Time from picture to sync */ 29*baaa7dd7SNikita Kiryanov 30*baaa7dd7SNikita Kiryanov /* Vertical control register. */ 31*baaa7dd7SNikita Kiryanov u_long vl_vsync_len; /* Length of vertical sync */ 32*baaa7dd7SNikita Kiryanov u_long vl_upper_margin; /* Time from sync to picture */ 33*baaa7dd7SNikita Kiryanov u_long vl_lower_margin; /* Time from picture to sync */ 34*baaa7dd7SNikita Kiryanov 35*baaa7dd7SNikita Kiryanov u_long mmio; /* Memory mapped registers */ 36*baaa7dd7SNikita Kiryanov } vidinfo_t; 37*baaa7dd7SNikita Kiryanov 38*baaa7dd7SNikita Kiryanov #endif 39