1 /* 2 * (C) Copyright 2000 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24 /* 25 * Most of the following information was derived from the document 26 * "Information Technology - AT Attachment-3 Interface (ATA-3)" 27 * which can be found at: 28 * http://www.dt.wdc.com/ata/ata-3/ata3r5v.zip 29 * ftp://poctok.iae.nsk.su/pub/asm/Documents/IDE/ATA3R5V.ZIP 30 * ftp://ftp.fee.vutbr.cz/pub/doc/io/ata/ata-3/ata3r5v.zip 31 */ 32 33 #ifndef _ATA_H 34 #define _ATA_H 35 36 #include <libata.h> 37 38 /* Register addressing depends on the hardware design; for instance, 39 * 8-bit (register) and 16-bit (data) accesses might use different 40 * address spaces. This is implemented by the following definitions. 41 */ 42 #ifndef CONFIG_SYS_ATA_STRIDE 43 #define CONFIG_SYS_ATA_STRIDE 1 44 #endif 45 46 #define ATA_IO_DATA(x) (CONFIG_SYS_ATA_DATA_OFFSET+((x) * CONFIG_SYS_ATA_STRIDE)) 47 #define ATA_IO_REG(x) (CONFIG_SYS_ATA_REG_OFFSET +((x) * CONFIG_SYS_ATA_STRIDE)) 48 #define ATA_IO_ALT(x) (CONFIG_SYS_ATA_ALT_OFFSET +((x) * CONFIG_SYS_ATA_STRIDE)) 49 50 /* 51 * I/O Register Descriptions 52 */ 53 #define ATA_DATA_REG ATA_IO_DATA(0) 54 #define ATA_ERROR_REG ATA_IO_REG(1) 55 #define ATA_SECT_CNT ATA_IO_REG(2) 56 #define ATA_SECT_NUM ATA_IO_REG(3) 57 #define ATA_CYL_LOW ATA_IO_REG(4) 58 #define ATA_CYL_HIGH ATA_IO_REG(5) 59 #define ATA_DEV_HD ATA_IO_REG(6) 60 #define ATA_COMMAND ATA_IO_REG(7) 61 #define ATA_DATA_EVEN ATA_IO_REG(8) 62 #define ATA_DATA_ODD ATA_IO_REG(9) 63 #define ATA_STATUS ATA_COMMAND 64 #define ATA_DEV_CTL ATA_IO_ALT(6) 65 #define ATA_LBA_LOW ATA_SECT_NUM 66 #define ATA_LBA_MID ATA_CYL_LOW 67 #define ATA_LBA_HIGH ATA_CYL_HIGH 68 #define ATA_LBA_SEL ATA_DEV_CTL 69 70 /* 71 * Status register bits 72 */ 73 #define ATA_STAT_BUSY 0x80 /* Device Busy */ 74 #define ATA_STAT_READY 0x40 /* Device Ready */ 75 #define ATA_STAT_FAULT 0x20 /* Device Fault */ 76 #define ATA_STAT_SEEK 0x10 /* Device Seek Complete */ 77 #define ATA_STAT_DRQ 0x08 /* Data Request (ready) */ 78 #define ATA_STAT_CORR 0x04 /* Corrected Data Error */ 79 #define ATA_STAT_INDEX 0x02 /* Vendor specific */ 80 #define ATA_STAT_ERR 0x01 /* Error */ 81 82 /* 83 * Device / Head Register Bits 84 */ 85 #ifndef ATA_DEVICE 86 #define ATA_DEVICE(x) ((x & 1)<<4) 87 #endif /* ATA_DEVICE */ 88 #define ATA_LBA 0xE0 89 90 /* 91 * ATA Commands (only mandatory commands listed here) 92 */ 93 #define ATA_CMD_READ 0x20 /* Read Sectors (with retries) */ 94 #define ATA_CMD_READN 0x21 /* Read Sectors ( no retries) */ 95 #define ATA_CMD_WRITE 0x30 /* Write Sectores (with retries)*/ 96 #define ATA_CMD_WRITEN 0x31 /* Write Sectors ( no retries)*/ 97 #define ATA_CMD_VRFY 0x40 /* Read Verify (with retries) */ 98 #define ATA_CMD_VRFYN 0x41 /* Read verify ( no retries) */ 99 #define ATA_CMD_SEEK 0x70 /* Seek */ 100 #define ATA_CMD_DIAG 0x90 /* Execute Device Diagnostic */ 101 #define ATA_CMD_INIT 0x91 /* Initialize Device Parameters */ 102 #define ATA_CMD_RD_MULT 0xC4 /* Read Multiple */ 103 #define ATA_CMD_WR_MULT 0xC5 /* Write Multiple */ 104 #define ATA_CMD_SETMULT 0xC6 /* Set Multiple Mode */ 105 #define ATA_CMD_RD_DMA 0xC8 /* Read DMA (with retries) */ 106 #define ATA_CMD_RD_DMAN 0xC9 /* Read DMS ( no retries) */ 107 #define ATA_CMD_WR_DMA 0xCA /* Write DMA (with retries) */ 108 #define ATA_CMD_WR_DMAN 0xCB /* Write DMA ( no retires) */ 109 #define ATA_CMD_IDENT 0xEC /* Identify Device */ 110 #define ATA_CMD_SETF 0xEF /* Set Features */ 111 #define ATA_CMD_CHK_PWR 0xE5 /* Check Power Mode */ 112 113 #define ATA_CMD_READ_EXT 0x24 /* Read Sectors (with retries) with 48bit addressing */ 114 #define ATA_CMD_WRITE_EXT 0x34 /* Write Sectores (with retries) with 48bit addressing */ 115 #define ATA_CMD_VRFY_EXT 0x42 /* Read Verify (with retries) with 48bit addressing */ 116 117 #define ATA_CMD_FLUSH 0xE7 /* Flush drive cache */ 118 #define ATA_CMD_FLUSH_EXT 0xEA /* Flush drive cache, with 48bit addressing */ 119 120 /* 121 * ATAPI Commands 122 */ 123 #define ATAPI_CMD_IDENT 0xA1 /* Identify AT Atachment Packed Interface Device */ 124 #define ATAPI_CMD_PACKET 0xA0 /* Packed Command */ 125 126 127 #define ATAPI_CMD_INQUIRY 0x12 128 #define ATAPI_CMD_REQ_SENSE 0x03 129 #define ATAPI_CMD_READ_CAP 0x25 130 #define ATAPI_CMD_START_STOP 0x1B 131 #define ATAPI_CMD_READ_12 0xA8 132 133 134 #define ATA_GET_ERR() inb(ATA_STATUS) 135 #define ATA_GET_STAT() inb(ATA_STATUS) 136 #define ATA_OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good)) 137 #define ATA_BAD_R_STAT (ATA_STAT_BUSY | ATA_STAT_ERR) 138 #define ATA_BAD_W_STAT (ATA_BAD_R_STAT | ATA_STAT_FAULT) 139 #define ATA_BAD_STAT (ATA_BAD_R_STAT | ATA_STAT_DRQ) 140 #define ATA_DRIVE_READY (ATA_READY_STAT | ATA_STAT_SEEK) 141 #define ATA_DATA_READY (ATA_STAT_DRQ) 142 143 #define ATA_BLOCKSIZE 512 /* bytes */ 144 #define ATA_BLOCKSHIFT 9 /* 2 ^ ATA_BLOCKSIZESHIFT = 512 */ 145 #define ATA_SECTORWORDS (512 / sizeof(unsigned long)) 146 147 #ifndef ATA_RESET_TIME 148 #define ATA_RESET_TIME 60 /* spec allows up to 31 seconds */ 149 #endif 150 151 /* ------------------------------------------------------------------------- */ 152 153 /* 154 * structure returned by ATA_CMD_IDENT, as per ANSI ATA2 rev.2f spec 155 */ 156 typedef struct hd_driveid { 157 unsigned short config; /* lots of obsolete bit flags */ 158 unsigned short cyls; /* "physical" cyls */ 159 unsigned short reserved2; /* reserved (word 2) */ 160 unsigned short heads; /* "physical" heads */ 161 unsigned short track_bytes; /* unformatted bytes per track */ 162 unsigned short sector_bytes; /* unformatted bytes per sector */ 163 unsigned short sectors; /* "physical" sectors per track */ 164 unsigned short vendor0; /* vendor unique */ 165 unsigned short vendor1; /* vendor unique */ 166 unsigned short vendor2; /* vendor unique */ 167 unsigned char serial_no[20]; /* 0 = not_specified */ 168 unsigned short buf_type; 169 unsigned short buf_size; /* 512 byte increments; 0 = not_specified */ 170 unsigned short ecc_bytes; /* for r/w long cmds; 0 = not_specified */ 171 unsigned char fw_rev[8]; /* 0 = not_specified */ 172 unsigned char model[40]; /* 0 = not_specified */ 173 unsigned char max_multsect; /* 0=not_implemented */ 174 unsigned char vendor3; /* vendor unique */ 175 unsigned short dword_io; /* 0=not_implemented; 1=implemented */ 176 unsigned char vendor4; /* vendor unique */ 177 unsigned char capability; /* bits 0:DMA 1:LBA 2:IORDYsw 3:IORDYsup*/ 178 unsigned short reserved50; /* reserved (word 50) */ 179 unsigned char vendor5; /* vendor unique */ 180 unsigned char tPIO; /* 0=slow, 1=medium, 2=fast */ 181 unsigned char vendor6; /* vendor unique */ 182 unsigned char tDMA; /* 0=slow, 1=medium, 2=fast */ 183 unsigned short field_valid; /* bits 0:cur_ok 1:eide_ok */ 184 unsigned short cur_cyls; /* logical cylinders */ 185 unsigned short cur_heads; /* logical heads */ 186 unsigned short cur_sectors; /* logical sectors per track */ 187 unsigned short cur_capacity0; /* logical total sectors on drive */ 188 unsigned short cur_capacity1; /* (2 words, misaligned int) */ 189 unsigned char multsect; /* current multiple sector count */ 190 unsigned char multsect_valid; /* when (bit0==1) multsect is ok */ 191 unsigned int lba_capacity; /* total number of sectors */ 192 unsigned short dma_1word; /* single-word dma info */ 193 unsigned short dma_mword; /* multiple-word dma info */ 194 unsigned short eide_pio_modes; /* bits 0:mode3 1:mode4 */ 195 unsigned short eide_dma_min; /* min mword dma cycle time (ns) */ 196 unsigned short eide_dma_time; /* recommended mword dma cycle time (ns) */ 197 unsigned short eide_pio; /* min cycle time (ns), no IORDY */ 198 unsigned short eide_pio_iordy; /* min cycle time (ns), with IORDY */ 199 unsigned short words69_70[2]; /* reserved words 69-70 */ 200 unsigned short words71_74[4]; /* reserved words 71-74 */ 201 unsigned short queue_depth; /* */ 202 unsigned short words76_79[4]; /* reserved words 76-79 */ 203 unsigned short major_rev_num; /* */ 204 unsigned short minor_rev_num; /* */ 205 unsigned short command_set_1; /* bits 0:Smart 1:Security 2:Removable 3:PM */ 206 unsigned short command_set_2; /* bits 14:Smart Enabled 13:0 zero 10:lba48 support*/ 207 unsigned short cfsse; /* command set-feature supported extensions */ 208 unsigned short cfs_enable_1; /* command set-feature enabled */ 209 unsigned short cfs_enable_2; /* command set-feature enabled */ 210 unsigned short csf_default; /* command set-feature default */ 211 unsigned short dma_ultra; /* */ 212 unsigned short word89; /* reserved (word 89) */ 213 unsigned short word90; /* reserved (word 90) */ 214 unsigned short CurAPMvalues; /* current APM values */ 215 unsigned short word92; /* reserved (word 92) */ 216 unsigned short hw_config; /* hardware config */ 217 unsigned short words94_99[6];/* reserved words 94-99 */ 218 /*unsigned long long lba48_capacity; /--* 4 16bit values containing lba 48 total number of sectors */ 219 unsigned short lba48_capacity[4]; /* 4 16bit values containing lba 48 total number of sectors */ 220 unsigned short words104_125[22];/* reserved words 104-125 */ 221 unsigned short last_lun; /* reserved (word 126) */ 222 unsigned short word127; /* reserved (word 127) */ 223 unsigned short dlf; /* device lock function 224 * 15:9 reserved 225 * 8 security level 1:max 0:high 226 * 7:6 reserved 227 * 5 enhanced erase 228 * 4 expire 229 * 3 frozen 230 * 2 locked 231 * 1 en/disabled 232 * 0 capability 233 */ 234 unsigned short csfo; /* current set features options 235 * 15:4 reserved 236 * 3 auto reassign 237 * 2 reverting 238 * 1 read-look-ahead 239 * 0 write cache 240 */ 241 unsigned short words130_155[26];/* reserved vendor words 130-155 */ 242 unsigned short word156; 243 unsigned short words157_159[3];/* reserved vendor words 157-159 */ 244 unsigned short words160_162[3];/* reserved words 160-162 */ 245 unsigned short cf_advanced_caps; 246 unsigned short words164_255[92];/* reserved words 164-255 */ 247 } hd_driveid_t; 248 249 250 /* 251 * PIO Mode Configuration 252 * 253 * See ATA-3 (AT Attachment-3 Interface) documentation, Figure 14 / Table 21 254 */ 255 256 typedef struct { 257 unsigned int t_setup; /* Setup Time in [ns] or clocks */ 258 unsigned int t_length; /* Length Time in [ns] or clocks */ 259 unsigned int t_hold; /* Hold Time in [ns] or clocks */ 260 } 261 pio_config_t; 262 263 #define IDE_MAX_PIO_MODE 4 /* max suppurted PIO mode */ 264 265 /* ------------------------------------------------------------------------- */ 266 267 #endif /* _ATA_H */ 268