1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2fe8c2806Swdenk /* 3fe8c2806Swdenk * (C) Copyright 2000 4fe8c2806Swdenk * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5fe8c2806Swdenk */ 6fe8c2806Swdenk 7fe8c2806Swdenk /* 8fe8c2806Swdenk * Most of the following information was derived from the document 9fe8c2806Swdenk * "Information Technology - AT Attachment-3 Interface (ATA-3)" 10fe8c2806Swdenk * which can be found at: 11fe8c2806Swdenk * http://www.dt.wdc.com/ata/ata-3/ata3r5v.zip 12fe8c2806Swdenk * ftp://poctok.iae.nsk.su/pub/asm/Documents/IDE/ATA3R5V.ZIP 13fe8c2806Swdenk * ftp://ftp.fee.vutbr.cz/pub/doc/io/ata/ata-3/ata3r5v.zip 14fe8c2806Swdenk */ 15fe8c2806Swdenk 16fe8c2806Swdenk #ifndef _ATA_H 17fe8c2806Swdenk #define _ATA_H 18fe8c2806Swdenk 199571b84cSSteven A. Falco #include <libata.h> 209571b84cSSteven A. Falco 21fe8c2806Swdenk /* Register addressing depends on the hardware design; for instance, 22fe8c2806Swdenk * 8-bit (register) and 16-bit (data) accesses might use different 23fe8c2806Swdenk * address spaces. This is implemented by the following definitions. 24fe8c2806Swdenk */ 256d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #ifndef CONFIG_SYS_ATA_STRIDE 266d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_ATA_STRIDE 1 279fd5e31fSwdenk #endif 28fe8c2806Swdenk 296d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define ATA_IO_DATA(x) (CONFIG_SYS_ATA_DATA_OFFSET+((x) * CONFIG_SYS_ATA_STRIDE)) 306d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define ATA_IO_REG(x) (CONFIG_SYS_ATA_REG_OFFSET +((x) * CONFIG_SYS_ATA_STRIDE)) 316d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define ATA_IO_ALT(x) (CONFIG_SYS_ATA_ALT_OFFSET +((x) * CONFIG_SYS_ATA_STRIDE)) 32fe8c2806Swdenk 33fe8c2806Swdenk /* 34fe8c2806Swdenk * I/O Register Descriptions 35fe8c2806Swdenk */ 36fe8c2806Swdenk #define ATA_DATA_REG ATA_IO_DATA(0) 37fe8c2806Swdenk #define ATA_ERROR_REG ATA_IO_REG(1) 38fe8c2806Swdenk #define ATA_SECT_CNT ATA_IO_REG(2) 39fe8c2806Swdenk #define ATA_SECT_NUM ATA_IO_REG(3) 40fe8c2806Swdenk #define ATA_CYL_LOW ATA_IO_REG(4) 41fe8c2806Swdenk #define ATA_CYL_HIGH ATA_IO_REG(5) 42fe8c2806Swdenk #define ATA_DEV_HD ATA_IO_REG(6) 43fe8c2806Swdenk #define ATA_COMMAND ATA_IO_REG(7) 44a522fa0eSwdenk #define ATA_DATA_EVEN ATA_IO_REG(8) 45a522fa0eSwdenk #define ATA_DATA_ODD ATA_IO_REG(9) 46fe8c2806Swdenk #define ATA_STATUS ATA_COMMAND 47fe8c2806Swdenk #define ATA_DEV_CTL ATA_IO_ALT(6) 48fe8c2806Swdenk #define ATA_LBA_LOW ATA_SECT_NUM 49fe8c2806Swdenk #define ATA_LBA_MID ATA_CYL_LOW 50fe8c2806Swdenk #define ATA_LBA_HIGH ATA_CYL_HIGH 51fe8c2806Swdenk #define ATA_LBA_SEL ATA_DEV_CTL 52fe8c2806Swdenk 53fe8c2806Swdenk /* 54fe8c2806Swdenk * Status register bits 55fe8c2806Swdenk */ 56fe8c2806Swdenk #define ATA_STAT_BUSY 0x80 /* Device Busy */ 57fe8c2806Swdenk #define ATA_STAT_READY 0x40 /* Device Ready */ 58fe8c2806Swdenk #define ATA_STAT_FAULT 0x20 /* Device Fault */ 59fe8c2806Swdenk #define ATA_STAT_SEEK 0x10 /* Device Seek Complete */ 60fe8c2806Swdenk #define ATA_STAT_DRQ 0x08 /* Data Request (ready) */ 61fe8c2806Swdenk #define ATA_STAT_CORR 0x04 /* Corrected Data Error */ 62fe8c2806Swdenk #define ATA_STAT_INDEX 0x02 /* Vendor specific */ 63fe8c2806Swdenk #define ATA_STAT_ERR 0x01 /* Error */ 64fe8c2806Swdenk 65fe8c2806Swdenk /* 66fe8c2806Swdenk * Device / Head Register Bits 67fe8c2806Swdenk */ 682b224609SReinhard Arlt #ifndef ATA_DEVICE 69fe8c2806Swdenk #define ATA_DEVICE(x) ((x & 1)<<4) 702b224609SReinhard Arlt #endif /* ATA_DEVICE */ 71fe8c2806Swdenk #define ATA_LBA 0xE0 72fe8c2806Swdenk 73fe8c2806Swdenk /* 74fe8c2806Swdenk * ATA Commands (only mandatory commands listed here) 75fe8c2806Swdenk */ 76fe8c2806Swdenk #define ATA_CMD_READ 0x20 /* Read Sectors (with retries) */ 77fe8c2806Swdenk #define ATA_CMD_READN 0x21 /* Read Sectors ( no retries) */ 78fe8c2806Swdenk #define ATA_CMD_WRITE 0x30 /* Write Sectores (with retries)*/ 79fe8c2806Swdenk #define ATA_CMD_WRITEN 0x31 /* Write Sectors ( no retries)*/ 80fe8c2806Swdenk #define ATA_CMD_VRFY 0x40 /* Read Verify (with retries) */ 81fe8c2806Swdenk #define ATA_CMD_VRFYN 0x41 /* Read verify ( no retries) */ 82fe8c2806Swdenk #define ATA_CMD_SEEK 0x70 /* Seek */ 83fe8c2806Swdenk #define ATA_CMD_DIAG 0x90 /* Execute Device Diagnostic */ 84fe8c2806Swdenk #define ATA_CMD_INIT 0x91 /* Initialize Device Parameters */ 85fe8c2806Swdenk #define ATA_CMD_RD_MULT 0xC4 /* Read Multiple */ 86fe8c2806Swdenk #define ATA_CMD_WR_MULT 0xC5 /* Write Multiple */ 87fe8c2806Swdenk #define ATA_CMD_SETMULT 0xC6 /* Set Multiple Mode */ 88fe8c2806Swdenk #define ATA_CMD_RD_DMA 0xC8 /* Read DMA (with retries) */ 89fe8c2806Swdenk #define ATA_CMD_RD_DMAN 0xC9 /* Read DMS ( no retries) */ 90fe8c2806Swdenk #define ATA_CMD_WR_DMA 0xCA /* Write DMA (with retries) */ 91fe8c2806Swdenk #define ATA_CMD_WR_DMAN 0xCB /* Write DMA ( no retires) */ 92fe8c2806Swdenk #define ATA_CMD_IDENT 0xEC /* Identify Device */ 93fe8c2806Swdenk #define ATA_CMD_SETF 0xEF /* Set Features */ 94fe8c2806Swdenk #define ATA_CMD_CHK_PWR 0xE5 /* Check Power Mode */ 95fe8c2806Swdenk 96c40b2956Swdenk #define ATA_CMD_READ_EXT 0x24 /* Read Sectors (with retries) with 48bit addressing */ 97c40b2956Swdenk #define ATA_CMD_WRITE_EXT 0x34 /* Write Sectores (with retries) with 48bit addressing */ 98c40b2956Swdenk #define ATA_CMD_VRFY_EXT 0x42 /* Read Verify (with retries) with 48bit addressing */ 99c40b2956Swdenk 100766b16feSMarc Jones #define ATA_CMD_FLUSH 0xE7 /* Flush drive cache */ 101766b16feSMarc Jones #define ATA_CMD_FLUSH_EXT 0xEA /* Flush drive cache, with 48bit addressing */ 102766b16feSMarc Jones 103fe8c2806Swdenk /* 104fe8c2806Swdenk * ATAPI Commands 105fe8c2806Swdenk */ 106fe8c2806Swdenk #define ATAPI_CMD_IDENT 0xA1 /* Identify AT Atachment Packed Interface Device */ 107fe8c2806Swdenk #define ATAPI_CMD_PACKET 0xA0 /* Packed Command */ 108fe8c2806Swdenk 109fe8c2806Swdenk 110fe8c2806Swdenk #define ATAPI_CMD_INQUIRY 0x12 111fe8c2806Swdenk #define ATAPI_CMD_REQ_SENSE 0x03 112fe8c2806Swdenk #define ATAPI_CMD_READ_CAP 0x25 113fe8c2806Swdenk #define ATAPI_CMD_START_STOP 0x1B 114fe8c2806Swdenk #define ATAPI_CMD_READ_12 0xA8 115fe8c2806Swdenk 116fe8c2806Swdenk 117fe8c2806Swdenk #define ATA_GET_ERR() inb(ATA_STATUS) 118fe8c2806Swdenk #define ATA_GET_STAT() inb(ATA_STATUS) 119fe8c2806Swdenk #define ATA_OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good)) 120fe8c2806Swdenk #define ATA_BAD_R_STAT (ATA_STAT_BUSY | ATA_STAT_ERR) 121fe8c2806Swdenk #define ATA_BAD_W_STAT (ATA_BAD_R_STAT | ATA_STAT_FAULT) 122fe8c2806Swdenk #define ATA_BAD_STAT (ATA_BAD_R_STAT | ATA_STAT_DRQ) 123fe8c2806Swdenk #define ATA_DRIVE_READY (ATA_READY_STAT | ATA_STAT_SEEK) 124fe8c2806Swdenk #define ATA_DATA_READY (ATA_STAT_DRQ) 125fe8c2806Swdenk 126fe8c2806Swdenk #define ATA_BLOCKSIZE 512 /* bytes */ 127fe8c2806Swdenk #define ATA_BLOCKSHIFT 9 /* 2 ^ ATA_BLOCKSIZESHIFT = 512 */ 128d92ea983SStanislav Galabov #define ATA_SECTORWORDS (512 / sizeof(uint32_t)) 129fe8c2806Swdenk 130fe8c2806Swdenk #ifndef ATA_RESET_TIME 131fe8c2806Swdenk #define ATA_RESET_TIME 60 /* spec allows up to 31 seconds */ 132fe8c2806Swdenk #endif 133fe8c2806Swdenk 134fe8c2806Swdenk /* ------------------------------------------------------------------------- */ 135fe8c2806Swdenk 136fe8c2806Swdenk /* 137fe8c2806Swdenk * structure returned by ATA_CMD_IDENT, as per ANSI ATA2 rev.2f spec 138fe8c2806Swdenk */ 139fe8c2806Swdenk typedef struct hd_driveid { 140fe8c2806Swdenk unsigned short config; /* lots of obsolete bit flags */ 141fe8c2806Swdenk unsigned short cyls; /* "physical" cyls */ 142fe8c2806Swdenk unsigned short reserved2; /* reserved (word 2) */ 143fe8c2806Swdenk unsigned short heads; /* "physical" heads */ 144fe8c2806Swdenk unsigned short track_bytes; /* unformatted bytes per track */ 145fe8c2806Swdenk unsigned short sector_bytes; /* unformatted bytes per sector */ 146fe8c2806Swdenk unsigned short sectors; /* "physical" sectors per track */ 147fe8c2806Swdenk unsigned short vendor0; /* vendor unique */ 148fe8c2806Swdenk unsigned short vendor1; /* vendor unique */ 149fe8c2806Swdenk unsigned short vendor2; /* vendor unique */ 150fe8c2806Swdenk unsigned char serial_no[20]; /* 0 = not_specified */ 151fe8c2806Swdenk unsigned short buf_type; 152fe8c2806Swdenk unsigned short buf_size; /* 512 byte increments; 0 = not_specified */ 153fe8c2806Swdenk unsigned short ecc_bytes; /* for r/w long cmds; 0 = not_specified */ 154fe8c2806Swdenk unsigned char fw_rev[8]; /* 0 = not_specified */ 155fe8c2806Swdenk unsigned char model[40]; /* 0 = not_specified */ 156fe8c2806Swdenk unsigned char max_multsect; /* 0=not_implemented */ 157fe8c2806Swdenk unsigned char vendor3; /* vendor unique */ 158fe8c2806Swdenk unsigned short dword_io; /* 0=not_implemented; 1=implemented */ 159fe8c2806Swdenk unsigned char vendor4; /* vendor unique */ 160fe8c2806Swdenk unsigned char capability; /* bits 0:DMA 1:LBA 2:IORDYsw 3:IORDYsup*/ 161fe8c2806Swdenk unsigned short reserved50; /* reserved (word 50) */ 162fe8c2806Swdenk unsigned char vendor5; /* vendor unique */ 163fe8c2806Swdenk unsigned char tPIO; /* 0=slow, 1=medium, 2=fast */ 164fe8c2806Swdenk unsigned char vendor6; /* vendor unique */ 165fe8c2806Swdenk unsigned char tDMA; /* 0=slow, 1=medium, 2=fast */ 166fe8c2806Swdenk unsigned short field_valid; /* bits 0:cur_ok 1:eide_ok */ 167fe8c2806Swdenk unsigned short cur_cyls; /* logical cylinders */ 168fe8c2806Swdenk unsigned short cur_heads; /* logical heads */ 169fe8c2806Swdenk unsigned short cur_sectors; /* logical sectors per track */ 170fe8c2806Swdenk unsigned short cur_capacity0; /* logical total sectors on drive */ 171fe8c2806Swdenk unsigned short cur_capacity1; /* (2 words, misaligned int) */ 172fe8c2806Swdenk unsigned char multsect; /* current multiple sector count */ 173fe8c2806Swdenk unsigned char multsect_valid; /* when (bit0==1) multsect is ok */ 174fe8c2806Swdenk unsigned int lba_capacity; /* total number of sectors */ 175fe8c2806Swdenk unsigned short dma_1word; /* single-word dma info */ 176fe8c2806Swdenk unsigned short dma_mword; /* multiple-word dma info */ 177fe8c2806Swdenk unsigned short eide_pio_modes; /* bits 0:mode3 1:mode4 */ 178fe8c2806Swdenk unsigned short eide_dma_min; /* min mword dma cycle time (ns) */ 179fe8c2806Swdenk unsigned short eide_dma_time; /* recommended mword dma cycle time (ns) */ 180fe8c2806Swdenk unsigned short eide_pio; /* min cycle time (ns), no IORDY */ 181fe8c2806Swdenk unsigned short eide_pio_iordy; /* min cycle time (ns), with IORDY */ 182fe8c2806Swdenk unsigned short words69_70[2]; /* reserved words 69-70 */ 183fe8c2806Swdenk unsigned short words71_74[4]; /* reserved words 71-74 */ 184fe8c2806Swdenk unsigned short queue_depth; /* */ 185fe8c2806Swdenk unsigned short words76_79[4]; /* reserved words 76-79 */ 186fe8c2806Swdenk unsigned short major_rev_num; /* */ 187fe8c2806Swdenk unsigned short minor_rev_num; /* */ 188fe8c2806Swdenk unsigned short command_set_1; /* bits 0:Smart 1:Security 2:Removable 3:PM */ 189c40b2956Swdenk unsigned short command_set_2; /* bits 14:Smart Enabled 13:0 zero 10:lba48 support*/ 190fe8c2806Swdenk unsigned short cfsse; /* command set-feature supported extensions */ 191fe8c2806Swdenk unsigned short cfs_enable_1; /* command set-feature enabled */ 192fe8c2806Swdenk unsigned short cfs_enable_2; /* command set-feature enabled */ 193fe8c2806Swdenk unsigned short csf_default; /* command set-feature default */ 194fe8c2806Swdenk unsigned short dma_ultra; /* */ 195fe8c2806Swdenk unsigned short word89; /* reserved (word 89) */ 196fe8c2806Swdenk unsigned short word90; /* reserved (word 90) */ 197fe8c2806Swdenk unsigned short CurAPMvalues; /* current APM values */ 198fe8c2806Swdenk unsigned short word92; /* reserved (word 92) */ 199fe8c2806Swdenk unsigned short hw_config; /* hardware config */ 200c40b2956Swdenk unsigned short words94_99[6];/* reserved words 94-99 */ 20142dfe7a1Swdenk /*unsigned long long lba48_capacity; /--* 4 16bit values containing lba 48 total number of sectors */ 202c40b2956Swdenk unsigned short lba48_capacity[4]; /* 4 16bit values containing lba 48 total number of sectors */ 203c40b2956Swdenk unsigned short words104_125[22];/* reserved words 104-125 */ 204fe8c2806Swdenk unsigned short last_lun; /* reserved (word 126) */ 205fe8c2806Swdenk unsigned short word127; /* reserved (word 127) */ 206fe8c2806Swdenk unsigned short dlf; /* device lock function 207fe8c2806Swdenk * 15:9 reserved 208fe8c2806Swdenk * 8 security level 1:max 0:high 209fe8c2806Swdenk * 7:6 reserved 210fe8c2806Swdenk * 5 enhanced erase 211fe8c2806Swdenk * 4 expire 212fe8c2806Swdenk * 3 frozen 213fe8c2806Swdenk * 2 locked 214fe8c2806Swdenk * 1 en/disabled 215fe8c2806Swdenk * 0 capability 216fe8c2806Swdenk */ 217fe8c2806Swdenk unsigned short csfo; /* current set features options 218fe8c2806Swdenk * 15:4 reserved 219fe8c2806Swdenk * 3 auto reassign 220fe8c2806Swdenk * 2 reverting 221fe8c2806Swdenk * 1 read-look-ahead 222fe8c2806Swdenk * 0 write cache 223fe8c2806Swdenk */ 224fe8c2806Swdenk unsigned short words130_155[26];/* reserved vendor words 130-155 */ 225fe8c2806Swdenk unsigned short word156; 226fe8c2806Swdenk unsigned short words157_159[3];/* reserved vendor words 157-159 */ 22736c2d306SSteven A. Falco unsigned short words160_162[3];/* reserved words 160-162 */ 22836c2d306SSteven A. Falco unsigned short cf_advanced_caps; 22936c2d306SSteven A. Falco unsigned short words164_255[92];/* reserved words 164-255 */ 230fe8c2806Swdenk } hd_driveid_t; 231fe8c2806Swdenk 232fe8c2806Swdenk 233fe8c2806Swdenk /* 234fe8c2806Swdenk * PIO Mode Configuration 235fe8c2806Swdenk * 236fe8c2806Swdenk * See ATA-3 (AT Attachment-3 Interface) documentation, Figure 14 / Table 21 237fe8c2806Swdenk */ 238fe8c2806Swdenk 239fe8c2806Swdenk typedef struct { 240fe8c2806Swdenk unsigned int t_setup; /* Setup Time in [ns] or clocks */ 241fe8c2806Swdenk unsigned int t_length; /* Length Time in [ns] or clocks */ 242fe8c2806Swdenk unsigned int t_hold; /* Hold Time in [ns] or clocks */ 243fe8c2806Swdenk } 244fe8c2806Swdenk pio_config_t; 245fe8c2806Swdenk 246fe8c2806Swdenk #define IDE_MAX_PIO_MODE 4 /* max suppurted PIO mode */ 247fe8c2806Swdenk 248fe8c2806Swdenk /* ------------------------------------------------------------------------- */ 249fe8c2806Swdenk 250fe8c2806Swdenk #endif /* _ATA_H */ 251