1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * 4 * (C) Copyright 2000 - 2002 5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 ******************************************************************** 9 * NOTE: This header file defines an interface to U-Boot. Including 10 * this (unmodified) header file in another file is considered normal 11 * use of U-Boot, and does *not* fall under the heading of "derived 12 * work". 13 ******************************************************************** 14 */ 15 16 #ifndef __ASM_GENERIC_U_BOOT_H__ 17 #define __ASM_GENERIC_U_BOOT_H__ 18 19 /* 20 * Board information passed to Linux kernel from U-Boot 21 * 22 * include/asm-ppc/u-boot.h 23 */ 24 25 #ifndef __ASSEMBLY__ 26 27 typedef struct bd_info { 28 unsigned long bi_memstart; /* start of DRAM memory */ 29 phys_size_t bi_memsize; /* size of DRAM memory in bytes */ 30 unsigned long bi_flashstart; /* start of FLASH memory */ 31 unsigned long bi_flashsize; /* size of FLASH memory */ 32 unsigned long bi_flashoffset; /* reserved area for startup monitor */ 33 unsigned long bi_sramstart; /* start of SRAM memory */ 34 unsigned long bi_sramsize; /* size of SRAM memory */ 35 #ifdef CONFIG_ARM 36 unsigned long bi_arm_freq; /* arm frequency */ 37 unsigned long bi_dsp_freq; /* dsp core frequency */ 38 unsigned long bi_ddr_freq; /* ddr frequency */ 39 #endif 40 #if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_MPC8260) \ 41 || defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 42 unsigned long bi_immr_base; /* base of IMMR register */ 43 #endif 44 #if defined(CONFIG_MPC5xxx) 45 unsigned long bi_mbar_base; /* base of internal registers */ 46 #endif 47 #if defined(CONFIG_MPC83xx) 48 unsigned long bi_immrbar; 49 #endif 50 unsigned long bi_bootflags; /* boot / reboot flag (Unused) */ 51 unsigned long bi_ip_addr; /* IP Address */ 52 unsigned char bi_enetaddr[6]; /* OLD: see README.enetaddr */ 53 unsigned short bi_ethspeed; /* Ethernet speed in Mbps */ 54 unsigned long bi_intfreq; /* Internal Freq, in MHz */ 55 unsigned long bi_busfreq; /* Bus Freq, in MHz */ 56 #if defined(CONFIG_CPM2) 57 unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */ 58 unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */ 59 unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */ 60 unsigned long bi_vco; /* VCO Out from PLL, in MHz */ 61 #endif 62 #if defined(CONFIG_MPC512X) 63 unsigned long bi_ipsfreq; /* IPS Bus Freq, in MHz */ 64 #endif /* CONFIG_MPC512X */ 65 #if defined(CONFIG_MPC5xxx) 66 unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */ 67 unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */ 68 #endif 69 unsigned int bi_baudrate; /* Console Baudrate */ 70 #if defined(CONFIG_405) || \ 71 defined(CONFIG_405GP) || \ 72 defined(CONFIG_405EP) || \ 73 defined(CONFIG_405EZ) || \ 74 defined(CONFIG_405EX) || \ 75 defined(CONFIG_440) 76 unsigned char bi_s_version[4]; /* Version of this structure */ 77 unsigned char bi_r_version[32]; /* Version of the ROM (AMCC) */ 78 unsigned int bi_procfreq; /* CPU (Internal) Freq, in Hz */ 79 unsigned int bi_plb_busfreq; /* PLB Bus speed, in Hz */ 80 unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */ 81 unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */ 82 #endif 83 #if defined(CONFIG_HYMOD) 84 hymod_conf_t bi_hymod_conf; /* hymod configuration information */ 85 #endif 86 87 #ifdef CONFIG_HAS_ETH1 88 unsigned char bi_enet1addr[6]; /* OLD: see README.enetaddr */ 89 #endif 90 #ifdef CONFIG_HAS_ETH2 91 unsigned char bi_enet2addr[6]; /* OLD: see README.enetaddr */ 92 #endif 93 #ifdef CONFIG_HAS_ETH3 94 unsigned char bi_enet3addr[6]; /* OLD: see README.enetaddr */ 95 #endif 96 #ifdef CONFIG_HAS_ETH4 97 unsigned char bi_enet4addr[6]; /* OLD: see README.enetaddr */ 98 #endif 99 #ifdef CONFIG_HAS_ETH5 100 unsigned char bi_enet5addr[6]; /* OLD: see README.enetaddr */ 101 #endif 102 103 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ 104 defined(CONFIG_405EZ) || defined(CONFIG_440GX) || \ 105 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ 106 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ 107 defined(CONFIG_460EX) || defined(CONFIG_460GT) 108 unsigned int bi_opbfreq; /* OPB clock in Hz */ 109 int bi_iic_fast[2]; /* Use fast i2c mode */ 110 #endif 111 #if defined(CONFIG_NX823) 112 unsigned char bi_sernum[8]; 113 #endif 114 #if defined(CONFIG_4xx) 115 #if defined(CONFIG_440GX) || \ 116 defined(CONFIG_460EX) || defined(CONFIG_460GT) 117 int bi_phynum[4]; /* Determines phy mapping */ 118 int bi_phymode[4]; /* Determines phy mode */ 119 #elif defined(CONFIG_405EP) || defined(CONFIG_405EX) || defined(CONFIG_440) 120 int bi_phynum[2]; /* Determines phy mapping */ 121 int bi_phymode[2]; /* Determines phy mode */ 122 #else 123 int bi_phynum[1]; /* Determines phy mapping */ 124 int bi_phymode[1]; /* Determines phy mode */ 125 #endif 126 #endif /* defined(CONFIG_4xx) */ 127 ulong bi_arch_number; /* unique id for this board */ 128 ulong bi_boot_params; /* where this board expects params */ 129 #ifdef CONFIG_NR_DRAM_BANKS 130 struct { /* RAM configuration */ 131 ulong start; 132 ulong size; 133 } bi_dram[CONFIG_NR_DRAM_BANKS]; 134 #endif /* CONFIG_NR_DRAM_BANKS */ 135 } bd_t; 136 137 #endif /* __ASSEMBLY__ */ 138 139 #endif /* __ASM_GENERIC_U_BOOT_H__ */ 140