169d59b47SSimon Glass /* 269d59b47SSimon Glass * Copyright (c) 2011 The Chromium OS Authors. 369d59b47SSimon Glass * 469d59b47SSimon Glass * (C) Copyright 2000 - 2002 569d59b47SSimon Glass * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 669d59b47SSimon Glass * 7*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 869d59b47SSimon Glass ******************************************************************** 969d59b47SSimon Glass * NOTE: This header file defines an interface to U-Boot. Including 1069d59b47SSimon Glass * this (unmodified) header file in another file is considered normal 1169d59b47SSimon Glass * use of U-Boot, and does *not* fall under the heading of "derived 1269d59b47SSimon Glass * work". 1369d59b47SSimon Glass ******************************************************************** 1469d59b47SSimon Glass */ 1569d59b47SSimon Glass 1669d59b47SSimon Glass #ifndef __ASM_GENERIC_U_BOOT_H__ 1769d59b47SSimon Glass #define __ASM_GENERIC_U_BOOT_H__ 1869d59b47SSimon Glass 1969d59b47SSimon Glass /* 2069d59b47SSimon Glass * Board information passed to Linux kernel from U-Boot 2169d59b47SSimon Glass * 2269d59b47SSimon Glass * include/asm-ppc/u-boot.h 2369d59b47SSimon Glass */ 2469d59b47SSimon Glass 2569d59b47SSimon Glass #ifndef __ASSEMBLY__ 2669d59b47SSimon Glass 2769d59b47SSimon Glass typedef struct bd_info { 2869d59b47SSimon Glass unsigned long bi_memstart; /* start of DRAM memory */ 2969d59b47SSimon Glass phys_size_t bi_memsize; /* size of DRAM memory in bytes */ 3069d59b47SSimon Glass unsigned long bi_flashstart; /* start of FLASH memory */ 3169d59b47SSimon Glass unsigned long bi_flashsize; /* size of FLASH memory */ 3269d59b47SSimon Glass unsigned long bi_flashoffset; /* reserved area for startup monitor */ 3369d59b47SSimon Glass unsigned long bi_sramstart; /* start of SRAM memory */ 3469d59b47SSimon Glass unsigned long bi_sramsize; /* size of SRAM memory */ 3569d59b47SSimon Glass #ifdef CONFIG_ARM 3669d59b47SSimon Glass unsigned long bi_arm_freq; /* arm frequency */ 3769d59b47SSimon Glass unsigned long bi_dsp_freq; /* dsp core frequency */ 3869d59b47SSimon Glass unsigned long bi_ddr_freq; /* ddr frequency */ 3969d59b47SSimon Glass #endif 4069d59b47SSimon Glass #if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_8260) \ 4169d59b47SSimon Glass || defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 4269d59b47SSimon Glass unsigned long bi_immr_base; /* base of IMMR register */ 4369d59b47SSimon Glass #endif 4469d59b47SSimon Glass #if defined(CONFIG_MPC5xxx) 4569d59b47SSimon Glass unsigned long bi_mbar_base; /* base of internal registers */ 4669d59b47SSimon Glass #endif 4769d59b47SSimon Glass #if defined(CONFIG_MPC83xx) 4869d59b47SSimon Glass unsigned long bi_immrbar; 4969d59b47SSimon Glass #endif 5069d59b47SSimon Glass unsigned long bi_bootflags; /* boot / reboot flag (Unused) */ 5169d59b47SSimon Glass unsigned long bi_ip_addr; /* IP Address */ 5269d59b47SSimon Glass unsigned char bi_enetaddr[6]; /* OLD: see README.enetaddr */ 5369d59b47SSimon Glass unsigned short bi_ethspeed; /* Ethernet speed in Mbps */ 5469d59b47SSimon Glass unsigned long bi_intfreq; /* Internal Freq, in MHz */ 5569d59b47SSimon Glass unsigned long bi_busfreq; /* Bus Freq, in MHz */ 5669d59b47SSimon Glass #if defined(CONFIG_CPM2) 5769d59b47SSimon Glass unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */ 5869d59b47SSimon Glass unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */ 5969d59b47SSimon Glass unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */ 6069d59b47SSimon Glass unsigned long bi_vco; /* VCO Out from PLL, in MHz */ 6169d59b47SSimon Glass #endif 6269d59b47SSimon Glass #if defined(CONFIG_MPC512X) 6369d59b47SSimon Glass unsigned long bi_ipsfreq; /* IPS Bus Freq, in MHz */ 6469d59b47SSimon Glass #endif /* CONFIG_MPC512X */ 6569d59b47SSimon Glass #if defined(CONFIG_MPC5xxx) 6669d59b47SSimon Glass unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */ 6769d59b47SSimon Glass unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */ 6869d59b47SSimon Glass #endif 6969d59b47SSimon Glass unsigned int bi_baudrate; /* Console Baudrate */ 7069d59b47SSimon Glass #if defined(CONFIG_405) || \ 7169d59b47SSimon Glass defined(CONFIG_405GP) || \ 7269d59b47SSimon Glass defined(CONFIG_405CR) || \ 7369d59b47SSimon Glass defined(CONFIG_405EP) || \ 7469d59b47SSimon Glass defined(CONFIG_405EZ) || \ 7569d59b47SSimon Glass defined(CONFIG_405EX) || \ 7669d59b47SSimon Glass defined(CONFIG_440) 7769d59b47SSimon Glass unsigned char bi_s_version[4]; /* Version of this structure */ 7869d59b47SSimon Glass unsigned char bi_r_version[32]; /* Version of the ROM (AMCC) */ 7969d59b47SSimon Glass unsigned int bi_procfreq; /* CPU (Internal) Freq, in Hz */ 8069d59b47SSimon Glass unsigned int bi_plb_busfreq; /* PLB Bus speed, in Hz */ 8169d59b47SSimon Glass unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */ 8269d59b47SSimon Glass unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */ 8369d59b47SSimon Glass #endif 8469d59b47SSimon Glass #if defined(CONFIG_HYMOD) 8569d59b47SSimon Glass hymod_conf_t bi_hymod_conf; /* hymod configuration information */ 8669d59b47SSimon Glass #endif 8769d59b47SSimon Glass 8869d59b47SSimon Glass #ifdef CONFIG_HAS_ETH1 8969d59b47SSimon Glass unsigned char bi_enet1addr[6]; /* OLD: see README.enetaddr */ 9069d59b47SSimon Glass #endif 9169d59b47SSimon Glass #ifdef CONFIG_HAS_ETH2 9269d59b47SSimon Glass unsigned char bi_enet2addr[6]; /* OLD: see README.enetaddr */ 9369d59b47SSimon Glass #endif 9469d59b47SSimon Glass #ifdef CONFIG_HAS_ETH3 9569d59b47SSimon Glass unsigned char bi_enet3addr[6]; /* OLD: see README.enetaddr */ 9669d59b47SSimon Glass #endif 9769d59b47SSimon Glass #ifdef CONFIG_HAS_ETH4 9869d59b47SSimon Glass unsigned char bi_enet4addr[6]; /* OLD: see README.enetaddr */ 9969d59b47SSimon Glass #endif 10069d59b47SSimon Glass #ifdef CONFIG_HAS_ETH5 10169d59b47SSimon Glass unsigned char bi_enet5addr[6]; /* OLD: see README.enetaddr */ 10269d59b47SSimon Glass #endif 10369d59b47SSimon Glass 10469d59b47SSimon Glass #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ 10569d59b47SSimon Glass defined(CONFIG_405EZ) || defined(CONFIG_440GX) || \ 10669d59b47SSimon Glass defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ 10769d59b47SSimon Glass defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ 10869d59b47SSimon Glass defined(CONFIG_460EX) || defined(CONFIG_460GT) 10969d59b47SSimon Glass unsigned int bi_opbfreq; /* OPB clock in Hz */ 11069d59b47SSimon Glass int bi_iic_fast[2]; /* Use fast i2c mode */ 11169d59b47SSimon Glass #endif 11269d59b47SSimon Glass #if defined(CONFIG_NX823) 11369d59b47SSimon Glass unsigned char bi_sernum[8]; 11469d59b47SSimon Glass #endif 11569d59b47SSimon Glass #if defined(CONFIG_4xx) 11669d59b47SSimon Glass #if defined(CONFIG_440GX) || \ 11769d59b47SSimon Glass defined(CONFIG_460EX) || defined(CONFIG_460GT) 11869d59b47SSimon Glass int bi_phynum[4]; /* Determines phy mapping */ 11969d59b47SSimon Glass int bi_phymode[4]; /* Determines phy mode */ 12069d59b47SSimon Glass #elif defined(CONFIG_405EP) || defined(CONFIG_405EX) || defined(CONFIG_440) 12169d59b47SSimon Glass int bi_phynum[2]; /* Determines phy mapping */ 12269d59b47SSimon Glass int bi_phymode[2]; /* Determines phy mode */ 12369d59b47SSimon Glass #else 12469d59b47SSimon Glass int bi_phynum[1]; /* Determines phy mapping */ 12569d59b47SSimon Glass int bi_phymode[1]; /* Determines phy mode */ 12669d59b47SSimon Glass #endif 12769d59b47SSimon Glass #endif /* defined(CONFIG_4xx) */ 12869d59b47SSimon Glass ulong bi_arch_number; /* unique id for this board */ 12969d59b47SSimon Glass ulong bi_boot_params; /* where this board expects params */ 13069d59b47SSimon Glass #ifdef CONFIG_NR_DRAM_BANKS 13169d59b47SSimon Glass struct { /* RAM configuration */ 13269d59b47SSimon Glass ulong start; 13369d59b47SSimon Glass ulong size; 13469d59b47SSimon Glass } bi_dram[CONFIG_NR_DRAM_BANKS]; 13569d59b47SSimon Glass #endif /* CONFIG_NR_DRAM_BANKS */ 13669d59b47SSimon Glass } bd_t; 13769d59b47SSimon Glass 13869d59b47SSimon Glass #endif /* __ASSEMBLY__ */ 13969d59b47SSimon Glass 14069d59b47SSimon Glass #endif /* __ASM_GENERIC_U_BOOT_H__ */ 141