1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 269d59b47SSimon Glass /* 369d59b47SSimon Glass * Copyright (c) 2011 The Chromium OS Authors. 469d59b47SSimon Glass * 569d59b47SSimon Glass * (C) Copyright 2000 - 2002 669d59b47SSimon Glass * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 769d59b47SSimon Glass ******************************************************************** 869d59b47SSimon Glass * NOTE: This header file defines an interface to U-Boot. Including 969d59b47SSimon Glass * this (unmodified) header file in another file is considered normal 1069d59b47SSimon Glass * use of U-Boot, and does *not* fall under the heading of "derived 1169d59b47SSimon Glass * work". 1269d59b47SSimon Glass ******************************************************************** 1369d59b47SSimon Glass */ 1469d59b47SSimon Glass 1569d59b47SSimon Glass #ifndef __ASM_GENERIC_U_BOOT_H__ 1669d59b47SSimon Glass #define __ASM_GENERIC_U_BOOT_H__ 1769d59b47SSimon Glass 1869d59b47SSimon Glass /* 1969d59b47SSimon Glass * Board information passed to Linux kernel from U-Boot 2069d59b47SSimon Glass * 2169d59b47SSimon Glass * include/asm-ppc/u-boot.h 2269d59b47SSimon Glass */ 2369d59b47SSimon Glass 2469d59b47SSimon Glass #ifndef __ASSEMBLY__ 2569d59b47SSimon Glass 2669d59b47SSimon Glass typedef struct bd_info { 2769d59b47SSimon Glass unsigned long bi_memstart; /* start of DRAM memory */ 2869d59b47SSimon Glass phys_size_t bi_memsize; /* size of DRAM memory in bytes */ 2969d59b47SSimon Glass unsigned long bi_flashstart; /* start of FLASH memory */ 3069d59b47SSimon Glass unsigned long bi_flashsize; /* size of FLASH memory */ 3169d59b47SSimon Glass unsigned long bi_flashoffset; /* reserved area for startup monitor */ 3269d59b47SSimon Glass unsigned long bi_sramstart; /* start of SRAM memory */ 3369d59b47SSimon Glass unsigned long bi_sramsize; /* size of SRAM memory */ 3469d59b47SSimon Glass #ifdef CONFIG_ARM 3569d59b47SSimon Glass unsigned long bi_arm_freq; /* arm frequency */ 3669d59b47SSimon Glass unsigned long bi_dsp_freq; /* dsp core frequency */ 3769d59b47SSimon Glass unsigned long bi_ddr_freq; /* ddr frequency */ 3869d59b47SSimon Glass #endif 39ee1e600cSChristophe Leroy #if defined(CONFIG_MPC8xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 4069d59b47SSimon Glass unsigned long bi_immr_base; /* base of IMMR register */ 4169d59b47SSimon Glass #endif 42064b55cfSHeiko Schocher #if defined(CONFIG_M68K) 4369d59b47SSimon Glass unsigned long bi_mbar_base; /* base of internal registers */ 4469d59b47SSimon Glass #endif 4569d59b47SSimon Glass #if defined(CONFIG_MPC83xx) 4669d59b47SSimon Glass unsigned long bi_immrbar; 4769d59b47SSimon Glass #endif 4869d59b47SSimon Glass unsigned long bi_bootflags; /* boot / reboot flag (Unused) */ 4969d59b47SSimon Glass unsigned long bi_ip_addr; /* IP Address */ 5069d59b47SSimon Glass unsigned char bi_enetaddr[6]; /* OLD: see README.enetaddr */ 5169d59b47SSimon Glass unsigned short bi_ethspeed; /* Ethernet speed in Mbps */ 5269d59b47SSimon Glass unsigned long bi_intfreq; /* Internal Freq, in MHz */ 5369d59b47SSimon Glass unsigned long bi_busfreq; /* Bus Freq, in MHz */ 5469d59b47SSimon Glass #if defined(CONFIG_CPM2) 5569d59b47SSimon Glass unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */ 5669d59b47SSimon Glass unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */ 5769d59b47SSimon Glass unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */ 5869d59b47SSimon Glass unsigned long bi_vco; /* VCO Out from PLL, in MHz */ 5969d59b47SSimon Glass #endif 60064b55cfSHeiko Schocher #if defined(CONFIG_M68K) 6169d59b47SSimon Glass unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */ 6269d59b47SSimon Glass unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */ 6369d59b47SSimon Glass #endif 641313db48SAlison Wang #if defined(CONFIG_EXTRA_CLOCK) 651313db48SAlison Wang unsigned long bi_inpfreq; /* input Freq in MHz */ 661313db48SAlison Wang unsigned long bi_vcofreq; /* vco Freq in MHz */ 671313db48SAlison Wang unsigned long bi_flbfreq; /* Flexbus Freq in MHz */ 681313db48SAlison Wang #endif 6969d59b47SSimon Glass 7069d59b47SSimon Glass #ifdef CONFIG_HAS_ETH1 7169d59b47SSimon Glass unsigned char bi_enet1addr[6]; /* OLD: see README.enetaddr */ 7269d59b47SSimon Glass #endif 7369d59b47SSimon Glass #ifdef CONFIG_HAS_ETH2 7469d59b47SSimon Glass unsigned char bi_enet2addr[6]; /* OLD: see README.enetaddr */ 7569d59b47SSimon Glass #endif 7669d59b47SSimon Glass #ifdef CONFIG_HAS_ETH3 7769d59b47SSimon Glass unsigned char bi_enet3addr[6]; /* OLD: see README.enetaddr */ 7869d59b47SSimon Glass #endif 7969d59b47SSimon Glass #ifdef CONFIG_HAS_ETH4 8069d59b47SSimon Glass unsigned char bi_enet4addr[6]; /* OLD: see README.enetaddr */ 8169d59b47SSimon Glass #endif 8269d59b47SSimon Glass #ifdef CONFIG_HAS_ETH5 8369d59b47SSimon Glass unsigned char bi_enet5addr[6]; /* OLD: see README.enetaddr */ 8469d59b47SSimon Glass #endif 8569d59b47SSimon Glass 8669d59b47SSimon Glass ulong bi_arch_number; /* unique id for this board */ 8769d59b47SSimon Glass ulong bi_boot_params; /* where this board expects params */ 8869d59b47SSimon Glass #ifdef CONFIG_NR_DRAM_BANKS 8969d59b47SSimon Glass struct { /* RAM configuration */ 90715f599fSBin Meng phys_addr_t start; 91715f599fSBin Meng phys_size_t size; 9269d59b47SSimon Glass } bi_dram[CONFIG_NR_DRAM_BANKS]; 9369d59b47SSimon Glass #endif /* CONFIG_NR_DRAM_BANKS */ 9469d59b47SSimon Glass } bd_t; 9569d59b47SSimon Glass 9669d59b47SSimon Glass #endif /* __ASSEMBLY__ */ 9769d59b47SSimon Glass 9869d59b47SSimon Glass #endif /* __ASM_GENERIC_U_BOOT_H__ */ 99