1 /* 2 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. 3 * 4 * See file CREDITS for list of people who contributed to this 5 * project. 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as 9 * published by the Free Software Foundation; either version 2 of 10 * the License, or (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20 * MA 02111-1307 USA 21 */ 22 23 #ifndef _MCD_API_H 24 #define _MCD_API_H 25 26 /* Turn Execution Unit tasks ON (#define) or OFF (#undef) */ 27 #undef MCD_INCLUDE_EU 28 29 /* Number of DMA channels */ 30 #define NCHANNELS 16 31 32 /* Total number of variants */ 33 #ifdef MCD_INCLUDE_EU 34 #define NUMOFVARIANTS 6 35 #else 36 #define NUMOFVARIANTS 4 37 #endif 38 39 /* Define sizes of the various tables */ 40 #define TASK_TABLE_SIZE (NCHANNELS*32) 41 #define VAR_TAB_SIZE (128) 42 #define CONTEXT_SAVE_SIZE (128) 43 #define FUNCDESC_TAB_SIZE (256) 44 45 #ifdef MCD_INCLUDE_EU 46 #define FUNCDESC_TAB_NUM 16 47 #else 48 #define FUNCDESC_TAB_NUM 1 49 #endif 50 51 #ifndef DEFINESONLY 52 53 /* Portability typedefs */ 54 #if 1 55 #include "common.h" 56 #else 57 #ifndef s32 58 typedef int s32; 59 #endif 60 #ifndef u32 61 typedef unsigned int u32; 62 #endif 63 #ifndef s16 64 typedef short s16; 65 #endif 66 #ifndef u16 67 typedef unsigned short u16; 68 #endif 69 #ifndef s8 70 typedef char s8; 71 #endif 72 #ifndef u8 73 typedef unsigned char u8; 74 #endif 75 #endif 76 77 /* 78 * These structures represent the internal registers of the 79 * multi-channel DMA 80 */ 81 struct dmaRegs_s { 82 u32 taskbar; /* task table base address */ 83 u32 currPtr; 84 u32 endPtr; 85 u32 varTablePtr; 86 u16 dma_rsvd0; 87 u16 ptdControl; /* ptd control */ 88 u32 intPending; /* interrupt pending */ 89 u32 intMask; /* interrupt mask */ 90 u16 taskControl[16]; /* task control */ 91 u8 priority[32]; /* priority */ 92 u32 initiatorMux; /* initiator mux control */ 93 u32 taskSize0; /* task size control 0. */ 94 u32 taskSize1; /* task size control 1. */ 95 u32 dma_rsvd1; /* reserved */ 96 u32 dma_rsvd2; /* reserved */ 97 u32 debugComp1; /* debug comparator 1 */ 98 u32 debugComp2; /* debug comparator 2 */ 99 u32 debugControl; /* debug control */ 100 u32 debugStatus; /* debug status */ 101 u32 ptdDebug; /* priority task decode debug */ 102 u32 dma_rsvd3[31]; /* reserved */ 103 }; 104 typedef volatile struct dmaRegs_s dmaRegs; 105 106 #endif 107 108 /* PTD contrl reg bits */ 109 #define PTD_CTL_TSK_PRI 0x8000 110 #define PTD_CTL_COMM_PREFETCH 0x0001 111 112 /* Task Control reg bits and field masks */ 113 #define TASK_CTL_EN 0x8000 114 #define TASK_CTL_VALID 0x4000 115 #define TASK_CTL_ALWAYS 0x2000 116 #define TASK_CTL_INIT_MASK 0x1f00 117 #define TASK_CTL_ASTRT 0x0080 118 #define TASK_CTL_HIPRITSKEN 0x0040 119 #define TASK_CTL_HLDINITNUM 0x0020 120 #define TASK_CTL_ASTSKNUM_MASK 0x000f 121 122 /* Priority reg bits and field masks */ 123 #define PRIORITY_HLD 0x80 124 #define PRIORITY_PRI_MASK 0x07 125 126 /* Debug Control reg bits and field masks */ 127 #define DBG_CTL_BLOCK_TASKS_MASK 0xffff0000 128 #define DBG_CTL_AUTO_ARM 0x00008000 129 #define DBG_CTL_BREAK 0x00004000 130 #define DBG_CTL_COMP1_TYP_MASK 0x00003800 131 #define DBG_CTL_COMP2_TYP_MASK 0x00000070 132 #define DBG_CTL_EXT_BREAK 0x00000004 133 #define DBG_CTL_INT_BREAK 0x00000002 134 135 /* 136 * PTD Debug reg selector addresses 137 * This reg must be written with a value to show the contents of 138 * one of the desired internal register. 139 */ 140 #define PTD_DBG_REQ 0x00 /* shows the state of 31 initiators */ 141 #define PTD_DBG_TSK_VLD_INIT 0x01 /* shows which 16 tasks are valid and 142 have initiators asserted */ 143 144 /* General return values */ 145 #define MCD_OK 0 146 #define MCD_ERROR -1 147 #define MCD_TABLE_UNALIGNED -2 148 #define MCD_CHANNEL_INVALID -3 149 150 /* MCD_initDma input flags */ 151 #define MCD_RELOC_TASKS 0x00000001 152 #define MCD_NO_RELOC_TASKS 0x00000000 153 #define MCD_COMM_PREFETCH_EN 0x00000002 /* MCF547x/548x ONLY */ 154 155 /* 156 * MCD_dmaStatus Status Values for each channel: 157 * MCD_NO_DMA - No DMA has been requested since reset 158 * MCD_IDLE - DMA active, but the initiator is currently inactive 159 * MCD_RUNNING - DMA active, and the initiator is currently active 160 * MCD_PAUSED - DMA active but it is currently paused 161 * MCD_HALTED - the most recent DMA has been killed with MCD_killTask() 162 * MCD_DONE - the most recent DMA has completed 163 */ 164 #define MCD_NO_DMA 1 165 #define MCD_IDLE 2 166 #define MCD_RUNNING 3 167 #define MCD_PAUSED 4 168 #define MCD_HALTED 5 169 #define MCD_DONE 6 170 171 /* MCD_startDma parameter defines */ 172 173 /* Constants for the funcDesc parameter */ 174 /* 175 * MCD_NO_BYTE_SWAP - to disable byte swapping 176 * MCD_BYTE_REVERSE - to reverse the bytes of each u32 of the DMAed data 177 * MCD_U16_REVERSE - to reverse the 16-bit halves of each 32-bit data 178 * value being DMAed 179 * MCD_U16_BYTE_REVERSE - to reverse the byte halves of each 16-bit half of 180 * each 32-bit data value DMAed 181 * MCD_NO_BIT_REV - do not reverse the bits of each byte DMAed 182 * MCD_BIT_REV - reverse the bits of each byte DMAed 183 * MCD_CRC16 - to perform CRC-16 on DMAed data 184 * MCD_CRCCCITT - to perform CRC-CCITT on DMAed data 185 * MCD_CRC32 - to perform CRC-32 on DMAed data 186 * MCD_CSUMINET - to perform internet checksums on DMAed data 187 * MCD_NO_CSUM - to perform no checksumming 188 */ 189 #define MCD_NO_BYTE_SWAP 0x00045670 190 #define MCD_BYTE_REVERSE 0x00076540 191 #define MCD_U16_REVERSE 0x00067450 192 #define MCD_U16_BYTE_REVERSE 0x00054760 193 #define MCD_NO_BIT_REV 0x00000000 194 #define MCD_BIT_REV 0x00088880 195 /* CRCing: */ 196 #define MCD_CRC16 0xc0100000 197 #define MCD_CRCCCITT 0xc0200000 198 #define MCD_CRC32 0xc0300000 199 #define MCD_CSUMINET 0xc0400000 200 #define MCD_NO_CSUM 0xa0000000 201 202 #define MCD_FUNC_NOEU1 (MCD_NO_BYTE_SWAP | MCD_NO_BIT_REV | \ 203 MCD_NO_CSUM) 204 #define MCD_FUNC_NOEU2 (MCD_NO_BYTE_SWAP | MCD_NO_CSUM) 205 206 /* Constants for the flags parameter */ 207 #define MCD_TT_FLAGS_RL 0x00000001 /* Read line */ 208 #define MCD_TT_FLAGS_CW 0x00000002 /* Combine Writes */ 209 #define MCD_TT_FLAGS_SP 0x00000004 /* MCF547x/548x ONLY */ 210 #define MCD_TT_FLAGS_MASK 0x000000ff 211 #define MCD_TT_FLAGS_DEF (MCD_TT_FLAGS_RL | MCD_TT_FLAGS_CW) 212 213 #define MCD_SINGLE_DMA 0x00000100 /* Unchained DMA */ 214 #define MCD_CHAIN_DMA /* TBD */ 215 #define MCD_EU_DMA /* TBD */ 216 #define MCD_FECTX_DMA 0x00001000 /* FEC TX ring DMA */ 217 #define MCD_FECRX_DMA 0x00002000 /* FEC RX ring DMA */ 218 219 /* these flags are valid for MCD_startDma and the chained buffer descriptors */ 220 /* 221 * MCD_BUF_READY - indicates that this buf is now under the DMA's ctrl 222 * MCD_WRAP - to tell the FEC Dmas to wrap to the first BD 223 * MCD_INTERRUPT - to generate an interrupt after completion of the DMA 224 * MCD_END_FRAME - tell the DMA to end the frame when transferring 225 * last byte of data in buffer 226 * MCD_CRC_RESTART - to empty out the accumulated checksum prior to 227 * performing the DMA 228 */ 229 #define MCD_BUF_READY 0x80000000 230 #define MCD_WRAP 0x20000000 231 #define MCD_INTERRUPT 0x10000000 232 #define MCD_END_FRAME 0x08000000 233 #define MCD_CRC_RESTART 0x40000000 234 235 /* Defines for the FEC buffer descriptor control/status word*/ 236 #define MCD_FEC_BUF_READY 0x8000 237 #define MCD_FEC_WRAP 0x2000 238 #define MCD_FEC_INTERRUPT 0x1000 239 #define MCD_FEC_END_FRAME 0x0800 240 241 /* Defines for general intuitiveness */ 242 243 #define MCD_TRUE 1 244 #define MCD_FALSE 0 245 246 /* Three different cases for destination and source. */ 247 #define MINUS1 -1 248 #define ZERO 0 249 #define PLUS1 1 250 251 #ifndef DEFINESONLY 252 253 /* Task Table Entry struct*/ 254 typedef struct { 255 u32 TDTstart; /* task descriptor table start */ 256 u32 TDTend; /* task descriptor table end */ 257 u32 varTab; /* variable table start */ 258 u32 FDTandFlags; /* function descriptor table start & flags */ 259 volatile u32 descAddrAndStatus; 260 volatile u32 modifiedVarTab; 261 u32 contextSaveSpace; /* context save space start */ 262 u32 literalBases; 263 } TaskTableEntry; 264 265 /* Chained buffer descriptor: 266 * flags - flags describing the DMA 267 * csumResult - checksum performed since last checksum reset 268 * srcAddr - the address to move data from 269 * destAddr - the address to move data to 270 * lastDestAddr - the last address written to 271 * dmaSize - the no of bytes to xfer independent of the xfer sz 272 * next - next buffer descriptor in chain 273 * info - private info about this descriptor; DMA does not affect it 274 */ 275 typedef volatile struct MCD_bufDesc_struct MCD_bufDesc; 276 struct MCD_bufDesc_struct { 277 u32 flags; 278 u32 csumResult; 279 s8 *srcAddr; 280 s8 *destAddr; 281 s8 *lastDestAddr; 282 u32 dmaSize; 283 MCD_bufDesc *next; 284 u32 info; 285 }; 286 287 /* Progress Query struct: 288 * lastSrcAddr - the most-recent or last, post-increment source address 289 * lastDestAddr - the most-recent or last, post-increment destination address 290 * dmaSize - the amount of data transferred for the current buffer 291 * currBufDesc - pointer to the current buffer descriptor being DMAed 292 */ 293 294 typedef volatile struct MCD_XferProg_struct { 295 s8 *lastSrcAddr; 296 s8 *lastDestAddr; 297 u32 dmaSize; 298 MCD_bufDesc *currBufDesc; 299 } MCD_XferProg; 300 301 /* FEC buffer descriptor */ 302 typedef volatile struct MCD_bufDescFec_struct { 303 u16 statCtrl; 304 u16 length; 305 u32 dataPointer; 306 } MCD_bufDescFec; 307 308 /*************************************************************************/ 309 /* API function Prototypes - see MCD_dmaApi.c for further notes */ 310 311 /* MCD_startDma starts a particular kind of DMA: 312 * srcAddr - the channel on which to run the DMA 313 * srcIncr - the address to move data from, or buffer-descriptor address 314 * destAddr - the amount to increment the source address per transfer 315 * destIncr - the address to move data to 316 * dmaSize - the amount to increment the destination address per transfer 317 * xferSize - the number bytes in of each data movement (1, 2, or 4) 318 * initiator - what device initiates the DMA 319 * priority - priority of the DMA 320 * flags - flags describing the DMA 321 * funcDesc - description of byte swapping, bit swapping, and CRC actions 322 */ 323 int MCD_startDma(int channel, s8 * srcAddr, s16 srcIncr, s8 * destAddr, 324 s16 destIncr, u32 dmaSize, u32 xferSize, u32 initiator, 325 int priority, u32 flags, u32 funcDesc); 326 327 /* 328 * MCD_initDma() initializes the DMA API by setting up a pointer to the DMA 329 * registers, relocating and creating the appropriate task structures, and 330 * setting up some global settings 331 */ 332 int MCD_initDma(dmaRegs * sDmaBarAddr, void *taskTableDest, u32 flags); 333 334 /* MCD_dmaStatus() returns the status of the DMA on the requested channel. */ 335 int MCD_dmaStatus(int channel); 336 337 /* MCD_XferProgrQuery() returns progress of DMA on requested channel */ 338 int MCD_XferProgrQuery(int channel, MCD_XferProg * progRep); 339 340 /* 341 * MCD_killDma() halts the DMA on the requested channel, without any 342 * intention of resuming the DMA. 343 */ 344 int MCD_killDma(int channel); 345 346 /* 347 * MCD_continDma() continues a DMA which as stopped due to encountering an 348 * unready buffer descriptor. 349 */ 350 int MCD_continDma(int channel); 351 352 /* 353 * MCD_pauseDma() pauses the DMA on the given channel ( if any DMA is 354 * running on that channel). 355 */ 356 int MCD_pauseDma(int channel); 357 358 /* 359 * MCD_resumeDma() resumes the DMA on a given channel (if any DMA is 360 * running on that channel). 361 */ 362 int MCD_resumeDma(int channel); 363 364 /* MCD_csumQuery provides the checksum/CRC after performing a non-chained DMA */ 365 int MCD_csumQuery(int channel, u32 * csum); 366 367 /* 368 * MCD_getCodeSize provides the packed size required by the microcoded task 369 * and structures. 370 */ 371 int MCD_getCodeSize(void); 372 373 /* 374 * MCD_getVersion provides a pointer to a version string and returns a 375 * version number. 376 */ 377 int MCD_getVersion(char **longVersion); 378 379 /* macro for setting a location in the variable table */ 380 #define MCD_SET_VAR(taskTab,idx,value) ((u32 *)(taskTab)->varTab)[idx] = value 381 /* Note that MCD_SET_VAR() is invoked many times in firing up a DMA function, 382 so I'm avoiding surrounding it with "do {} while(0)" */ 383 384 #endif /* DEFINESONLY */ 385 386 #endif /* _MCD_API_H */ 387