1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+ 27b7ad5c3SSimon Glass /* 37b7ad5c3SSimon Glass * Copyright (c) 2015 Google, Inc 47b7ad5c3SSimon Glass * Copyright 2014 Rockchip Inc. 57b7ad5c3SSimon Glass */ 67b7ad5c3SSimon Glass 77b7ad5c3SSimon Glass #include <common.h> 87b7ad5c3SSimon Glass #include <clk.h> 97b7ad5c3SSimon Glass #include <display.h> 107b7ad5c3SSimon Glass #include <dm.h> 117b7ad5c3SSimon Glass #include <edid.h> 127b7ad5c3SSimon Glass #include <regmap.h> 137b7ad5c3SSimon Glass #include <syscon.h> 147b7ad5c3SSimon Glass #include <video.h> 157b7ad5c3SSimon Glass #include <asm/gpio.h> 167b7ad5c3SSimon Glass #include <asm/hardware.h> 177b7ad5c3SSimon Glass #include <asm/io.h> 187b7ad5c3SSimon Glass #include <asm/arch/clock.h> 197b7ad5c3SSimon Glass #include <asm/arch/edp_rk3288.h> 207b7ad5c3SSimon Glass #include <asm/arch/vop_rk3288.h> 217b7ad5c3SSimon Glass #include <dm/device-internal.h> 227b7ad5c3SSimon Glass #include <dm/uclass-internal.h> 237b7ad5c3SSimon Glass #include <power/regulator.h> 24d46d4047SPhilipp Tomsich #include "rk_vop.h" 257b7ad5c3SSimon Glass 267b7ad5c3SSimon Glass DECLARE_GLOBAL_DATA_PTR; 277b7ad5c3SSimon Glass 28d46d4047SPhilipp Tomsich enum vop_pol { 29d46d4047SPhilipp Tomsich HSYNC_POSITIVE = 0, 30d46d4047SPhilipp Tomsich VSYNC_POSITIVE = 1, 31d46d4047SPhilipp Tomsich DEN_NEGATIVE = 2, 32d46d4047SPhilipp Tomsich DCLK_INVERT = 3 337b7ad5c3SSimon Glass }; 347b7ad5c3SSimon Glass 35d46d4047SPhilipp Tomsich static void rkvop_enable(struct rk3288_vop *regs, ulong fbbase, 36d46d4047SPhilipp Tomsich int fb_bits_per_pixel, 37d46d4047SPhilipp Tomsich const struct display_timing *edid) 387b7ad5c3SSimon Glass { 397b7ad5c3SSimon Glass u32 lb_mode; 407b7ad5c3SSimon Glass u32 rgb_mode; 417b7ad5c3SSimon Glass u32 hactive = edid->hactive.typ; 427b7ad5c3SSimon Glass u32 vactive = edid->vactive.typ; 437b7ad5c3SSimon Glass 447b7ad5c3SSimon Glass writel(V_ACT_WIDTH(hactive - 1) | V_ACT_HEIGHT(vactive - 1), 457b7ad5c3SSimon Glass ®s->win0_act_info); 467b7ad5c3SSimon Glass 477b7ad5c3SSimon Glass writel(V_DSP_XST(edid->hsync_len.typ + edid->hback_porch.typ) | 487b7ad5c3SSimon Glass V_DSP_YST(edid->vsync_len.typ + edid->vback_porch.typ), 497b7ad5c3SSimon Glass ®s->win0_dsp_st); 507b7ad5c3SSimon Glass 517b7ad5c3SSimon Glass writel(V_DSP_WIDTH(hactive - 1) | 527b7ad5c3SSimon Glass V_DSP_HEIGHT(vactive - 1), 537b7ad5c3SSimon Glass ®s->win0_dsp_info); 547b7ad5c3SSimon Glass 557b7ad5c3SSimon Glass clrsetbits_le32(®s->win0_color_key, M_WIN0_KEY_EN | M_WIN0_KEY_COLOR, 567b7ad5c3SSimon Glass V_WIN0_KEY_EN(0) | V_WIN0_KEY_COLOR(0)); 577b7ad5c3SSimon Glass 587b7ad5c3SSimon Glass switch (fb_bits_per_pixel) { 597b7ad5c3SSimon Glass case 16: 607b7ad5c3SSimon Glass rgb_mode = RGB565; 617b7ad5c3SSimon Glass writel(V_RGB565_VIRWIDTH(hactive), ®s->win0_vir); 627b7ad5c3SSimon Glass break; 637b7ad5c3SSimon Glass case 24: 647b7ad5c3SSimon Glass rgb_mode = RGB888; 657b7ad5c3SSimon Glass writel(V_RGB888_VIRWIDTH(hactive), ®s->win0_vir); 667b7ad5c3SSimon Glass break; 677b7ad5c3SSimon Glass case 32: 687b7ad5c3SSimon Glass default: 697b7ad5c3SSimon Glass rgb_mode = ARGB8888; 707b7ad5c3SSimon Glass writel(V_ARGB888_VIRWIDTH(hactive), ®s->win0_vir); 717b7ad5c3SSimon Glass break; 727b7ad5c3SSimon Glass } 737b7ad5c3SSimon Glass 747b7ad5c3SSimon Glass if (hactive > 2560) 757b7ad5c3SSimon Glass lb_mode = LB_RGB_3840X2; 767b7ad5c3SSimon Glass else if (hactive > 1920) 777b7ad5c3SSimon Glass lb_mode = LB_RGB_2560X4; 787b7ad5c3SSimon Glass else if (hactive > 1280) 797b7ad5c3SSimon Glass lb_mode = LB_RGB_1920X5; 807b7ad5c3SSimon Glass else 817b7ad5c3SSimon Glass lb_mode = LB_RGB_1280X8; 827b7ad5c3SSimon Glass 837b7ad5c3SSimon Glass clrsetbits_le32(®s->win0_ctrl0, 847b7ad5c3SSimon Glass M_WIN0_LB_MODE | M_WIN0_DATA_FMT | M_WIN0_EN, 857b7ad5c3SSimon Glass V_WIN0_LB_MODE(lb_mode) | V_WIN0_DATA_FMT(rgb_mode) | 867b7ad5c3SSimon Glass V_WIN0_EN(1)); 877b7ad5c3SSimon Glass 887b7ad5c3SSimon Glass writel(fbbase, ®s->win0_yrgb_mst); 897b7ad5c3SSimon Glass writel(0x01, ®s->reg_cfg_done); /* enable reg config */ 907b7ad5c3SSimon Glass } 917b7ad5c3SSimon Glass 92d46d4047SPhilipp Tomsich static void rkvop_set_pin_polarity(struct udevice *dev, 93d46d4047SPhilipp Tomsich enum vop_modes mode, u32 polarity) 947b7ad5c3SSimon Glass { 95d46d4047SPhilipp Tomsich struct rkvop_driverdata *ops = 96d46d4047SPhilipp Tomsich (struct rkvop_driverdata *)dev_get_driver_data(dev); 97d46d4047SPhilipp Tomsich 98d46d4047SPhilipp Tomsich if (ops->set_pin_polarity) 99d46d4047SPhilipp Tomsich ops->set_pin_polarity(dev, mode, polarity); 100d46d4047SPhilipp Tomsich } 101d46d4047SPhilipp Tomsich 102d46d4047SPhilipp Tomsich static void rkvop_enable_output(struct udevice *dev, enum vop_modes mode) 103d46d4047SPhilipp Tomsich { 104d46d4047SPhilipp Tomsich struct rk_vop_priv *priv = dev_get_priv(dev); 105d46d4047SPhilipp Tomsich struct rk3288_vop *regs = priv->regs; 106d46d4047SPhilipp Tomsich 1076b5a09aaSSimon Glass /* remove from standby */ 1086b5a09aaSSimon Glass clrbits_le32(®s->sys_ctrl, V_STANDBY_EN(1)); 1096b5a09aaSSimon Glass 110d46d4047SPhilipp Tomsich switch (mode) { 111d46d4047SPhilipp Tomsich case VOP_MODE_HDMI: 112d46d4047SPhilipp Tomsich clrsetbits_le32(®s->sys_ctrl, M_ALL_OUT_EN, 113d46d4047SPhilipp Tomsich V_HDMI_OUT_EN(1)); 114d46d4047SPhilipp Tomsich break; 115d46d4047SPhilipp Tomsich 116d46d4047SPhilipp Tomsich case VOP_MODE_EDP: 117d46d4047SPhilipp Tomsich clrsetbits_le32(®s->sys_ctrl, M_ALL_OUT_EN, 118d46d4047SPhilipp Tomsich V_EDP_OUT_EN(1)); 119d46d4047SPhilipp Tomsich break; 120d46d4047SPhilipp Tomsich 121d46d4047SPhilipp Tomsich case VOP_MODE_LVDS: 122d46d4047SPhilipp Tomsich clrsetbits_le32(®s->sys_ctrl, M_ALL_OUT_EN, 123d46d4047SPhilipp Tomsich V_RGB_OUT_EN(1)); 124d46d4047SPhilipp Tomsich break; 125d46d4047SPhilipp Tomsich 126d46d4047SPhilipp Tomsich case VOP_MODE_MIPI: 127d46d4047SPhilipp Tomsich clrsetbits_le32(®s->sys_ctrl, M_ALL_OUT_EN, 128d46d4047SPhilipp Tomsich V_MIPI_OUT_EN(1)); 129d46d4047SPhilipp Tomsich break; 130d46d4047SPhilipp Tomsich 131d46d4047SPhilipp Tomsich default: 132d46d4047SPhilipp Tomsich debug("%s: unsupported output mode %x\n", __func__, mode); 133d46d4047SPhilipp Tomsich } 134d46d4047SPhilipp Tomsich } 135d46d4047SPhilipp Tomsich 136d46d4047SPhilipp Tomsich static void rkvop_mode_set(struct udevice *dev, 137d46d4047SPhilipp Tomsich const struct display_timing *edid, 138d46d4047SPhilipp Tomsich enum vop_modes mode) 139d46d4047SPhilipp Tomsich { 140d46d4047SPhilipp Tomsich struct rk_vop_priv *priv = dev_get_priv(dev); 141d46d4047SPhilipp Tomsich struct rk3288_vop *regs = priv->regs; 142d46d4047SPhilipp Tomsich struct rkvop_driverdata *data = 143d46d4047SPhilipp Tomsich (struct rkvop_driverdata *)dev_get_driver_data(dev); 144d46d4047SPhilipp Tomsich 1457b7ad5c3SSimon Glass u32 hactive = edid->hactive.typ; 1467b7ad5c3SSimon Glass u32 vactive = edid->vactive.typ; 1477b7ad5c3SSimon Glass u32 hsync_len = edid->hsync_len.typ; 1487b7ad5c3SSimon Glass u32 hback_porch = edid->hback_porch.typ; 1497b7ad5c3SSimon Glass u32 vsync_len = edid->vsync_len.typ; 1507b7ad5c3SSimon Glass u32 vback_porch = edid->vback_porch.typ; 1517b7ad5c3SSimon Glass u32 hfront_porch = edid->hfront_porch.typ; 1527b7ad5c3SSimon Glass u32 vfront_porch = edid->vfront_porch.typ; 15385307835SJacob Chen int mode_flags; 154d46d4047SPhilipp Tomsich u32 pin_polarity; 1557b7ad5c3SSimon Glass 156d46d4047SPhilipp Tomsich pin_polarity = BIT(DCLK_INVERT); 157d46d4047SPhilipp Tomsich if (edid->flags & DISPLAY_FLAGS_HSYNC_HIGH) 158d46d4047SPhilipp Tomsich pin_polarity |= BIT(HSYNC_POSITIVE); 159d46d4047SPhilipp Tomsich if (edid->flags & DISPLAY_FLAGS_VSYNC_HIGH) 160d46d4047SPhilipp Tomsich pin_polarity |= BIT(VSYNC_POSITIVE); 1617b7ad5c3SSimon Glass 162d46d4047SPhilipp Tomsich rkvop_set_pin_polarity(dev, mode, pin_polarity); 163d46d4047SPhilipp Tomsich rkvop_enable_output(dev, mode); 16485307835SJacob Chen 165d46d4047SPhilipp Tomsich mode_flags = 0; /* RGB888 */ 166d46d4047SPhilipp Tomsich if ((data->features & VOP_FEATURE_OUTPUT_10BIT) && 167d46d4047SPhilipp Tomsich (mode == VOP_MODE_HDMI || mode == VOP_MODE_EDP)) 168d46d4047SPhilipp Tomsich mode_flags = 15; /* RGBaaa */ 1697b7ad5c3SSimon Glass 170d46d4047SPhilipp Tomsich clrsetbits_le32(®s->dsp_ctrl0, M_DSP_OUT_MODE, 171d46d4047SPhilipp Tomsich V_DSP_OUT_MODE(mode_flags)); 1727b7ad5c3SSimon Glass 1737b7ad5c3SSimon Glass writel(V_HSYNC(hsync_len) | 1747b7ad5c3SSimon Glass V_HORPRD(hsync_len + hback_porch + hactive + hfront_porch), 1757b7ad5c3SSimon Glass ®s->dsp_htotal_hs_end); 1767b7ad5c3SSimon Glass 1777b7ad5c3SSimon Glass writel(V_HEAP(hsync_len + hback_porch + hactive) | 1787b7ad5c3SSimon Glass V_HASP(hsync_len + hback_porch), 1797b7ad5c3SSimon Glass ®s->dsp_hact_st_end); 1807b7ad5c3SSimon Glass 1817b7ad5c3SSimon Glass writel(V_VSYNC(vsync_len) | 1827b7ad5c3SSimon Glass V_VERPRD(vsync_len + vback_porch + vactive + vfront_porch), 1837b7ad5c3SSimon Glass ®s->dsp_vtotal_vs_end); 1847b7ad5c3SSimon Glass 1857b7ad5c3SSimon Glass writel(V_VAEP(vsync_len + vback_porch + vactive)| 1867b7ad5c3SSimon Glass V_VASP(vsync_len + vback_porch), 1877b7ad5c3SSimon Glass ®s->dsp_vact_st_end); 1887b7ad5c3SSimon Glass 1897b7ad5c3SSimon Glass writel(V_HEAP(hsync_len + hback_porch + hactive) | 1907b7ad5c3SSimon Glass V_HASP(hsync_len + hback_porch), 1917b7ad5c3SSimon Glass ®s->post_dsp_hact_info); 1927b7ad5c3SSimon Glass 1937b7ad5c3SSimon Glass writel(V_VAEP(vsync_len + vback_porch + vactive)| 1947b7ad5c3SSimon Glass V_VASP(vsync_len + vback_porch), 1957b7ad5c3SSimon Glass ®s->post_dsp_vact_info); 1967b7ad5c3SSimon Glass 1977b7ad5c3SSimon Glass writel(0x01, ®s->reg_cfg_done); /* enable reg config */ 1987b7ad5c3SSimon Glass } 1997b7ad5c3SSimon Glass 2007b7ad5c3SSimon Glass /** 2017b7ad5c3SSimon Glass * rk_display_init() - Try to enable the given display device 2027b7ad5c3SSimon Glass * 2037b7ad5c3SSimon Glass * This function performs many steps: 2047b7ad5c3SSimon Glass * - Finds the display device being referenced by @ep_node 2057b7ad5c3SSimon Glass * - Puts the VOP's ID into its uclass platform data 2067b7ad5c3SSimon Glass * - Probes the device to set it up 2077b7ad5c3SSimon Glass * - Reads the EDID timing information 2087b7ad5c3SSimon Glass * - Sets up the VOP clocks, etc. for the selected pixel clock and display mode 2097b7ad5c3SSimon Glass * - Enables the display (the display device handles this and will do different 2107b7ad5c3SSimon Glass * things depending on the display type) 2117b7ad5c3SSimon Glass * - Tells the uclass about the display resolution so that the console will 2127b7ad5c3SSimon Glass * appear correctly 2137b7ad5c3SSimon Glass * 2147b7ad5c3SSimon Glass * @dev: VOP device that we want to connect to the display 2157b7ad5c3SSimon Glass * @fbbase: Frame buffer address 2167b7ad5c3SSimon Glass * @ep_node: Device tree node to process - this is the offset of an endpoint 2177b7ad5c3SSimon Glass * node within the VOP's 'port' list. 2187b7ad5c3SSimon Glass * @return 0 if OK, -ve if something went wrong 2197b7ad5c3SSimon Glass */ 2205de0b5a3SPhilipp Tomsich static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node) 2217b7ad5c3SSimon Glass { 2227b7ad5c3SSimon Glass struct video_priv *uc_priv = dev_get_uclass_priv(dev); 2237b7ad5c3SSimon Glass struct rk_vop_priv *priv = dev_get_priv(dev); 2247b7ad5c3SSimon Glass int vop_id, remote_vop_id; 2257b7ad5c3SSimon Glass struct rk3288_vop *regs = priv->regs; 2267b7ad5c3SSimon Glass struct display_timing timing; 2277b7ad5c3SSimon Glass struct udevice *disp; 2285de0b5a3SPhilipp Tomsich int ret; 2295de0b5a3SPhilipp Tomsich u32 remote_phandle; 2307b7ad5c3SSimon Glass struct display_plat *disp_uc_plat; 231135aa950SStephen Warren struct clk clk; 2328aed0d77SEric Gao enum video_log2_bpp l2bpp; 2335de0b5a3SPhilipp Tomsich ofnode remote; 2347b7ad5c3SSimon Glass 2355de0b5a3SPhilipp Tomsich debug("%s(%s, %lu, %s)\n", __func__, 2365de0b5a3SPhilipp Tomsich dev_read_name(dev), fbbase, ofnode_get_name(ep_node)); 2375de0b5a3SPhilipp Tomsich 2385de0b5a3SPhilipp Tomsich vop_id = ofnode_read_s32_default(ep_node, "reg", -1); 2397b7ad5c3SSimon Glass debug("vop_id=%d\n", vop_id); 2405de0b5a3SPhilipp Tomsich ret = ofnode_read_u32(ep_node, "remote-endpoint", &remote_phandle); 2415de0b5a3SPhilipp Tomsich if (ret) 2425de0b5a3SPhilipp Tomsich return ret; 2435de0b5a3SPhilipp Tomsich 2445de0b5a3SPhilipp Tomsich remote = ofnode_get_by_phandle(remote_phandle); 2455de0b5a3SPhilipp Tomsich if (!ofnode_valid(remote)) 2467b7ad5c3SSimon Glass return -EINVAL; 2475de0b5a3SPhilipp Tomsich remote_vop_id = ofnode_read_u32_default(remote, "reg", -1); 2487b7ad5c3SSimon Glass debug("remote vop_id=%d\n", remote_vop_id); 2497b7ad5c3SSimon Glass 2505de0b5a3SPhilipp Tomsich /* 2515de0b5a3SPhilipp Tomsich * The remote-endpoint references into a subnode of the encoder 2525de0b5a3SPhilipp Tomsich * (i.e. HDMI, MIPI, etc.) with the DTS looking something like 2535de0b5a3SPhilipp Tomsich * the following (assume 'hdmi_in_vopl' to be referenced): 2545de0b5a3SPhilipp Tomsich * 2555de0b5a3SPhilipp Tomsich * hdmi: hdmi@ff940000 { 2565de0b5a3SPhilipp Tomsich * ports { 2575de0b5a3SPhilipp Tomsich * hdmi_in: port { 2585de0b5a3SPhilipp Tomsich * hdmi_in_vopb: endpoint@0 { ... }; 2595de0b5a3SPhilipp Tomsich * hdmi_in_vopl: endpoint@1 { ... }; 2605de0b5a3SPhilipp Tomsich * } 2615de0b5a3SPhilipp Tomsich * } 2625de0b5a3SPhilipp Tomsich * } 2635de0b5a3SPhilipp Tomsich * 2645de0b5a3SPhilipp Tomsich * The original code had 3 steps of "walking the parent", but 2655de0b5a3SPhilipp Tomsich * a much better (as in: less likely to break if the DTS 2665de0b5a3SPhilipp Tomsich * changes) way of doing this is to "find the enclosing device 2675de0b5a3SPhilipp Tomsich * of UCLASS_DISPLAY". 2685de0b5a3SPhilipp Tomsich */ 2695de0b5a3SPhilipp Tomsich while (ofnode_valid(remote)) { 2705de0b5a3SPhilipp Tomsich remote = ofnode_get_parent(remote); 2715de0b5a3SPhilipp Tomsich if (!ofnode_valid(remote)) { 2725de0b5a3SPhilipp Tomsich debug("%s(%s): no UCLASS_DISPLAY for remote-endpoint\n", 2735de0b5a3SPhilipp Tomsich __func__, dev_read_name(dev)); 2747b7ad5c3SSimon Glass return -EINVAL; 2757b7ad5c3SSimon Glass } 2767b7ad5c3SSimon Glass 2775de0b5a3SPhilipp Tomsich uclass_find_device_by_ofnode(UCLASS_DISPLAY, remote, &disp); 2785de0b5a3SPhilipp Tomsich if (disp) 2795de0b5a3SPhilipp Tomsich break; 2805de0b5a3SPhilipp Tomsich }; 2817b7ad5c3SSimon Glass 2827b7ad5c3SSimon Glass disp_uc_plat = dev_get_uclass_platdata(disp); 2837b7ad5c3SSimon Glass debug("Found device '%s', disp_uc_priv=%p\n", disp->name, disp_uc_plat); 284987a404aSSimon Glass if (display_in_use(disp)) { 285987a404aSSimon Glass debug(" - device in use\n"); 286987a404aSSimon Glass return -EBUSY; 287987a404aSSimon Glass } 288987a404aSSimon Glass 2897b7ad5c3SSimon Glass disp_uc_plat->source_id = remote_vop_id; 2907b7ad5c3SSimon Glass disp_uc_plat->src_dev = dev; 2917b7ad5c3SSimon Glass 2927b7ad5c3SSimon Glass ret = device_probe(disp); 2937b7ad5c3SSimon Glass if (ret) { 2947b7ad5c3SSimon Glass debug("%s: device '%s' display won't probe (ret=%d)\n", 2957b7ad5c3SSimon Glass __func__, dev->name, ret); 2967b7ad5c3SSimon Glass return ret; 2977b7ad5c3SSimon Glass } 2987b7ad5c3SSimon Glass 2997b7ad5c3SSimon Glass ret = display_read_timing(disp, &timing); 3007b7ad5c3SSimon Glass if (ret) { 3017b7ad5c3SSimon Glass debug("%s: Failed to read timings\n", __func__); 3027b7ad5c3SSimon Glass return ret; 3037b7ad5c3SSimon Glass } 3047b7ad5c3SSimon Glass 3059ed68260SSimon Glass ret = clk_get_by_index(dev, 1, &clk); 306135aa950SStephen Warren if (!ret) 307135aa950SStephen Warren ret = clk_set_rate(&clk, timing.pixelclock.typ); 308e07e5bdeSEric Gao if (IS_ERR_VALUE(ret)) { 3097b7ad5c3SSimon Glass debug("%s: Failed to set pixel clock: ret=%d\n", __func__, ret); 3107b7ad5c3SSimon Glass return ret; 3117b7ad5c3SSimon Glass } 3127b7ad5c3SSimon Glass 3138aed0d77SEric Gao /* Set bitwidth for vop display according to vop mode */ 3148aed0d77SEric Gao switch (vop_id) { 3158aed0d77SEric Gao case VOP_MODE_EDP: 3168aed0d77SEric Gao case VOP_MODE_LVDS: 3178aed0d77SEric Gao l2bpp = VIDEO_BPP16; 3188aed0d77SEric Gao break; 319d46d4047SPhilipp Tomsich case VOP_MODE_HDMI: 3208aed0d77SEric Gao case VOP_MODE_MIPI: 3218aed0d77SEric Gao l2bpp = VIDEO_BPP32; 3228aed0d77SEric Gao break; 3238aed0d77SEric Gao default: 3248aed0d77SEric Gao l2bpp = VIDEO_BPP16; 3258aed0d77SEric Gao } 3267b7ad5c3SSimon Glass 327d46d4047SPhilipp Tomsich rkvop_mode_set(dev, &timing, vop_id); 3287b7ad5c3SSimon Glass rkvop_enable(regs, fbbase, 1 << l2bpp, &timing); 3297b7ad5c3SSimon Glass 3307b7ad5c3SSimon Glass ret = display_enable(disp, 1 << l2bpp, &timing); 3317b7ad5c3SSimon Glass if (ret) 3327b7ad5c3SSimon Glass return ret; 3337b7ad5c3SSimon Glass 3347b7ad5c3SSimon Glass uc_priv->xsize = timing.hactive.typ; 3357b7ad5c3SSimon Glass uc_priv->ysize = timing.vactive.typ; 3367b7ad5c3SSimon Glass uc_priv->bpix = l2bpp; 3377b7ad5c3SSimon Glass debug("fb=%lx, size=%d %d\n", fbbase, uc_priv->xsize, uc_priv->ysize); 3387b7ad5c3SSimon Glass 3397b7ad5c3SSimon Glass return 0; 3407b7ad5c3SSimon Glass } 3417b7ad5c3SSimon Glass 342d46d4047SPhilipp Tomsich void rk_vop_probe_regulators(struct udevice *dev, 343d46d4047SPhilipp Tomsich const char * const *names, int cnt) 344d46d4047SPhilipp Tomsich { 345d46d4047SPhilipp Tomsich int i, ret; 346d46d4047SPhilipp Tomsich const char *name; 347d46d4047SPhilipp Tomsich struct udevice *reg; 348d46d4047SPhilipp Tomsich 349d46d4047SPhilipp Tomsich for (i = 0; i < cnt; ++i) { 350d46d4047SPhilipp Tomsich name = names[i]; 351d46d4047SPhilipp Tomsich debug("%s: probing regulator '%s'\n", dev->name, name); 352d46d4047SPhilipp Tomsich 353d46d4047SPhilipp Tomsich ret = regulator_autoset_by_name(name, ®); 354d46d4047SPhilipp Tomsich if (!ret) 355d46d4047SPhilipp Tomsich ret = regulator_set_enable(reg, true); 356d46d4047SPhilipp Tomsich } 357d46d4047SPhilipp Tomsich } 358d46d4047SPhilipp Tomsich 359d46d4047SPhilipp Tomsich int rk_vop_probe(struct udevice *dev) 3607b7ad5c3SSimon Glass { 3617b7ad5c3SSimon Glass struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 3627b7ad5c3SSimon Glass struct rk_vop_priv *priv = dev_get_priv(dev); 363d46d4047SPhilipp Tomsich int ret = 0; 3645de0b5a3SPhilipp Tomsich ofnode port, node; 3657b7ad5c3SSimon Glass 3667b7ad5c3SSimon Glass /* Before relocation we don't need to do anything */ 3677b7ad5c3SSimon Glass if (!(gd->flags & GD_FLG_RELOC)) 3687b7ad5c3SSimon Glass return 0; 3697b7ad5c3SSimon Glass 3705de0b5a3SPhilipp Tomsich priv->regs = (struct rk3288_vop *)dev_read_addr(dev); 3717b7ad5c3SSimon Glass 3727b7ad5c3SSimon Glass /* 3737b7ad5c3SSimon Glass * Try all the ports until we find one that works. In practice this 3747b7ad5c3SSimon Glass * tries EDP first if available, then HDMI. 375987a404aSSimon Glass * 376987a404aSSimon Glass * Note that rockchip_vop_set_clk() always uses NPLL as the source 377987a404aSSimon Glass * clock so it is currently not possible to use more than one display 378987a404aSSimon Glass * device simultaneously. 3797b7ad5c3SSimon Glass */ 3805de0b5a3SPhilipp Tomsich port = dev_read_subnode(dev, "port"); 3815de0b5a3SPhilipp Tomsich if (!ofnode_valid(port)) { 3825de0b5a3SPhilipp Tomsich debug("%s(%s): 'port' subnode not found\n", 3835de0b5a3SPhilipp Tomsich __func__, dev_read_name(dev)); 3847b7ad5c3SSimon Glass return -EINVAL; 3855de0b5a3SPhilipp Tomsich } 3865de0b5a3SPhilipp Tomsich 3875de0b5a3SPhilipp Tomsich for (node = ofnode_first_subnode(port); 3885de0b5a3SPhilipp Tomsich ofnode_valid(node); 3895de0b5a3SPhilipp Tomsich node = dev_read_next_subnode(node)) { 3908aed0d77SEric Gao ret = rk_display_init(dev, plat->base, node); 3917b7ad5c3SSimon Glass if (ret) 3927b7ad5c3SSimon Glass debug("Device failed: ret=%d\n", ret); 3937b7ad5c3SSimon Glass if (!ret) 3947b7ad5c3SSimon Glass break; 3957b7ad5c3SSimon Glass } 396b55e04a0SSimon Glass video_set_flush_dcache(dev, 1); 3977b7ad5c3SSimon Glass 3987b7ad5c3SSimon Glass return ret; 3997b7ad5c3SSimon Glass } 4007b7ad5c3SSimon Glass 401d46d4047SPhilipp Tomsich int rk_vop_bind(struct udevice *dev) 4027b7ad5c3SSimon Glass { 4037b7ad5c3SSimon Glass struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 4047b7ad5c3SSimon Glass 40589b2b618SPhilipp Tomsich plat->size = 4 * (CONFIG_VIDEO_ROCKCHIP_MAX_XRES * 40689b2b618SPhilipp Tomsich CONFIG_VIDEO_ROCKCHIP_MAX_YRES); 4077b7ad5c3SSimon Glass 4087b7ad5c3SSimon Glass return 0; 4097b7ad5c3SSimon Glass } 410