136602ebaSeric.gao@rock-chips.com /* 236602ebaSeric.gao@rock-chips.com * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd 336602ebaSeric.gao@rock-chips.com * Author: Eric Gao <eric.gao@rock-chips.com> 436602ebaSeric.gao@rock-chips.com * SPDX-License-Identifier: GPL-2.0+ 536602ebaSeric.gao@rock-chips.com */ 636602ebaSeric.gao@rock-chips.com 736602ebaSeric.gao@rock-chips.com #ifndef __RK_MIPI_H 836602ebaSeric.gao@rock-chips.com #define __RK_MIPI_H 936602ebaSeric.gao@rock-chips.com 1036602ebaSeric.gao@rock-chips.com struct rk_mipi_priv { 11*f680a91dSeric.gao@rock-chips.com uintptr_t regs; 1236602ebaSeric.gao@rock-chips.com void *grf; 1336602ebaSeric.gao@rock-chips.com struct udevice *panel; 1436602ebaSeric.gao@rock-chips.com struct mipi_dsi *dsi; 1536602ebaSeric.gao@rock-chips.com u32 ref_clk; 1636602ebaSeric.gao@rock-chips.com u32 sys_clk; 1736602ebaSeric.gao@rock-chips.com u32 pix_clk; 1836602ebaSeric.gao@rock-chips.com u32 phy_clk; 1936602ebaSeric.gao@rock-chips.com u32 txbyte_clk; 2036602ebaSeric.gao@rock-chips.com u32 txesc_clk; 2136602ebaSeric.gao@rock-chips.com }; 2236602ebaSeric.gao@rock-chips.com 2336602ebaSeric.gao@rock-chips.com int rk_mipi_read_timing(struct udevice *dev, 2436602ebaSeric.gao@rock-chips.com struct display_timing *timing); 2536602ebaSeric.gao@rock-chips.com 2636602ebaSeric.gao@rock-chips.com int rk_mipi_dsi_enable(struct udevice *dev, 2736602ebaSeric.gao@rock-chips.com const struct display_timing *timing); 2836602ebaSeric.gao@rock-chips.com 2936602ebaSeric.gao@rock-chips.com int rk_mipi_phy_enable(struct udevice *dev); 3036602ebaSeric.gao@rock-chips.com 3136602ebaSeric.gao@rock-chips.com 3236602ebaSeric.gao@rock-chips.com #endif 33