1*25a9f974SMario Six /* SPDX-License-Identifier: GPL-2.0+ */ 2*25a9f974SMario Six /* 3*25a9f974SMario Six * logicore_dp_tx.h 4*25a9f974SMario Six * 5*25a9f974SMario Six * Driver for XILINX LogiCore DisplayPort v6.1 TX (Source) 6*25a9f974SMario Six * 7*25a9f974SMario Six * (C) Copyright 2016 8*25a9f974SMario Six * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc 9*25a9f974SMario Six */ 10*25a9f974SMario Six 11*25a9f974SMario Six #ifndef __GDSYS_LOGICORE_DP_TX_H__ 12*25a9f974SMario Six #define __GDSYS_LOGICORE_DP_TX_H__ 13*25a9f974SMario Six 14*25a9f974SMario Six /* 15*25a9f974SMario Six * struct logicore_dp_tx_msa - Main Stream Attributes (MSA) 16*25a9f974SMario Six * @pixel_clock_hz: The pixel clock of the stream (in Hz) 17*25a9f974SMario Six * @bits_per_color: Number of bits per color component 18*25a9f974SMario Six * @h_active: Horizontal active resolution (pixels) 19*25a9f974SMario Six * @h_start: Horizontal blank start (in pixels) 20*25a9f974SMario Six * @h_sync_polarity: Horizontal sync polarity 21*25a9f974SMario Six * (0 = negative | 1 = positive) 22*25a9f974SMario Six * @h_sync_width: Horizontal sync width (pixels) 23*25a9f974SMario Six * @h_total: Horizontal total (pixels) 24*25a9f974SMario Six * @v_active: Vertical active resolution (lines) 25*25a9f974SMario Six * @v_start: Vertical blank start (in lines). 26*25a9f974SMario Six * @v_sync_polarity: Vertical sync polarity 27*25a9f974SMario Six * (0 = negative | 1 = positive) 28*25a9f974SMario Six * @v_sync_width: Vertical sync width (lines) 29*25a9f974SMario Six * @v_total: Vertical total (lines) 30*25a9f974SMario Six * @override_user_pixel_width: If true, the value stored for user_pixel_width 31*25a9f974SMario Six * will be used as the pixel width. 32*25a9f974SMario Six * @user_pixel_width: The width of the user data input port. 33*25a9f974SMario Six * 34*25a9f974SMario Six * This is a stripped down version of struct main_stream_attributes that 35*25a9f974SMario Six * contains only the parameters that are not set by cfg_msa_recalculate() 36*25a9f974SMario Six */ 37*25a9f974SMario Six struct logicore_dp_tx_msa { 38*25a9f974SMario Six u32 pixel_clock_hz; 39*25a9f974SMario Six u32 bits_per_color; 40*25a9f974SMario Six u16 h_active; 41*25a9f974SMario Six u32 h_start; 42*25a9f974SMario Six bool h_sync_polarity; 43*25a9f974SMario Six u16 h_sync_width; 44*25a9f974SMario Six u16 h_total; 45*25a9f974SMario Six u16 v_active; 46*25a9f974SMario Six u32 v_start; 47*25a9f974SMario Six bool v_sync_polarity; 48*25a9f974SMario Six u16 v_sync_width; 49*25a9f974SMario Six u16 v_total; 50*25a9f974SMario Six bool override_user_pixel_width; 51*25a9f974SMario Six u32 user_pixel_width; 52*25a9f974SMario Six }; 53*25a9f974SMario Six 54*25a9f974SMario Six #endif /* __GDSYS_LOGICORE_DP_TX_H__ */ 55