1 /* 2 * Copyright 2007, 2010-2011 Freescale Semiconductor, Inc. 3 * Authors: York Sun <yorksun@freescale.com> 4 * Timur Tabi <timur@freescale.com> 5 * 6 * FSL DIU Framebuffer driver 7 * 8 * See file CREDITS for list of people who contributed to this 9 * project. 10 * 11 * This program is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License as 13 * published by the Free Software Foundation; either version 2 of 14 * the License, or (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 24 * MA 02111-1307 USA 25 */ 26 27 #include <common.h> 28 #include <malloc.h> 29 #include <asm/io.h> 30 31 #include "videomodes.h" 32 #include <video_fb.h> 33 #include <fsl_diu_fb.h> 34 #include <linux/list.h> 35 #include <linux/fb.h> 36 37 /* This setting is used for the ifm pdm360ng with PRIMEVIEW PM070WL3 */ 38 static struct fb_videomode fsl_diu_mode_800_480 = { 39 .name = "800x480-60", 40 .refresh = 60, 41 .xres = 800, 42 .yres = 480, 43 .pixclock = 31250, 44 .left_margin = 86, 45 .right_margin = 42, 46 .upper_margin = 33, 47 .lower_margin = 10, 48 .hsync_len = 128, 49 .vsync_len = 2, 50 .sync = 0, 51 .vmode = FB_VMODE_NONINTERLACED 52 }; 53 54 /* For the SHARP LQ084S3LG01, used on the P1022DS board */ 55 static struct fb_videomode fsl_diu_mode_800_600 = { 56 .name = "800x600-60", 57 .refresh = 60, 58 .xres = 800, 59 .yres = 600, 60 .pixclock = 25000, 61 .left_margin = 88, 62 .right_margin = 40, 63 .upper_margin = 23, 64 .lower_margin = 1, 65 .hsync_len = 128, 66 .vsync_len = 4, 67 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, 68 .vmode = FB_VMODE_NONINTERLACED 69 }; 70 71 /* 72 * These parameters give default parameters 73 * for video output 1024x768, 74 * FIXME - change timing to proper amounts 75 * hsync 31.5kHz, vsync 60Hz 76 */ 77 static struct fb_videomode fsl_diu_mode_1024_768 = { 78 .name = "1024x768-60", 79 .refresh = 60, 80 .xres = 1024, 81 .yres = 768, 82 .pixclock = 15385, 83 .left_margin = 160, 84 .right_margin = 24, 85 .upper_margin = 29, 86 .lower_margin = 3, 87 .hsync_len = 136, 88 .vsync_len = 6, 89 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, 90 .vmode = FB_VMODE_NONINTERLACED 91 }; 92 93 static struct fb_videomode fsl_diu_mode_1280_1024 = { 94 .name = "1280x1024-60", 95 .refresh = 60, 96 .xres = 1280, 97 .yres = 1024, 98 .pixclock = 9375, 99 .left_margin = 38, 100 .right_margin = 128, 101 .upper_margin = 2, 102 .lower_margin = 7, 103 .hsync_len = 216, 104 .vsync_len = 37, 105 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, 106 .vmode = FB_VMODE_NONINTERLACED 107 }; 108 109 static struct fb_videomode fsl_diu_mode_1280_720 = { 110 .name = "1280x720-60", 111 .refresh = 60, 112 .xres = 1280, 113 .yres = 720, 114 .pixclock = 13426, 115 .left_margin = 192, 116 .right_margin = 64, 117 .upper_margin = 22, 118 .lower_margin = 1, 119 .hsync_len = 136, 120 .vsync_len = 3, 121 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, 122 .vmode = FB_VMODE_NONINTERLACED 123 }; 124 125 static struct fb_videomode fsl_diu_mode_1920_1080 = { 126 .name = "1920x1080-60", 127 .refresh = 60, 128 .xres = 1920, 129 .yres = 1080, 130 .pixclock = 5787, 131 .left_margin = 328, 132 .right_margin = 120, 133 .upper_margin = 34, 134 .lower_margin = 1, 135 .hsync_len = 208, 136 .vsync_len = 3, 137 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, 138 .vmode = FB_VMODE_NONINTERLACED 139 }; 140 141 /* 142 * These are the fields of area descriptor(in DDR memory) for every plane 143 */ 144 struct diu_ad { 145 /* Word 0(32-bit) in DDR memory */ 146 __le32 pix_fmt; /* hard coding pixel format */ 147 /* Word 1(32-bit) in DDR memory */ 148 __le32 addr; 149 /* Word 2(32-bit) in DDR memory */ 150 __le32 src_size_g_alpha; 151 /* Word 3(32-bit) in DDR memory */ 152 __le32 aoi_size; 153 /* Word 4(32-bit) in DDR memory */ 154 __le32 offset_xyi; 155 /* Word 5(32-bit) in DDR memory */ 156 __le32 offset_xyd; 157 /* Word 6(32-bit) in DDR memory */ 158 __le32 ckmax_r:8; 159 __le32 ckmax_g:8; 160 __le32 ckmax_b:8; 161 __le32 res9:8; 162 /* Word 7(32-bit) in DDR memory */ 163 __le32 ckmin_r:8; 164 __le32 ckmin_g:8; 165 __le32 ckmin_b:8; 166 __le32 res10:8; 167 /* Word 8(32-bit) in DDR memory */ 168 __le32 next_ad; 169 /* Word 9(32-bit) in DDR memory, just for 64-bit aligned */ 170 __le32 res[3]; 171 } __attribute__ ((packed)); 172 173 /* 174 * DIU register map 175 */ 176 struct diu { 177 __be32 desc[3]; 178 __be32 gamma; 179 __be32 pallete; 180 __be32 cursor; 181 __be32 curs_pos; 182 __be32 diu_mode; 183 __be32 bgnd; 184 __be32 bgnd_wb; 185 __be32 disp_size; 186 __be32 wb_size; 187 __be32 wb_mem_addr; 188 __be32 hsyn_para; 189 __be32 vsyn_para; 190 __be32 syn_pol; 191 __be32 thresholds; 192 __be32 int_status; 193 __be32 int_mask; 194 __be32 colorbar[8]; 195 __be32 filling; 196 __be32 plut; 197 } __attribute__ ((packed)); 198 199 struct diu_addr { 200 void *vaddr; /* Virtual address */ 201 u32 paddr; /* 32-bit physical address */ 202 unsigned int offset; /* Alignment offset */ 203 }; 204 205 static struct fb_info info; 206 207 /* 208 * Align to 64-bit(8-byte), 32-byte, etc. 209 */ 210 static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align) 211 { 212 u32 offset, ssize; 213 u32 mask; 214 215 ssize = size + bytes_align; 216 buf->vaddr = malloc(ssize); 217 if (!buf->vaddr) 218 return -1; 219 220 memset(buf->vaddr, 0, ssize); 221 mask = bytes_align - 1; 222 offset = (u32)buf->vaddr & mask; 223 if (offset) { 224 buf->offset = bytes_align - offset; 225 buf->vaddr += offset; 226 } else 227 buf->offset = 0; 228 229 buf->paddr = virt_to_phys(buf->vaddr); 230 return 0; 231 } 232 233 /* 234 * Allocate a framebuffer and an Area Descriptor that points to it. Both 235 * are created in the same memory block. The Area Descriptor is updated to 236 * point to the framebuffer memory. Memory is aligned as needed. 237 */ 238 static struct diu_ad *allocate_fb(unsigned int xres, unsigned int yres, 239 unsigned int depth, char **fb) 240 { 241 unsigned long size = xres * yres * depth; 242 struct diu_addr addr; 243 struct diu_ad *ad; 244 size_t ad_size = roundup(sizeof(struct diu_ad), 32); 245 246 /* 247 * Allocate a memory block that holds the Area Descriptor and the 248 * frame buffer right behind it. To keep the code simple, everything 249 * is aligned on a 32-byte address. 250 */ 251 if (allocate_buf(&addr, ad_size + size, 32) < 0) 252 return NULL; 253 254 ad = addr.vaddr; 255 ad->addr = cpu_to_le32(addr.paddr + ad_size); 256 ad->aoi_size = cpu_to_le32((yres << 16) | xres); 257 ad->src_size_g_alpha = cpu_to_le32((yres << 12) | xres); 258 ad->offset_xyi = 0; 259 ad->offset_xyd = 0; 260 261 if (fb) 262 *fb = addr.vaddr + ad_size; 263 264 return ad; 265 } 266 267 int fsl_diu_init(u16 xres, u16 yres, u32 pixel_format, int gamma_fix) 268 { 269 struct fb_videomode *fsl_diu_mode_db; 270 struct diu_ad *ad; 271 struct diu *hw = (struct diu *)CONFIG_SYS_DIU_ADDR; 272 u8 *gamma_table_base; 273 unsigned int i, j; 274 struct diu_addr gamma; 275 struct diu_addr cursor; 276 277 /* Convert the X,Y resolution pair into a single number */ 278 #define RESOLUTION(x, y) (((u32)(x) << 16) | (y)) 279 280 switch (RESOLUTION(xres, yres)) { 281 case RESOLUTION(800, 480): 282 fsl_diu_mode_db = &fsl_diu_mode_800_480; 283 break; 284 case RESOLUTION(800, 600): 285 fsl_diu_mode_db = &fsl_diu_mode_800_600; 286 break; 287 case RESOLUTION(1024, 768): 288 fsl_diu_mode_db = &fsl_diu_mode_1024_768; 289 break; 290 case RESOLUTION(1280, 1024): 291 fsl_diu_mode_db = &fsl_diu_mode_1280_1024; 292 break; 293 case RESOLUTION(1280, 720): 294 fsl_diu_mode_db = &fsl_diu_mode_1280_720; 295 break; 296 case RESOLUTION(1920, 1080): 297 fsl_diu_mode_db = &fsl_diu_mode_1920_1080; 298 break; 299 default: 300 printf("DIU: Unsupported resolution %ux%u\n", xres, yres); 301 return -1; 302 } 303 304 /* read mode info */ 305 info.var.xres = fsl_diu_mode_db->xres; 306 info.var.yres = fsl_diu_mode_db->yres; 307 info.var.bits_per_pixel = 32; 308 info.var.pixclock = fsl_diu_mode_db->pixclock; 309 info.var.left_margin = fsl_diu_mode_db->left_margin; 310 info.var.right_margin = fsl_diu_mode_db->right_margin; 311 info.var.upper_margin = fsl_diu_mode_db->upper_margin; 312 info.var.lower_margin = fsl_diu_mode_db->lower_margin; 313 info.var.hsync_len = fsl_diu_mode_db->hsync_len; 314 info.var.vsync_len = fsl_diu_mode_db->vsync_len; 315 info.var.sync = fsl_diu_mode_db->sync; 316 info.var.vmode = fsl_diu_mode_db->vmode; 317 info.fix.line_length = info.var.xres * info.var.bits_per_pixel / 8; 318 319 /* Memory allocation for framebuffer */ 320 info.screen_size = 321 info.var.xres * info.var.yres * (info.var.bits_per_pixel / 8); 322 ad = allocate_fb(info.var.xres, info.var.yres, 323 info.var.bits_per_pixel / 8, &info.screen_base); 324 if (!ad) { 325 printf("DIU: Out of memory\n"); 326 return -1; 327 } 328 329 ad->pix_fmt = pixel_format; 330 331 /* Disable chroma keying function */ 332 ad->ckmax_r = 0; 333 ad->ckmax_g = 0; 334 ad->ckmax_b = 0; 335 336 ad->ckmin_r = 255; 337 ad->ckmin_g = 255; 338 ad->ckmin_b = 255; 339 340 /* Initialize the gamma table */ 341 if (allocate_buf(&gamma, 256 * 3, 32) < 0) { 342 printf("DIU: Out of memory\n"); 343 return -1; 344 } 345 gamma_table_base = gamma.vaddr; 346 for (i = 0; i <= 2; i++) 347 for (j = 0; j < 256; j++) 348 *gamma_table_base++ = j; 349 350 if (gamma_fix == 1) { /* fix the gamma */ 351 gamma_table_base = gamma.vaddr; 352 for (i = 0; i < 256 * 3; i++) { 353 gamma_table_base[i] = (gamma_table_base[i] << 2) 354 | ((gamma_table_base[i] >> 6) & 0x03); 355 } 356 } 357 358 /* Initialize the cursor */ 359 if (allocate_buf(&cursor, 32 * 32 * 2, 32) < 0) { 360 printf("DIU: Can't alloc cursor data\n"); 361 return -1; 362 } 363 364 /* Program DIU registers */ 365 out_be32(&hw->diu_mode, 0); /* Temporarily disable the DIU */ 366 367 out_be32(&hw->gamma, gamma.paddr); 368 out_be32(&hw->cursor, cursor.paddr); 369 out_be32(&hw->bgnd, 0x007F7F7F); 370 out_be32(&hw->disp_size, info.var.yres << 16 | info.var.xres); 371 out_be32(&hw->hsyn_para, info.var.left_margin << 22 | 372 info.var.hsync_len << 11 | 373 info.var.right_margin); 374 375 out_be32(&hw->vsyn_para, info.var.upper_margin << 22 | 376 info.var.vsync_len << 11 | 377 info.var.lower_margin); 378 379 /* Pixel Clock configuration */ 380 diu_set_pixel_clock(info.var.pixclock); 381 382 /* Set the frame buffers */ 383 out_be32(&hw->desc[0], virt_to_phys(ad)); 384 out_be32(&hw->desc[1], 0); 385 out_be32(&hw->desc[2], 0); 386 387 /* Enable the DIU, set display to all three planes */ 388 out_be32(&hw->diu_mode, 1); 389 390 return 0; 391 } 392 393 void *video_hw_init(void) 394 { 395 static GraphicDevice ctfb; 396 const char *options; 397 unsigned int depth = 0, freq = 0; 398 399 if (!video_get_video_mode(&ctfb.winSizeX, &ctfb.winSizeY, &depth, &freq, 400 &options)) 401 return NULL; 402 403 /* Find the monitor port, which is a required option */ 404 if (!options) 405 return NULL; 406 if (strncmp(options, "monitor=", 8) != 0) 407 return NULL; 408 409 if (platform_diu_init(ctfb.winSizeX, ctfb.winSizeY, options + 8) < 0) 410 return NULL; 411 412 /* fill in Graphic device struct */ 413 sprintf(ctfb.modeIdent, "%ix%ix%i %ikHz %iHz", 414 ctfb.winSizeX, ctfb.winSizeY, depth, 64, freq); 415 416 ctfb.frameAdrs = (unsigned int)info.screen_base; 417 ctfb.plnSizeX = ctfb.winSizeX; 418 ctfb.plnSizeY = ctfb.winSizeY; 419 420 ctfb.gdfBytesPP = 4; 421 ctfb.gdfIndex = GDF_32BIT_X888RGB; 422 423 ctfb.isaBase = 0; 424 ctfb.pciBase = 0; 425 ctfb.memSize = info.screen_size; 426 427 /* Cursor Start Address */ 428 ctfb.dprBase = 0; 429 ctfb.vprBase = 0; 430 ctfb.cprBase = 0; 431 432 return &ctfb; 433 } 434