1 /* 2 * Copyright 2007, 2010-2011 Freescale Semiconductor, Inc. 3 * Authors: York Sun <yorksun@freescale.com> 4 * Timur Tabi <timur@freescale.com> 5 * 6 * FSL DIU Framebuffer driver 7 * 8 * See file CREDITS for list of people who contributed to this 9 * project. 10 * 11 * This program is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License as 13 * published by the Free Software Foundation; either version 2 of 14 * the License, or (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 24 * MA 02111-1307 USA 25 */ 26 27 #include <common.h> 28 #include <malloc.h> 29 #include <asm/io.h> 30 31 #include "videomodes.h" 32 #include <video_fb.h> 33 #include <fsl_diu_fb.h> 34 35 struct fb_var_screeninfo { 36 unsigned int xres; /* visible resolution */ 37 unsigned int yres; 38 39 unsigned int bits_per_pixel; /* guess what */ 40 41 /* Timing: All values in pixclocks, except pixclock (of course) */ 42 unsigned int pixclock; /* pixel clock in ps (pico seconds) */ 43 unsigned int left_margin; /* time from sync to picture */ 44 unsigned int right_margin; /* time from picture to sync */ 45 unsigned int upper_margin; /* time from sync to picture */ 46 unsigned int lower_margin; 47 unsigned int hsync_len; /* length of horizontal sync */ 48 unsigned int vsync_len; /* length of vertical sync */ 49 unsigned int sync; /* see FB_SYNC_* */ 50 unsigned int vmode; /* see FB_VMODE_* */ 51 unsigned int rotate; /* angle we rotate counter clockwise */ 52 }; 53 54 struct fb_info { 55 struct fb_var_screeninfo var; /* Current var */ 56 unsigned int smem_len; /* Length of frame buffer mem */ 57 unsigned int type; /* see FB_TYPE_* */ 58 unsigned int line_length; /* length of a line in bytes */ 59 60 void *screen_base; 61 unsigned long screen_size; 62 }; 63 64 struct fb_videomode { 65 const char *name; /* optional */ 66 unsigned int refresh; /* optional */ 67 unsigned int xres; 68 unsigned int yres; 69 unsigned int pixclock; 70 unsigned int left_margin; 71 unsigned int right_margin; 72 unsigned int upper_margin; 73 unsigned int lower_margin; 74 unsigned int hsync_len; 75 unsigned int vsync_len; 76 unsigned int sync; 77 unsigned int vmode; 78 unsigned int flag; 79 }; 80 81 /* This setting is used for the ifm pdm360ng with PRIMEVIEW PM070WL3 */ 82 static struct fb_videomode fsl_diu_mode_800_480 = { 83 .name = "800x480-60", 84 .refresh = 60, 85 .xres = 800, 86 .yres = 480, 87 .pixclock = 31250, 88 .left_margin = 86, 89 .right_margin = 42, 90 .upper_margin = 33, 91 .lower_margin = 10, 92 .hsync_len = 128, 93 .vsync_len = 2, 94 .sync = 0, 95 .vmode = FB_VMODE_NONINTERLACED 96 }; 97 98 /* For the SHARP LQ084S3LG01, used on the P1022DS board */ 99 static struct fb_videomode fsl_diu_mode_800_600 = { 100 .name = "800x600-60", 101 .refresh = 60, 102 .xres = 800, 103 .yres = 600, 104 .pixclock = 25000, 105 .left_margin = 88, 106 .right_margin = 40, 107 .upper_margin = 23, 108 .lower_margin = 1, 109 .hsync_len = 128, 110 .vsync_len = 4, 111 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, 112 .vmode = FB_VMODE_NONINTERLACED 113 }; 114 115 /* 116 * These parameters give default parameters 117 * for video output 1024x768, 118 * FIXME - change timing to proper amounts 119 * hsync 31.5kHz, vsync 60Hz 120 */ 121 static struct fb_videomode fsl_diu_mode_1024_768 = { 122 .name = "1024x768-60", 123 .refresh = 60, 124 .xres = 1024, 125 .yres = 768, 126 .pixclock = 15385, 127 .left_margin = 160, 128 .right_margin = 24, 129 .upper_margin = 29, 130 .lower_margin = 3, 131 .hsync_len = 136, 132 .vsync_len = 6, 133 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, 134 .vmode = FB_VMODE_NONINTERLACED 135 }; 136 137 static struct fb_videomode fsl_diu_mode_1280_1024 = { 138 .name = "1280x1024-60", 139 .refresh = 60, 140 .xres = 1280, 141 .yres = 1024, 142 .pixclock = 9375, 143 .left_margin = 38, 144 .right_margin = 128, 145 .upper_margin = 2, 146 .lower_margin = 7, 147 .hsync_len = 216, 148 .vsync_len = 37, 149 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, 150 .vmode = FB_VMODE_NONINTERLACED 151 }; 152 153 /* 154 * These are the fields of area descriptor(in DDR memory) for every plane 155 */ 156 struct diu_ad { 157 /* Word 0(32-bit) in DDR memory */ 158 __le32 pix_fmt; /* hard coding pixel format */ 159 /* Word 1(32-bit) in DDR memory */ 160 __le32 addr; 161 /* Word 2(32-bit) in DDR memory */ 162 __le32 src_size_g_alpha; 163 /* Word 3(32-bit) in DDR memory */ 164 __le32 aoi_size; 165 /* Word 4(32-bit) in DDR memory */ 166 __le32 offset_xyi; 167 /* Word 5(32-bit) in DDR memory */ 168 __le32 offset_xyd; 169 /* Word 6(32-bit) in DDR memory */ 170 __le32 ckmax_r:8; 171 __le32 ckmax_g:8; 172 __le32 ckmax_b:8; 173 __le32 res9:8; 174 /* Word 7(32-bit) in DDR memory */ 175 __le32 ckmin_r:8; 176 __le32 ckmin_g:8; 177 __le32 ckmin_b:8; 178 __le32 res10:8; 179 /* Word 8(32-bit) in DDR memory */ 180 __le32 next_ad; 181 /* Word 9(32-bit) in DDR memory, just for 64-bit aligned */ 182 __le32 res[3]; 183 } __attribute__ ((packed)); 184 185 /* 186 * DIU register map 187 */ 188 struct diu { 189 __be32 desc[3]; 190 __be32 gamma; 191 __be32 pallete; 192 __be32 cursor; 193 __be32 curs_pos; 194 __be32 diu_mode; 195 __be32 bgnd; 196 __be32 bgnd_wb; 197 __be32 disp_size; 198 __be32 wb_size; 199 __be32 wb_mem_addr; 200 __be32 hsyn_para; 201 __be32 vsyn_para; 202 __be32 syn_pol; 203 __be32 thresholds; 204 __be32 int_status; 205 __be32 int_mask; 206 __be32 colorbar[8]; 207 __be32 filling; 208 __be32 plut; 209 } __attribute__ ((packed)); 210 211 struct diu_addr { 212 void *vaddr; /* Virtual address */ 213 u32 paddr; /* 32-bit physical address */ 214 unsigned int offset; /* Alignment offset */ 215 }; 216 217 static struct fb_info info; 218 219 /* 220 * Align to 64-bit(8-byte), 32-byte, etc. 221 */ 222 static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align) 223 { 224 u32 offset, ssize; 225 u32 mask; 226 227 ssize = size + bytes_align; 228 buf->vaddr = malloc(ssize); 229 if (!buf->vaddr) 230 return -1; 231 232 memset(buf->vaddr, 0, ssize); 233 mask = bytes_align - 1; 234 offset = (u32)buf->vaddr & mask; 235 if (offset) { 236 buf->offset = bytes_align - offset; 237 buf->vaddr += offset; 238 } else 239 buf->offset = 0; 240 241 buf->paddr = virt_to_phys(buf->vaddr); 242 return 0; 243 } 244 245 /* 246 * Allocate a framebuffer and an Area Descriptor that points to it. Both 247 * are created in the same memory block. The Area Descriptor is updated to 248 * point to the framebuffer memory. Memory is aligned as needed. 249 */ 250 static struct diu_ad *allocate_fb(unsigned int xres, unsigned int yres, 251 unsigned int depth, void **fb) 252 { 253 unsigned long size = xres * yres * depth; 254 struct diu_addr addr; 255 struct diu_ad *ad; 256 size_t ad_size = roundup(sizeof(struct diu_ad), 32); 257 258 /* 259 * Allocate a memory block that holds the Area Descriptor and the 260 * frame buffer right behind it. To keep the code simple, everything 261 * is aligned on a 32-byte address. 262 */ 263 if (allocate_buf(&addr, ad_size + size, 32) < 0) 264 return NULL; 265 266 ad = addr.vaddr; 267 ad->addr = cpu_to_le32(addr.paddr + ad_size); 268 ad->aoi_size = cpu_to_le32((yres << 16) | xres); 269 ad->src_size_g_alpha = cpu_to_le32((yres << 12) | xres); 270 ad->offset_xyi = 0; 271 ad->offset_xyd = 0; 272 273 if (fb) 274 *fb = addr.vaddr + ad_size; 275 276 return ad; 277 } 278 279 int fsl_diu_init(u16 xres, u16 yres, u32 pixel_format, int gamma_fix) 280 { 281 struct fb_videomode *fsl_diu_mode_db; 282 struct diu_ad *ad; 283 struct diu *hw = (struct diu *)CONFIG_SYS_DIU_ADDR; 284 u8 *gamma_table_base; 285 unsigned int i, j; 286 struct diu_ad *dummy_ad; 287 struct diu_addr gamma; 288 struct diu_addr cursor; 289 290 /* Convert the X,Y resolution pair into a single number */ 291 #define RESOLUTION(x, y) (((u32)(x) << 16) | (y)) 292 293 switch (RESOLUTION(xres, yres)) { 294 case RESOLUTION(800, 480): 295 fsl_diu_mode_db = &fsl_diu_mode_800_480; 296 break; 297 case RESOLUTION(800, 600): 298 fsl_diu_mode_db = &fsl_diu_mode_800_600; 299 case RESOLUTION(1024, 768): 300 fsl_diu_mode_db = &fsl_diu_mode_1024_768; 301 case RESOLUTION(1280, 1024): 302 fsl_diu_mode_db = &fsl_diu_mode_1280_1024; 303 break; 304 default: 305 printf("DIU: Unsupported resolution %ux%u\n", xres, yres); 306 return -1; 307 } 308 309 /* The AD struct for the dummy framebuffer and the FB itself */ 310 dummy_ad = allocate_fb(2, 4, 4, NULL); 311 if (!dummy_ad) { 312 printf("DIU: Out of memory\n"); 313 return -1; 314 } 315 dummy_ad->pix_fmt = 0x88883316; 316 317 /* read mode info */ 318 info.var.xres = fsl_diu_mode_db->xres; 319 info.var.yres = fsl_diu_mode_db->yres; 320 info.var.bits_per_pixel = 32; 321 info.var.pixclock = fsl_diu_mode_db->pixclock; 322 info.var.left_margin = fsl_diu_mode_db->left_margin; 323 info.var.right_margin = fsl_diu_mode_db->right_margin; 324 info.var.upper_margin = fsl_diu_mode_db->upper_margin; 325 info.var.lower_margin = fsl_diu_mode_db->lower_margin; 326 info.var.hsync_len = fsl_diu_mode_db->hsync_len; 327 info.var.vsync_len = fsl_diu_mode_db->vsync_len; 328 info.var.sync = fsl_diu_mode_db->sync; 329 info.var.vmode = fsl_diu_mode_db->vmode; 330 info.line_length = info.var.xres * info.var.bits_per_pixel / 8; 331 332 /* Memory allocation for framebuffer */ 333 info.smem_len = 334 info.var.xres * info.var.yres * (info.var.bits_per_pixel / 8); 335 ad = allocate_fb(info.var.xres, info.var.yres, 336 info.var.bits_per_pixel / 8, &info.screen_base); 337 if (!ad) { 338 printf("DIU: Out of memory\n"); 339 return -1; 340 } 341 342 ad->pix_fmt = pixel_format; 343 344 /* Disable chroma keying function */ 345 ad->ckmax_r = 0; 346 ad->ckmax_g = 0; 347 ad->ckmax_b = 0; 348 349 ad->ckmin_r = 255; 350 ad->ckmin_g = 255; 351 ad->ckmin_b = 255; 352 353 /* Initialize the gamma table */ 354 if (allocate_buf(&gamma, 256 * 3, 32) < 0) { 355 printf("DIU: Out of memory\n"); 356 return -1; 357 } 358 gamma_table_base = gamma.vaddr; 359 for (i = 0; i <= 2; i++) 360 for (j = 0; j < 256; j++) 361 *gamma_table_base++ = j; 362 363 if (gamma_fix == 1) { /* fix the gamma */ 364 gamma_table_base = gamma.vaddr; 365 for (i = 0; i < 256 * 3; i++) { 366 gamma_table_base[i] = (gamma_table_base[i] << 2) 367 | ((gamma_table_base[i] >> 6) & 0x03); 368 } 369 } 370 371 /* Initialize the cursor */ 372 if (allocate_buf(&cursor, 32 * 32 * 2, 32) < 0) { 373 printf("DIU: Can't alloc cursor data\n"); 374 return -1; 375 } 376 377 /* Program DIU registers */ 378 out_be32(&hw->diu_mode, 0); /* Temporarily disable the DIU */ 379 380 out_be32(&hw->gamma, gamma.paddr); 381 out_be32(&hw->cursor, cursor.paddr); 382 out_be32(&hw->bgnd, 0x007F7F7F); 383 out_be32(&hw->bgnd_wb, 0); 384 out_be32(&hw->disp_size, info.var.yres << 16 | info.var.xres); 385 out_be32(&hw->wb_size, 0); 386 out_be32(&hw->wb_mem_addr, 0); 387 out_be32(&hw->hsyn_para, info.var.left_margin << 22 | 388 info.var.hsync_len << 11 | 389 info.var.right_margin); 390 391 out_be32(&hw->vsyn_para, info.var.upper_margin << 22 | 392 info.var.vsync_len << 11 | 393 info.var.lower_margin); 394 395 out_be32(&hw->syn_pol, 0); 396 out_be32(&hw->thresholds, 0x00037800); 397 out_be32(&hw->int_status, 0); 398 out_be32(&hw->int_mask, 0); 399 out_be32(&hw->plut, 0x01F5F666); 400 /* Pixel Clock configuration */ 401 diu_set_pixel_clock(info.var.pixclock); 402 403 /* Set the frame buffers */ 404 out_be32(&hw->desc[0], virt_to_phys(ad)); 405 out_be32(&hw->desc[1], virt_to_phys(dummy_ad)); 406 out_be32(&hw->desc[2], virt_to_phys(dummy_ad)); 407 408 /* Enable the DIU, set display to all three planes */ 409 out_be32(&hw->diu_mode, 1); 410 411 return 0; 412 } 413 414 void *video_hw_init(void) 415 { 416 static GraphicDevice ctfb; 417 const char *options; 418 unsigned int depth = 0, freq = 0; 419 420 if (!video_get_video_mode(&ctfb.winSizeX, &ctfb.winSizeY, &depth, &freq, 421 &options)) 422 return NULL; 423 424 /* Find the monitor port, which is a required option */ 425 if (!options) 426 return NULL; 427 if (strncmp(options, "monitor=", 8) != 0) 428 return NULL; 429 430 if (platform_diu_init(ctfb.winSizeX, ctfb.winSizeY, options + 8) < 0) 431 return NULL; 432 433 /* fill in Graphic device struct */ 434 sprintf(ctfb.modeIdent, "%ix%ix%i %ikHz %iHz", 435 ctfb.winSizeX, ctfb.winSizeY, depth, 64, freq); 436 437 ctfb.frameAdrs = (unsigned int)info.screen_base; 438 ctfb.plnSizeX = ctfb.winSizeX; 439 ctfb.plnSizeY = ctfb.winSizeY; 440 441 ctfb.gdfBytesPP = 4; 442 ctfb.gdfIndex = GDF_32BIT_X888RGB; 443 444 ctfb.isaBase = 0; 445 ctfb.pciBase = 0; 446 ctfb.memSize = info.screen_size; 447 448 /* Cursor Start Address */ 449 ctfb.dprBase = 0; 450 ctfb.vprBase = 0; 451 ctfb.cprBase = 0; 452 453 return &ctfb; 454 } 455