108a7aa1eSSimon Glass /* 208a7aa1eSSimon Glass * Copyright (C) 2012 Samsung Electronics 308a7aa1eSSimon Glass * 408a7aa1eSSimon Glass * Author: Donghwa Lee <dh09.lee@samsung.com> 508a7aa1eSSimon Glass * 608a7aa1eSSimon Glass * SPDX-License-Identifier: GPL-2.0+ 708a7aa1eSSimon Glass */ 808a7aa1eSSimon Glass 908a7aa1eSSimon Glass #include <config.h> 1008a7aa1eSSimon Glass #include <common.h> 1108a7aa1eSSimon Glass #include <malloc.h> 1208a7aa1eSSimon Glass #include <linux/compat.h> 1308a7aa1eSSimon Glass #include <linux/err.h> 1408a7aa1eSSimon Glass #include <asm/arch/clk.h> 1508a7aa1eSSimon Glass #include <asm/arch/cpu.h> 1608a7aa1eSSimon Glass #include <asm/arch/dp_info.h> 1708a7aa1eSSimon Glass #include <asm/arch/dp.h> 18*7eb860dfSSimon Glass #include <asm/arch/power.h> 1908a7aa1eSSimon Glass #include <fdtdec.h> 2008a7aa1eSSimon Glass #include <libfdt.h> 2108a7aa1eSSimon Glass 2208a7aa1eSSimon Glass #include "exynos_dp_lowlevel.h" 2308a7aa1eSSimon Glass 2408a7aa1eSSimon Glass DECLARE_GLOBAL_DATA_PTR; 2508a7aa1eSSimon Glass 2608a7aa1eSSimon Glass static void exynos_dp_disp_info(struct edp_disp_info *disp_info) 2708a7aa1eSSimon Glass { 2808a7aa1eSSimon Glass disp_info->h_total = disp_info->h_res + disp_info->h_sync_width + 2908a7aa1eSSimon Glass disp_info->h_back_porch + disp_info->h_front_porch; 3008a7aa1eSSimon Glass disp_info->v_total = disp_info->v_res + disp_info->v_sync_width + 3108a7aa1eSSimon Glass disp_info->v_back_porch + disp_info->v_front_porch; 3208a7aa1eSSimon Glass 3308a7aa1eSSimon Glass return; 3408a7aa1eSSimon Glass } 3508a7aa1eSSimon Glass 368c9b8dc0SSimon Glass static int exynos_dp_init_dp(struct exynos_dp *dp_regs) 3708a7aa1eSSimon Glass { 3808a7aa1eSSimon Glass int ret; 398c9b8dc0SSimon Glass exynos_dp_reset(dp_regs); 4008a7aa1eSSimon Glass 4108a7aa1eSSimon Glass /* SW defined function Normal operation */ 428c9b8dc0SSimon Glass exynos_dp_enable_sw_func(dp_regs, DP_ENABLE); 4308a7aa1eSSimon Glass 448c9b8dc0SSimon Glass ret = exynos_dp_init_analog_func(dp_regs); 4508a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) 4608a7aa1eSSimon Glass return ret; 4708a7aa1eSSimon Glass 488c9b8dc0SSimon Glass exynos_dp_init_hpd(dp_regs); 498c9b8dc0SSimon Glass exynos_dp_init_aux(dp_regs); 5008a7aa1eSSimon Glass 5108a7aa1eSSimon Glass return ret; 5208a7aa1eSSimon Glass } 5308a7aa1eSSimon Glass 5408a7aa1eSSimon Glass static unsigned char exynos_dp_calc_edid_check_sum(unsigned char *edid_data) 5508a7aa1eSSimon Glass { 5608a7aa1eSSimon Glass int i; 5708a7aa1eSSimon Glass unsigned char sum = 0; 5808a7aa1eSSimon Glass 5908a7aa1eSSimon Glass for (i = 0; i < EDID_BLOCK_LENGTH; i++) 6008a7aa1eSSimon Glass sum = sum + edid_data[i]; 6108a7aa1eSSimon Glass 6208a7aa1eSSimon Glass return sum; 6308a7aa1eSSimon Glass } 6408a7aa1eSSimon Glass 658c9b8dc0SSimon Glass static unsigned int exynos_dp_read_edid(struct exynos_dp *dp_regs) 6608a7aa1eSSimon Glass { 6708a7aa1eSSimon Glass unsigned char edid[EDID_BLOCK_LENGTH * 2]; 6808a7aa1eSSimon Glass unsigned int extend_block = 0; 6908a7aa1eSSimon Glass unsigned char sum; 7008a7aa1eSSimon Glass unsigned char test_vector; 7108a7aa1eSSimon Glass int retval; 7208a7aa1eSSimon Glass 7308a7aa1eSSimon Glass /* 7408a7aa1eSSimon Glass * EDID device address is 0x50. 7508a7aa1eSSimon Glass * However, if necessary, you must have set upper address 7608a7aa1eSSimon Glass * into E-EDID in I2C device, 0x30. 7708a7aa1eSSimon Glass */ 7808a7aa1eSSimon Glass 7908a7aa1eSSimon Glass /* Read Extension Flag, Number of 128-byte EDID extension blocks */ 808c9b8dc0SSimon Glass exynos_dp_read_byte_from_i2c(dp_regs, I2C_EDID_DEVICE_ADDR, 818c9b8dc0SSimon Glass EDID_EXTENSION_FLAG, &extend_block); 8208a7aa1eSSimon Glass 8308a7aa1eSSimon Glass if (extend_block > 0) { 8408a7aa1eSSimon Glass printf("DP EDID data includes a single extension!\n"); 8508a7aa1eSSimon Glass 8608a7aa1eSSimon Glass /* Read EDID data */ 878c9b8dc0SSimon Glass retval = exynos_dp_read_bytes_from_i2c(dp_regs, 888c9b8dc0SSimon Glass I2C_EDID_DEVICE_ADDR, 8908a7aa1eSSimon Glass EDID_HEADER_PATTERN, 9008a7aa1eSSimon Glass EDID_BLOCK_LENGTH, 9108a7aa1eSSimon Glass &edid[EDID_HEADER_PATTERN]); 9208a7aa1eSSimon Glass if (retval != 0) { 9308a7aa1eSSimon Glass printf("DP EDID Read failed!\n"); 9408a7aa1eSSimon Glass return -1; 9508a7aa1eSSimon Glass } 9608a7aa1eSSimon Glass sum = exynos_dp_calc_edid_check_sum(edid); 9708a7aa1eSSimon Glass if (sum != 0) { 9808a7aa1eSSimon Glass printf("DP EDID bad checksum!\n"); 9908a7aa1eSSimon Glass return -1; 10008a7aa1eSSimon Glass } 10108a7aa1eSSimon Glass 10208a7aa1eSSimon Glass /* Read additional EDID data */ 1038c9b8dc0SSimon Glass retval = exynos_dp_read_bytes_from_i2c(dp_regs, 1048c9b8dc0SSimon Glass I2C_EDID_DEVICE_ADDR, 10508a7aa1eSSimon Glass EDID_BLOCK_LENGTH, 10608a7aa1eSSimon Glass EDID_BLOCK_LENGTH, 10708a7aa1eSSimon Glass &edid[EDID_BLOCK_LENGTH]); 10808a7aa1eSSimon Glass if (retval != 0) { 10908a7aa1eSSimon Glass printf("DP EDID Read failed!\n"); 11008a7aa1eSSimon Glass return -1; 11108a7aa1eSSimon Glass } 11208a7aa1eSSimon Glass sum = exynos_dp_calc_edid_check_sum(&edid[EDID_BLOCK_LENGTH]); 11308a7aa1eSSimon Glass if (sum != 0) { 11408a7aa1eSSimon Glass printf("DP EDID bad checksum!\n"); 11508a7aa1eSSimon Glass return -1; 11608a7aa1eSSimon Glass } 11708a7aa1eSSimon Glass 1188c9b8dc0SSimon Glass exynos_dp_read_byte_from_dpcd(dp_regs, DPCD_TEST_REQUEST, 11908a7aa1eSSimon Glass &test_vector); 12008a7aa1eSSimon Glass if (test_vector & DPCD_TEST_EDID_READ) { 1218c9b8dc0SSimon Glass exynos_dp_write_byte_to_dpcd(dp_regs, 1228c9b8dc0SSimon Glass DPCD_TEST_EDID_CHECKSUM, 12308a7aa1eSSimon Glass edid[EDID_BLOCK_LENGTH + EDID_CHECKSUM]); 1248c9b8dc0SSimon Glass exynos_dp_write_byte_to_dpcd(dp_regs, 1258c9b8dc0SSimon Glass DPCD_TEST_RESPONSE, 12608a7aa1eSSimon Glass DPCD_TEST_EDID_CHECKSUM_WRITE); 12708a7aa1eSSimon Glass } 12808a7aa1eSSimon Glass } else { 12908a7aa1eSSimon Glass debug("DP EDID data does not include any extensions.\n"); 13008a7aa1eSSimon Glass 13108a7aa1eSSimon Glass /* Read EDID data */ 1328c9b8dc0SSimon Glass retval = exynos_dp_read_bytes_from_i2c(dp_regs, 1338c9b8dc0SSimon Glass I2C_EDID_DEVICE_ADDR, 13408a7aa1eSSimon Glass EDID_HEADER_PATTERN, 13508a7aa1eSSimon Glass EDID_BLOCK_LENGTH, 13608a7aa1eSSimon Glass &edid[EDID_HEADER_PATTERN]); 13708a7aa1eSSimon Glass 13808a7aa1eSSimon Glass if (retval != 0) { 13908a7aa1eSSimon Glass printf("DP EDID Read failed!\n"); 14008a7aa1eSSimon Glass return -1; 14108a7aa1eSSimon Glass } 14208a7aa1eSSimon Glass sum = exynos_dp_calc_edid_check_sum(edid); 14308a7aa1eSSimon Glass if (sum != 0) { 14408a7aa1eSSimon Glass printf("DP EDID bad checksum!\n"); 14508a7aa1eSSimon Glass return -1; 14608a7aa1eSSimon Glass } 14708a7aa1eSSimon Glass 1488c9b8dc0SSimon Glass exynos_dp_read_byte_from_dpcd(dp_regs, DPCD_TEST_REQUEST, 14908a7aa1eSSimon Glass &test_vector); 15008a7aa1eSSimon Glass if (test_vector & DPCD_TEST_EDID_READ) { 1518c9b8dc0SSimon Glass exynos_dp_write_byte_to_dpcd(dp_regs, 1528c9b8dc0SSimon Glass DPCD_TEST_EDID_CHECKSUM, edid[EDID_CHECKSUM]); 1538c9b8dc0SSimon Glass exynos_dp_write_byte_to_dpcd(dp_regs, 1548c9b8dc0SSimon Glass DPCD_TEST_RESPONSE, 15508a7aa1eSSimon Glass DPCD_TEST_EDID_CHECKSUM_WRITE); 15608a7aa1eSSimon Glass } 15708a7aa1eSSimon Glass } 15808a7aa1eSSimon Glass 15908a7aa1eSSimon Glass debug("DP EDID Read success!\n"); 16008a7aa1eSSimon Glass 16108a7aa1eSSimon Glass return 0; 16208a7aa1eSSimon Glass } 16308a7aa1eSSimon Glass 1648c9b8dc0SSimon Glass static unsigned int exynos_dp_handle_edid(struct exynos_dp *dp_regs, 1658c9b8dc0SSimon Glass struct edp_device_info *edp_info) 16608a7aa1eSSimon Glass { 16708a7aa1eSSimon Glass unsigned char buf[12]; 16808a7aa1eSSimon Glass unsigned int ret; 16908a7aa1eSSimon Glass unsigned char temp; 17008a7aa1eSSimon Glass unsigned char retry_cnt; 17108a7aa1eSSimon Glass unsigned char dpcd_rev[16]; 17208a7aa1eSSimon Glass unsigned char lane_bw[16]; 17308a7aa1eSSimon Glass unsigned char lane_cnt[16]; 17408a7aa1eSSimon Glass 17508a7aa1eSSimon Glass memset(dpcd_rev, 0, 16); 17608a7aa1eSSimon Glass memset(lane_bw, 0, 16); 17708a7aa1eSSimon Glass memset(lane_cnt, 0, 16); 17808a7aa1eSSimon Glass memset(buf, 0, 12); 17908a7aa1eSSimon Glass 18008a7aa1eSSimon Glass retry_cnt = 5; 18108a7aa1eSSimon Glass while (retry_cnt) { 18208a7aa1eSSimon Glass /* Read DPCD 0x0000-0x000b */ 1838c9b8dc0SSimon Glass ret = exynos_dp_read_bytes_from_dpcd(dp_regs, DPCD_DPCD_REV, 12, 18408a7aa1eSSimon Glass buf); 18508a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 18608a7aa1eSSimon Glass if (retry_cnt == 0) { 18708a7aa1eSSimon Glass printf("DP read_byte_from_dpcd() failed\n"); 18808a7aa1eSSimon Glass return ret; 18908a7aa1eSSimon Glass } 19008a7aa1eSSimon Glass retry_cnt--; 19108a7aa1eSSimon Glass } else 19208a7aa1eSSimon Glass break; 19308a7aa1eSSimon Glass } 19408a7aa1eSSimon Glass 19508a7aa1eSSimon Glass /* */ 19608a7aa1eSSimon Glass temp = buf[DPCD_DPCD_REV]; 19708a7aa1eSSimon Glass if (temp == DP_DPCD_REV_10 || temp == DP_DPCD_REV_11) 19808a7aa1eSSimon Glass edp_info->dpcd_rev = temp; 19908a7aa1eSSimon Glass else { 20008a7aa1eSSimon Glass printf("DP Wrong DPCD Rev : %x\n", temp); 20108a7aa1eSSimon Glass return -ENODEV; 20208a7aa1eSSimon Glass } 20308a7aa1eSSimon Glass 20408a7aa1eSSimon Glass temp = buf[DPCD_MAX_LINK_RATE]; 20508a7aa1eSSimon Glass if (temp == DP_LANE_BW_1_62 || temp == DP_LANE_BW_2_70) 20608a7aa1eSSimon Glass edp_info->lane_bw = temp; 20708a7aa1eSSimon Glass else { 20808a7aa1eSSimon Glass printf("DP Wrong MAX LINK RATE : %x\n", temp); 20908a7aa1eSSimon Glass return -EINVAL; 21008a7aa1eSSimon Glass } 21108a7aa1eSSimon Glass 21208a7aa1eSSimon Glass /* Refer VESA Display Port Standard Ver1.1a Page 120 */ 21308a7aa1eSSimon Glass if (edp_info->dpcd_rev == DP_DPCD_REV_11) { 21408a7aa1eSSimon Glass temp = buf[DPCD_MAX_LANE_COUNT] & 0x1f; 21508a7aa1eSSimon Glass if (buf[DPCD_MAX_LANE_COUNT] & 0x80) 21608a7aa1eSSimon Glass edp_info->dpcd_efc = 1; 21708a7aa1eSSimon Glass else 21808a7aa1eSSimon Glass edp_info->dpcd_efc = 0; 21908a7aa1eSSimon Glass } else { 22008a7aa1eSSimon Glass temp = buf[DPCD_MAX_LANE_COUNT]; 22108a7aa1eSSimon Glass edp_info->dpcd_efc = 0; 22208a7aa1eSSimon Glass } 22308a7aa1eSSimon Glass 22408a7aa1eSSimon Glass if (temp == DP_LANE_CNT_1 || temp == DP_LANE_CNT_2 || 22508a7aa1eSSimon Glass temp == DP_LANE_CNT_4) { 22608a7aa1eSSimon Glass edp_info->lane_cnt = temp; 22708a7aa1eSSimon Glass } else { 22808a7aa1eSSimon Glass printf("DP Wrong MAX LANE COUNT : %x\n", temp); 22908a7aa1eSSimon Glass return -EINVAL; 23008a7aa1eSSimon Glass } 23108a7aa1eSSimon Glass 2328c9b8dc0SSimon Glass ret = exynos_dp_read_edid(dp_regs); 23308a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 23408a7aa1eSSimon Glass printf("DP exynos_dp_read_edid() failed\n"); 23508a7aa1eSSimon Glass return -EINVAL; 23608a7aa1eSSimon Glass } 23708a7aa1eSSimon Glass 23808a7aa1eSSimon Glass return ret; 23908a7aa1eSSimon Glass } 24008a7aa1eSSimon Glass 2418c9b8dc0SSimon Glass static void exynos_dp_init_training(struct exynos_dp *dp_regs) 24208a7aa1eSSimon Glass { 24308a7aa1eSSimon Glass /* 24408a7aa1eSSimon Glass * MACRO_RST must be applied after the PLL_LOCK to avoid 24508a7aa1eSSimon Glass * the DP inter pair skew issue for at least 10 us 24608a7aa1eSSimon Glass */ 2478c9b8dc0SSimon Glass exynos_dp_reset_macro(dp_regs); 24808a7aa1eSSimon Glass 24908a7aa1eSSimon Glass /* All DP analog module power up */ 2508c9b8dc0SSimon Glass exynos_dp_set_analog_power_down(dp_regs, POWER_ALL, 0); 25108a7aa1eSSimon Glass } 25208a7aa1eSSimon Glass 2538c9b8dc0SSimon Glass static unsigned int exynos_dp_link_start(struct exynos_dp *dp_regs, 2548c9b8dc0SSimon Glass struct edp_device_info *edp_info) 25508a7aa1eSSimon Glass { 25608a7aa1eSSimon Glass unsigned char buf[5]; 25708a7aa1eSSimon Glass unsigned int ret = 0; 25808a7aa1eSSimon Glass 25908a7aa1eSSimon Glass debug("DP: %s was called\n", __func__); 26008a7aa1eSSimon Glass 26108a7aa1eSSimon Glass edp_info->lt_info.lt_status = DP_LT_CR; 26208a7aa1eSSimon Glass edp_info->lt_info.ep_loop = 0; 26308a7aa1eSSimon Glass edp_info->lt_info.cr_loop[0] = 0; 26408a7aa1eSSimon Glass edp_info->lt_info.cr_loop[1] = 0; 26508a7aa1eSSimon Glass edp_info->lt_info.cr_loop[2] = 0; 26608a7aa1eSSimon Glass edp_info->lt_info.cr_loop[3] = 0; 26708a7aa1eSSimon Glass 26808a7aa1eSSimon Glass /* Set sink to D0 (Sink Not Ready) mode. */ 2698c9b8dc0SSimon Glass ret = exynos_dp_write_byte_to_dpcd(dp_regs, DPCD_SINK_POWER_STATE, 27008a7aa1eSSimon Glass DPCD_SET_POWER_STATE_D0); 27108a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 27208a7aa1eSSimon Glass printf("DP write_dpcd_byte failed\n"); 27308a7aa1eSSimon Glass return ret; 27408a7aa1eSSimon Glass } 27508a7aa1eSSimon Glass 27608a7aa1eSSimon Glass /* Set link rate and count as you want to establish */ 2778c9b8dc0SSimon Glass exynos_dp_set_link_bandwidth(dp_regs, edp_info->lane_bw); 2788c9b8dc0SSimon Glass exynos_dp_set_lane_count(dp_regs, edp_info->lane_cnt); 27908a7aa1eSSimon Glass 28008a7aa1eSSimon Glass /* Setup RX configuration */ 28108a7aa1eSSimon Glass buf[0] = edp_info->lane_bw; 28208a7aa1eSSimon Glass buf[1] = edp_info->lane_cnt; 28308a7aa1eSSimon Glass 2848c9b8dc0SSimon Glass ret = exynos_dp_write_bytes_to_dpcd(dp_regs, DPCD_LINK_BW_SET, 2, buf); 28508a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 28608a7aa1eSSimon Glass printf("DP write_dpcd_byte failed\n"); 28708a7aa1eSSimon Glass return ret; 28808a7aa1eSSimon Glass } 28908a7aa1eSSimon Glass 2908c9b8dc0SSimon Glass exynos_dp_set_lane_pre_emphasis(dp_regs, PRE_EMPHASIS_LEVEL_0, 29108a7aa1eSSimon Glass edp_info->lane_cnt); 29208a7aa1eSSimon Glass 29308a7aa1eSSimon Glass /* Set training pattern 1 */ 2948c9b8dc0SSimon Glass exynos_dp_set_training_pattern(dp_regs, TRAINING_PTN1); 29508a7aa1eSSimon Glass 29608a7aa1eSSimon Glass /* Set RX training pattern */ 29708a7aa1eSSimon Glass buf[0] = DPCD_SCRAMBLING_DISABLED | DPCD_TRAINING_PATTERN_1; 29808a7aa1eSSimon Glass 29908a7aa1eSSimon Glass buf[1] = DPCD_PRE_EMPHASIS_SET_PATTERN_2_LEVEL_0 | 30008a7aa1eSSimon Glass DPCD_VOLTAGE_SWING_SET_PATTERN_1_LEVEL_0; 30108a7aa1eSSimon Glass buf[2] = DPCD_PRE_EMPHASIS_SET_PATTERN_2_LEVEL_0 | 30208a7aa1eSSimon Glass DPCD_VOLTAGE_SWING_SET_PATTERN_1_LEVEL_0; 30308a7aa1eSSimon Glass buf[3] = DPCD_PRE_EMPHASIS_SET_PATTERN_2_LEVEL_0 | 30408a7aa1eSSimon Glass DPCD_VOLTAGE_SWING_SET_PATTERN_1_LEVEL_0; 30508a7aa1eSSimon Glass buf[4] = DPCD_PRE_EMPHASIS_SET_PATTERN_2_LEVEL_0 | 30608a7aa1eSSimon Glass DPCD_VOLTAGE_SWING_SET_PATTERN_1_LEVEL_0; 30708a7aa1eSSimon Glass 3088c9b8dc0SSimon Glass ret = exynos_dp_write_bytes_to_dpcd(dp_regs, DPCD_TRAINING_PATTERN_SET, 30908a7aa1eSSimon Glass 5, buf); 31008a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 31108a7aa1eSSimon Glass printf("DP write_dpcd_byte failed\n"); 31208a7aa1eSSimon Glass return ret; 31308a7aa1eSSimon Glass } 31408a7aa1eSSimon Glass 31508a7aa1eSSimon Glass return ret; 31608a7aa1eSSimon Glass } 31708a7aa1eSSimon Glass 3188c9b8dc0SSimon Glass static unsigned int exynos_dp_training_pattern_dis(struct exynos_dp *dp_regs) 31908a7aa1eSSimon Glass { 32008a7aa1eSSimon Glass unsigned int ret = EXYNOS_DP_SUCCESS; 32108a7aa1eSSimon Glass 3228c9b8dc0SSimon Glass exynos_dp_set_training_pattern(dp_regs, DP_NONE); 32308a7aa1eSSimon Glass 3248c9b8dc0SSimon Glass ret = exynos_dp_write_byte_to_dpcd(dp_regs, DPCD_TRAINING_PATTERN_SET, 32508a7aa1eSSimon Glass DPCD_TRAINING_PATTERN_DISABLED); 32608a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 32708a7aa1eSSimon Glass printf("DP request_link_training_req failed\n"); 32808a7aa1eSSimon Glass return -EAGAIN; 32908a7aa1eSSimon Glass } 33008a7aa1eSSimon Glass 33108a7aa1eSSimon Glass return ret; 33208a7aa1eSSimon Glass } 33308a7aa1eSSimon Glass 3348c9b8dc0SSimon Glass static unsigned int exynos_dp_enable_rx_to_enhanced_mode( 3358c9b8dc0SSimon Glass struct exynos_dp *dp_regs, unsigned char enable) 33608a7aa1eSSimon Glass { 33708a7aa1eSSimon Glass unsigned char data; 33808a7aa1eSSimon Glass unsigned int ret = EXYNOS_DP_SUCCESS; 33908a7aa1eSSimon Glass 3408c9b8dc0SSimon Glass ret = exynos_dp_read_byte_from_dpcd(dp_regs, DPCD_LANE_COUNT_SET, 34108a7aa1eSSimon Glass &data); 34208a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 34308a7aa1eSSimon Glass printf("DP read_from_dpcd failed\n"); 34408a7aa1eSSimon Glass return -EAGAIN; 34508a7aa1eSSimon Glass } 34608a7aa1eSSimon Glass 34708a7aa1eSSimon Glass if (enable) 34808a7aa1eSSimon Glass data = DPCD_ENHANCED_FRAME_EN | DPCD_LN_COUNT_SET(data); 34908a7aa1eSSimon Glass else 35008a7aa1eSSimon Glass data = DPCD_LN_COUNT_SET(data); 35108a7aa1eSSimon Glass 3528c9b8dc0SSimon Glass ret = exynos_dp_write_byte_to_dpcd(dp_regs, DPCD_LANE_COUNT_SET, data); 35308a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 35408a7aa1eSSimon Glass printf("DP write_to_dpcd failed\n"); 35508a7aa1eSSimon Glass return -EAGAIN; 35608a7aa1eSSimon Glass 35708a7aa1eSSimon Glass } 35808a7aa1eSSimon Glass 35908a7aa1eSSimon Glass return ret; 36008a7aa1eSSimon Glass } 36108a7aa1eSSimon Glass 3628c9b8dc0SSimon Glass static unsigned int exynos_dp_set_enhanced_mode(struct exynos_dp *dp_regs, 3638c9b8dc0SSimon Glass unsigned char enhance_mode) 36408a7aa1eSSimon Glass { 36508a7aa1eSSimon Glass unsigned int ret = EXYNOS_DP_SUCCESS; 36608a7aa1eSSimon Glass 3678c9b8dc0SSimon Glass ret = exynos_dp_enable_rx_to_enhanced_mode(dp_regs, enhance_mode); 36808a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 36908a7aa1eSSimon Glass printf("DP rx_enhance_mode failed\n"); 37008a7aa1eSSimon Glass return -EAGAIN; 37108a7aa1eSSimon Glass } 37208a7aa1eSSimon Glass 3738c9b8dc0SSimon Glass exynos_dp_enable_enhanced_mode(dp_regs, enhance_mode); 37408a7aa1eSSimon Glass 37508a7aa1eSSimon Glass return ret; 37608a7aa1eSSimon Glass } 37708a7aa1eSSimon Glass 3788c9b8dc0SSimon Glass static int exynos_dp_read_dpcd_lane_stat(struct exynos_dp *dp_regs, 3798c9b8dc0SSimon Glass struct edp_device_info *edp_info, 38008a7aa1eSSimon Glass unsigned char *status) 38108a7aa1eSSimon Glass { 38208a7aa1eSSimon Glass unsigned int ret, i; 38308a7aa1eSSimon Glass unsigned char buf[2]; 38408a7aa1eSSimon Glass unsigned char lane_stat[DP_LANE_CNT_4] = {0,}; 38508a7aa1eSSimon Glass unsigned char shift_val[DP_LANE_CNT_4] = {0,}; 38608a7aa1eSSimon Glass 38708a7aa1eSSimon Glass shift_val[0] = 0; 38808a7aa1eSSimon Glass shift_val[1] = 4; 38908a7aa1eSSimon Glass shift_val[2] = 0; 39008a7aa1eSSimon Glass shift_val[3] = 4; 39108a7aa1eSSimon Glass 3928c9b8dc0SSimon Glass ret = exynos_dp_read_bytes_from_dpcd(dp_regs, DPCD_LANE0_1_STATUS, 2, 3938c9b8dc0SSimon Glass buf); 39408a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 39508a7aa1eSSimon Glass printf("DP read lane status failed\n"); 39608a7aa1eSSimon Glass return ret; 39708a7aa1eSSimon Glass } 39808a7aa1eSSimon Glass 39908a7aa1eSSimon Glass for (i = 0; i < edp_info->lane_cnt; i++) { 40008a7aa1eSSimon Glass lane_stat[i] = (buf[(i / 2)] >> shift_val[i]) & 0x0f; 40108a7aa1eSSimon Glass if (lane_stat[0] != lane_stat[i]) { 40208a7aa1eSSimon Glass printf("Wrong lane status\n"); 40308a7aa1eSSimon Glass return -EINVAL; 40408a7aa1eSSimon Glass } 40508a7aa1eSSimon Glass } 40608a7aa1eSSimon Glass 40708a7aa1eSSimon Glass *status = lane_stat[0]; 40808a7aa1eSSimon Glass 40908a7aa1eSSimon Glass return ret; 41008a7aa1eSSimon Glass } 41108a7aa1eSSimon Glass 4128c9b8dc0SSimon Glass static unsigned int exynos_dp_read_dpcd_adj_req(struct exynos_dp *dp_regs, 4138c9b8dc0SSimon Glass unsigned char lane_num, unsigned char *sw, unsigned char *em) 41408a7aa1eSSimon Glass { 41508a7aa1eSSimon Glass unsigned int ret = EXYNOS_DP_SUCCESS; 41608a7aa1eSSimon Glass unsigned char buf; 41708a7aa1eSSimon Glass unsigned int dpcd_addr; 41808a7aa1eSSimon Glass unsigned char shift_val[DP_LANE_CNT_4] = {0, 4, 0, 4}; 41908a7aa1eSSimon Glass 42008a7aa1eSSimon Glass /* lane_num value is used as array index, so this range 0 ~ 3 */ 42108a7aa1eSSimon Glass dpcd_addr = DPCD_ADJUST_REQUEST_LANE0_1 + (lane_num / 2); 42208a7aa1eSSimon Glass 4238c9b8dc0SSimon Glass ret = exynos_dp_read_byte_from_dpcd(dp_regs, dpcd_addr, &buf); 42408a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 42508a7aa1eSSimon Glass printf("DP read adjust request failed\n"); 42608a7aa1eSSimon Glass return -EAGAIN; 42708a7aa1eSSimon Glass } 42808a7aa1eSSimon Glass 42908a7aa1eSSimon Glass *sw = ((buf >> shift_val[lane_num]) & 0x03); 43008a7aa1eSSimon Glass *em = ((buf >> shift_val[lane_num]) & 0x0c) >> 2; 43108a7aa1eSSimon Glass 43208a7aa1eSSimon Glass return ret; 43308a7aa1eSSimon Glass } 43408a7aa1eSSimon Glass 4358c9b8dc0SSimon Glass static int exynos_dp_equalizer_err_link(struct exynos_dp *dp_regs, 4368c9b8dc0SSimon Glass struct edp_device_info *edp_info) 43708a7aa1eSSimon Glass { 43808a7aa1eSSimon Glass int ret; 43908a7aa1eSSimon Glass 4408c9b8dc0SSimon Glass ret = exynos_dp_training_pattern_dis(dp_regs); 44108a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 44208a7aa1eSSimon Glass printf("DP training_pattern_disable() failed\n"); 44308a7aa1eSSimon Glass edp_info->lt_info.lt_status = DP_LT_FAIL; 44408a7aa1eSSimon Glass } 44508a7aa1eSSimon Glass 4468c9b8dc0SSimon Glass ret = exynos_dp_set_enhanced_mode(dp_regs, edp_info->dpcd_efc); 44708a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 44808a7aa1eSSimon Glass printf("DP set_enhanced_mode() failed\n"); 44908a7aa1eSSimon Glass edp_info->lt_info.lt_status = DP_LT_FAIL; 45008a7aa1eSSimon Glass } 45108a7aa1eSSimon Glass 45208a7aa1eSSimon Glass return ret; 45308a7aa1eSSimon Glass } 45408a7aa1eSSimon Glass 4558c9b8dc0SSimon Glass static int exynos_dp_reduce_link_rate(struct exynos_dp *dp_regs, 4568c9b8dc0SSimon Glass struct edp_device_info *edp_info) 45708a7aa1eSSimon Glass { 45808a7aa1eSSimon Glass int ret; 45908a7aa1eSSimon Glass 46008a7aa1eSSimon Glass if (edp_info->lane_bw == DP_LANE_BW_2_70) { 46108a7aa1eSSimon Glass edp_info->lane_bw = DP_LANE_BW_1_62; 46208a7aa1eSSimon Glass printf("DP Change lane bw to 1.62Gbps\n"); 46308a7aa1eSSimon Glass edp_info->lt_info.lt_status = DP_LT_START; 46408a7aa1eSSimon Glass ret = EXYNOS_DP_SUCCESS; 46508a7aa1eSSimon Glass } else { 4668c9b8dc0SSimon Glass ret = exynos_dp_training_pattern_dis(dp_regs); 46708a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) 46808a7aa1eSSimon Glass printf("DP training_patter_disable() failed\n"); 46908a7aa1eSSimon Glass 4708c9b8dc0SSimon Glass ret = exynos_dp_set_enhanced_mode(dp_regs, edp_info->dpcd_efc); 47108a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) 47208a7aa1eSSimon Glass printf("DP set_enhanced_mode() failed\n"); 47308a7aa1eSSimon Glass 47408a7aa1eSSimon Glass edp_info->lt_info.lt_status = DP_LT_FAIL; 47508a7aa1eSSimon Glass } 47608a7aa1eSSimon Glass 47708a7aa1eSSimon Glass return ret; 47808a7aa1eSSimon Glass } 47908a7aa1eSSimon Glass 4808c9b8dc0SSimon Glass static unsigned int exynos_dp_process_clock_recovery(struct exynos_dp *dp_regs, 4818c9b8dc0SSimon Glass struct edp_device_info *edp_info) 48208a7aa1eSSimon Glass { 48308a7aa1eSSimon Glass unsigned int ret = EXYNOS_DP_SUCCESS; 48408a7aa1eSSimon Glass unsigned char lane_stat; 48508a7aa1eSSimon Glass unsigned char lt_ctl_val[DP_LANE_CNT_4] = {0, }; 48608a7aa1eSSimon Glass unsigned int i; 48708a7aa1eSSimon Glass unsigned char adj_req_sw; 48808a7aa1eSSimon Glass unsigned char adj_req_em; 48908a7aa1eSSimon Glass unsigned char buf[5]; 49008a7aa1eSSimon Glass 49108a7aa1eSSimon Glass debug("DP: %s was called\n", __func__); 49208a7aa1eSSimon Glass mdelay(1); 49308a7aa1eSSimon Glass 4948c9b8dc0SSimon Glass ret = exynos_dp_read_dpcd_lane_stat(dp_regs, edp_info, &lane_stat); 49508a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 49608a7aa1eSSimon Glass printf("DP read lane status failed\n"); 49708a7aa1eSSimon Glass edp_info->lt_info.lt_status = DP_LT_FAIL; 49808a7aa1eSSimon Glass return ret; 49908a7aa1eSSimon Glass } 50008a7aa1eSSimon Glass 50108a7aa1eSSimon Glass if (lane_stat & DP_LANE_STAT_CR_DONE) { 50208a7aa1eSSimon Glass debug("DP clock Recovery training succeed\n"); 5038c9b8dc0SSimon Glass exynos_dp_set_training_pattern(dp_regs, TRAINING_PTN2); 50408a7aa1eSSimon Glass 50508a7aa1eSSimon Glass for (i = 0; i < edp_info->lane_cnt; i++) { 5068c9b8dc0SSimon Glass ret = exynos_dp_read_dpcd_adj_req(dp_regs, i, 5078c9b8dc0SSimon Glass &adj_req_sw, &adj_req_em); 50808a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 50908a7aa1eSSimon Glass edp_info->lt_info.lt_status = DP_LT_FAIL; 51008a7aa1eSSimon Glass return ret; 51108a7aa1eSSimon Glass } 51208a7aa1eSSimon Glass 51308a7aa1eSSimon Glass lt_ctl_val[i] = 0; 51408a7aa1eSSimon Glass lt_ctl_val[i] = adj_req_em << 3 | adj_req_sw; 51508a7aa1eSSimon Glass 51608a7aa1eSSimon Glass if ((adj_req_sw == VOLTAGE_LEVEL_3) 51708a7aa1eSSimon Glass || (adj_req_em == PRE_EMPHASIS_LEVEL_3)) { 51808a7aa1eSSimon Glass lt_ctl_val[i] |= MAX_DRIVE_CURRENT_REACH_3 | 51908a7aa1eSSimon Glass MAX_PRE_EMPHASIS_REACH_3; 52008a7aa1eSSimon Glass } 5218c9b8dc0SSimon Glass exynos_dp_set_lanex_pre_emphasis(dp_regs, 5228c9b8dc0SSimon Glass lt_ctl_val[i], i); 52308a7aa1eSSimon Glass } 52408a7aa1eSSimon Glass 52508a7aa1eSSimon Glass buf[0] = DPCD_SCRAMBLING_DISABLED | DPCD_TRAINING_PATTERN_2; 52608a7aa1eSSimon Glass buf[1] = lt_ctl_val[0]; 52708a7aa1eSSimon Glass buf[2] = lt_ctl_val[1]; 52808a7aa1eSSimon Glass buf[3] = lt_ctl_val[2]; 52908a7aa1eSSimon Glass buf[4] = lt_ctl_val[3]; 53008a7aa1eSSimon Glass 5318c9b8dc0SSimon Glass ret = exynos_dp_write_bytes_to_dpcd(dp_regs, 53208a7aa1eSSimon Glass DPCD_TRAINING_PATTERN_SET, 5, buf); 53308a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 53408a7aa1eSSimon Glass printf("DP write training pattern1 failed\n"); 53508a7aa1eSSimon Glass edp_info->lt_info.lt_status = DP_LT_FAIL; 53608a7aa1eSSimon Glass return ret; 53708a7aa1eSSimon Glass } else 53808a7aa1eSSimon Glass edp_info->lt_info.lt_status = DP_LT_ET; 53908a7aa1eSSimon Glass } else { 54008a7aa1eSSimon Glass for (i = 0; i < edp_info->lane_cnt; i++) { 5418c9b8dc0SSimon Glass lt_ctl_val[i] = exynos_dp_get_lanex_pre_emphasis( 5428c9b8dc0SSimon Glass dp_regs, i); 5438c9b8dc0SSimon Glass ret = exynos_dp_read_dpcd_adj_req(dp_regs, i, 54408a7aa1eSSimon Glass &adj_req_sw, &adj_req_em); 54508a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 54608a7aa1eSSimon Glass printf("DP read adj req failed\n"); 54708a7aa1eSSimon Glass edp_info->lt_info.lt_status = DP_LT_FAIL; 54808a7aa1eSSimon Glass return ret; 54908a7aa1eSSimon Glass } 55008a7aa1eSSimon Glass 55108a7aa1eSSimon Glass if ((adj_req_sw == VOLTAGE_LEVEL_3) || 55208a7aa1eSSimon Glass (adj_req_em == PRE_EMPHASIS_LEVEL_3)) 5538c9b8dc0SSimon Glass ret = exynos_dp_reduce_link_rate(dp_regs, 5548c9b8dc0SSimon Glass edp_info); 55508a7aa1eSSimon Glass 55608a7aa1eSSimon Glass if ((DRIVE_CURRENT_SET_0_GET(lt_ctl_val[i]) == 55708a7aa1eSSimon Glass adj_req_sw) && 55808a7aa1eSSimon Glass (PRE_EMPHASIS_SET_0_GET(lt_ctl_val[i]) == 55908a7aa1eSSimon Glass adj_req_em)) { 56008a7aa1eSSimon Glass edp_info->lt_info.cr_loop[i]++; 56108a7aa1eSSimon Glass if (edp_info->lt_info.cr_loop[i] == MAX_CR_LOOP) 56208a7aa1eSSimon Glass ret = exynos_dp_reduce_link_rate( 5638c9b8dc0SSimon Glass dp_regs, edp_info); 56408a7aa1eSSimon Glass } 56508a7aa1eSSimon Glass 56608a7aa1eSSimon Glass lt_ctl_val[i] = 0; 56708a7aa1eSSimon Glass lt_ctl_val[i] = adj_req_em << 3 | adj_req_sw; 56808a7aa1eSSimon Glass 56908a7aa1eSSimon Glass if ((adj_req_sw == VOLTAGE_LEVEL_3) || 57008a7aa1eSSimon Glass (adj_req_em == PRE_EMPHASIS_LEVEL_3)) { 57108a7aa1eSSimon Glass lt_ctl_val[i] |= MAX_DRIVE_CURRENT_REACH_3 | 57208a7aa1eSSimon Glass MAX_PRE_EMPHASIS_REACH_3; 57308a7aa1eSSimon Glass } 5748c9b8dc0SSimon Glass exynos_dp_set_lanex_pre_emphasis(dp_regs, 5758c9b8dc0SSimon Glass lt_ctl_val[i], i); 57608a7aa1eSSimon Glass } 57708a7aa1eSSimon Glass 5788c9b8dc0SSimon Glass ret = exynos_dp_write_bytes_to_dpcd(dp_regs, 57908a7aa1eSSimon Glass DPCD_TRAINING_LANE0_SET, 4, lt_ctl_val); 58008a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 58108a7aa1eSSimon Glass printf("DP write training pattern2 failed\n"); 58208a7aa1eSSimon Glass edp_info->lt_info.lt_status = DP_LT_FAIL; 58308a7aa1eSSimon Glass return ret; 58408a7aa1eSSimon Glass } 58508a7aa1eSSimon Glass } 58608a7aa1eSSimon Glass 58708a7aa1eSSimon Glass return ret; 58808a7aa1eSSimon Glass } 58908a7aa1eSSimon Glass 5908c9b8dc0SSimon Glass static unsigned int exynos_dp_process_equalizer_training( 5918c9b8dc0SSimon Glass struct exynos_dp *dp_regs, struct edp_device_info *edp_info) 59208a7aa1eSSimon Glass { 59308a7aa1eSSimon Glass unsigned int ret = EXYNOS_DP_SUCCESS; 59408a7aa1eSSimon Glass unsigned char lane_stat, adj_req_sw, adj_req_em, i; 59508a7aa1eSSimon Glass unsigned char lt_ctl_val[DP_LANE_CNT_4] = {0,}; 59608a7aa1eSSimon Glass unsigned char interlane_aligned = 0; 59708a7aa1eSSimon Glass unsigned char f_bw; 59808a7aa1eSSimon Glass unsigned char f_lane_cnt; 59908a7aa1eSSimon Glass unsigned char sink_stat; 60008a7aa1eSSimon Glass 60108a7aa1eSSimon Glass mdelay(1); 60208a7aa1eSSimon Glass 6038c9b8dc0SSimon Glass ret = exynos_dp_read_dpcd_lane_stat(dp_regs, edp_info, &lane_stat); 60408a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 60508a7aa1eSSimon Glass printf("DP read lane status failed\n"); 60608a7aa1eSSimon Glass edp_info->lt_info.lt_status = DP_LT_FAIL; 60708a7aa1eSSimon Glass return ret; 60808a7aa1eSSimon Glass } 60908a7aa1eSSimon Glass 61008a7aa1eSSimon Glass debug("DP lane stat : %x\n", lane_stat); 61108a7aa1eSSimon Glass 61208a7aa1eSSimon Glass if (lane_stat & DP_LANE_STAT_CR_DONE) { 6138c9b8dc0SSimon Glass ret = exynos_dp_read_byte_from_dpcd(dp_regs, 6148c9b8dc0SSimon Glass DPCD_LN_ALIGN_UPDATED, 61508a7aa1eSSimon Glass &sink_stat); 61608a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 61708a7aa1eSSimon Glass edp_info->lt_info.lt_status = DP_LT_FAIL; 61808a7aa1eSSimon Glass 61908a7aa1eSSimon Glass return ret; 62008a7aa1eSSimon Glass } 62108a7aa1eSSimon Glass 62208a7aa1eSSimon Glass interlane_aligned = (sink_stat & DPCD_INTERLANE_ALIGN_DONE); 62308a7aa1eSSimon Glass 62408a7aa1eSSimon Glass for (i = 0; i < edp_info->lane_cnt; i++) { 6258c9b8dc0SSimon Glass ret = exynos_dp_read_dpcd_adj_req(dp_regs, i, 62608a7aa1eSSimon Glass &adj_req_sw, &adj_req_em); 62708a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 62808a7aa1eSSimon Glass printf("DP read adj req 1 failed\n"); 62908a7aa1eSSimon Glass edp_info->lt_info.lt_status = DP_LT_FAIL; 63008a7aa1eSSimon Glass 63108a7aa1eSSimon Glass return ret; 63208a7aa1eSSimon Glass } 63308a7aa1eSSimon Glass 63408a7aa1eSSimon Glass lt_ctl_val[i] = 0; 63508a7aa1eSSimon Glass lt_ctl_val[i] = adj_req_em << 3 | adj_req_sw; 63608a7aa1eSSimon Glass 63708a7aa1eSSimon Glass if ((adj_req_sw == VOLTAGE_LEVEL_3) || 63808a7aa1eSSimon Glass (adj_req_em == PRE_EMPHASIS_LEVEL_3)) { 63908a7aa1eSSimon Glass lt_ctl_val[i] |= MAX_DRIVE_CURRENT_REACH_3; 64008a7aa1eSSimon Glass lt_ctl_val[i] |= MAX_PRE_EMPHASIS_REACH_3; 64108a7aa1eSSimon Glass } 64208a7aa1eSSimon Glass } 64308a7aa1eSSimon Glass 64408a7aa1eSSimon Glass if (((lane_stat&DP_LANE_STAT_CE_DONE) && 64508a7aa1eSSimon Glass (lane_stat&DP_LANE_STAT_SYM_LOCK)) 64608a7aa1eSSimon Glass && (interlane_aligned == DPCD_INTERLANE_ALIGN_DONE)) { 64708a7aa1eSSimon Glass debug("DP Equalizer training succeed\n"); 64808a7aa1eSSimon Glass 6498c9b8dc0SSimon Glass f_bw = exynos_dp_get_link_bandwidth(dp_regs); 6508c9b8dc0SSimon Glass f_lane_cnt = exynos_dp_get_lane_count(dp_regs); 65108a7aa1eSSimon Glass 65208a7aa1eSSimon Glass debug("DP final BandWidth : %x\n", f_bw); 65308a7aa1eSSimon Glass debug("DP final Lane Count : %x\n", f_lane_cnt); 65408a7aa1eSSimon Glass 65508a7aa1eSSimon Glass edp_info->lt_info.lt_status = DP_LT_FINISHED; 65608a7aa1eSSimon Glass 6578c9b8dc0SSimon Glass exynos_dp_equalizer_err_link(dp_regs, edp_info); 65808a7aa1eSSimon Glass 65908a7aa1eSSimon Glass } else { 66008a7aa1eSSimon Glass edp_info->lt_info.ep_loop++; 66108a7aa1eSSimon Glass 66208a7aa1eSSimon Glass if (edp_info->lt_info.ep_loop > MAX_EQ_LOOP) { 66308a7aa1eSSimon Glass if (edp_info->lane_bw == DP_LANE_BW_2_70) { 66408a7aa1eSSimon Glass ret = exynos_dp_reduce_link_rate( 6658c9b8dc0SSimon Glass dp_regs, edp_info); 66608a7aa1eSSimon Glass } else { 66708a7aa1eSSimon Glass edp_info->lt_info.lt_status = 66808a7aa1eSSimon Glass DP_LT_FAIL; 6698c9b8dc0SSimon Glass exynos_dp_equalizer_err_link(dp_regs, 6708c9b8dc0SSimon Glass edp_info); 67108a7aa1eSSimon Glass } 67208a7aa1eSSimon Glass } else { 67308a7aa1eSSimon Glass for (i = 0; i < edp_info->lane_cnt; i++) 67408a7aa1eSSimon Glass exynos_dp_set_lanex_pre_emphasis( 6758c9b8dc0SSimon Glass dp_regs, lt_ctl_val[i], i); 67608a7aa1eSSimon Glass 6778c9b8dc0SSimon Glass ret = exynos_dp_write_bytes_to_dpcd(dp_regs, 67808a7aa1eSSimon Glass DPCD_TRAINING_LANE0_SET, 67908a7aa1eSSimon Glass 4, lt_ctl_val); 68008a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 68108a7aa1eSSimon Glass printf("DP set lt pattern failed\n"); 68208a7aa1eSSimon Glass edp_info->lt_info.lt_status = 68308a7aa1eSSimon Glass DP_LT_FAIL; 6848c9b8dc0SSimon Glass exynos_dp_equalizer_err_link(dp_regs, 6858c9b8dc0SSimon Glass edp_info); 68608a7aa1eSSimon Glass } 68708a7aa1eSSimon Glass } 68808a7aa1eSSimon Glass } 68908a7aa1eSSimon Glass } else if (edp_info->lane_bw == DP_LANE_BW_2_70) { 6908c9b8dc0SSimon Glass ret = exynos_dp_reduce_link_rate(dp_regs, edp_info); 69108a7aa1eSSimon Glass } else { 69208a7aa1eSSimon Glass edp_info->lt_info.lt_status = DP_LT_FAIL; 6938c9b8dc0SSimon Glass exynos_dp_equalizer_err_link(dp_regs, edp_info); 69408a7aa1eSSimon Glass } 69508a7aa1eSSimon Glass 69608a7aa1eSSimon Glass return ret; 69708a7aa1eSSimon Glass } 69808a7aa1eSSimon Glass 6998c9b8dc0SSimon Glass static unsigned int exynos_dp_sw_link_training(struct exynos_dp *dp_regs, 7008c9b8dc0SSimon Glass struct edp_device_info *edp_info) 70108a7aa1eSSimon Glass { 70208a7aa1eSSimon Glass unsigned int ret = 0; 70308a7aa1eSSimon Glass int training_finished; 70408a7aa1eSSimon Glass 70508a7aa1eSSimon Glass /* Turn off unnecessary lane */ 70608a7aa1eSSimon Glass if (edp_info->lane_cnt == 1) 7078c9b8dc0SSimon Glass exynos_dp_set_analog_power_down(dp_regs, CH1_BLOCK, 1); 70808a7aa1eSSimon Glass 70908a7aa1eSSimon Glass training_finished = 0; 71008a7aa1eSSimon Glass 71108a7aa1eSSimon Glass edp_info->lt_info.lt_status = DP_LT_START; 71208a7aa1eSSimon Glass 71308a7aa1eSSimon Glass /* Process here */ 71408a7aa1eSSimon Glass while (!training_finished) { 71508a7aa1eSSimon Glass switch (edp_info->lt_info.lt_status) { 71608a7aa1eSSimon Glass case DP_LT_START: 7178c9b8dc0SSimon Glass ret = exynos_dp_link_start(dp_regs, edp_info); 71808a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 71908a7aa1eSSimon Glass printf("DP LT:link start failed\n"); 72008a7aa1eSSimon Glass return ret; 72108a7aa1eSSimon Glass } 72208a7aa1eSSimon Glass break; 72308a7aa1eSSimon Glass case DP_LT_CR: 7248c9b8dc0SSimon Glass ret = exynos_dp_process_clock_recovery(dp_regs, 7258c9b8dc0SSimon Glass edp_info); 72608a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 72708a7aa1eSSimon Glass printf("DP LT:clock recovery failed\n"); 72808a7aa1eSSimon Glass return ret; 72908a7aa1eSSimon Glass } 73008a7aa1eSSimon Glass break; 73108a7aa1eSSimon Glass case DP_LT_ET: 7328c9b8dc0SSimon Glass ret = exynos_dp_process_equalizer_training(dp_regs, 7338c9b8dc0SSimon Glass edp_info); 73408a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 73508a7aa1eSSimon Glass printf("DP LT:equalizer training failed\n"); 73608a7aa1eSSimon Glass return ret; 73708a7aa1eSSimon Glass } 73808a7aa1eSSimon Glass break; 73908a7aa1eSSimon Glass case DP_LT_FINISHED: 74008a7aa1eSSimon Glass training_finished = 1; 74108a7aa1eSSimon Glass break; 74208a7aa1eSSimon Glass case DP_LT_FAIL: 74308a7aa1eSSimon Glass return -1; 74408a7aa1eSSimon Glass } 74508a7aa1eSSimon Glass } 74608a7aa1eSSimon Glass 74708a7aa1eSSimon Glass return ret; 74808a7aa1eSSimon Glass } 74908a7aa1eSSimon Glass 7508c9b8dc0SSimon Glass static unsigned int exynos_dp_set_link_train(struct exynos_dp *dp_regs, 7518c9b8dc0SSimon Glass struct edp_device_info *edp_info) 75208a7aa1eSSimon Glass { 75308a7aa1eSSimon Glass unsigned int ret; 75408a7aa1eSSimon Glass 7558c9b8dc0SSimon Glass exynos_dp_init_training(dp_regs); 75608a7aa1eSSimon Glass 7578c9b8dc0SSimon Glass ret = exynos_dp_sw_link_training(dp_regs, edp_info); 75808a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) 75908a7aa1eSSimon Glass printf("DP dp_sw_link_training() failed\n"); 76008a7aa1eSSimon Glass 76108a7aa1eSSimon Glass return ret; 76208a7aa1eSSimon Glass } 76308a7aa1eSSimon Glass 7648c9b8dc0SSimon Glass static void exynos_dp_enable_scramble(struct exynos_dp *dp_regs, 7658c9b8dc0SSimon Glass unsigned int enable) 76608a7aa1eSSimon Glass { 76708a7aa1eSSimon Glass unsigned char data; 76808a7aa1eSSimon Glass 76908a7aa1eSSimon Glass if (enable) { 7708c9b8dc0SSimon Glass exynos_dp_enable_scrambling(dp_regs, DP_ENABLE); 77108a7aa1eSSimon Glass 7728c9b8dc0SSimon Glass exynos_dp_read_byte_from_dpcd(dp_regs, 7738c9b8dc0SSimon Glass DPCD_TRAINING_PATTERN_SET, &data); 7748c9b8dc0SSimon Glass exynos_dp_write_byte_to_dpcd(dp_regs, DPCD_TRAINING_PATTERN_SET, 77508a7aa1eSSimon Glass (u8)(data & ~DPCD_SCRAMBLING_DISABLED)); 77608a7aa1eSSimon Glass } else { 7778c9b8dc0SSimon Glass exynos_dp_enable_scrambling(dp_regs, DP_DISABLE); 7788c9b8dc0SSimon Glass exynos_dp_read_byte_from_dpcd(dp_regs, 7798c9b8dc0SSimon Glass DPCD_TRAINING_PATTERN_SET, &data); 7808c9b8dc0SSimon Glass exynos_dp_write_byte_to_dpcd(dp_regs, DPCD_TRAINING_PATTERN_SET, 78108a7aa1eSSimon Glass (u8)(data | DPCD_SCRAMBLING_DISABLED)); 78208a7aa1eSSimon Glass } 78308a7aa1eSSimon Glass } 78408a7aa1eSSimon Glass 7858c9b8dc0SSimon Glass static unsigned int exynos_dp_config_video(struct exynos_dp *dp_regs, 7868c9b8dc0SSimon Glass struct edp_device_info *edp_info) 78708a7aa1eSSimon Glass { 78808a7aa1eSSimon Glass unsigned int ret = 0; 78908a7aa1eSSimon Glass unsigned int retry_cnt; 79008a7aa1eSSimon Glass 79108a7aa1eSSimon Glass mdelay(1); 79208a7aa1eSSimon Glass 79308a7aa1eSSimon Glass if (edp_info->video_info.master_mode) { 79408a7aa1eSSimon Glass printf("DP does not support master mode\n"); 79508a7aa1eSSimon Glass return -ENODEV; 79608a7aa1eSSimon Glass } else { 79708a7aa1eSSimon Glass /* debug slave */ 7988c9b8dc0SSimon Glass exynos_dp_config_video_slave_mode(dp_regs, 7998c9b8dc0SSimon Glass &edp_info->video_info); 80008a7aa1eSSimon Glass } 80108a7aa1eSSimon Glass 8028c9b8dc0SSimon Glass exynos_dp_set_video_color_format(dp_regs, &edp_info->video_info); 80308a7aa1eSSimon Glass 80408a7aa1eSSimon Glass if (edp_info->video_info.bist_mode) { 8058c9b8dc0SSimon Glass if (exynos_dp_config_video_bist(dp_regs, edp_info) != 0) 80608a7aa1eSSimon Glass return -1; 80708a7aa1eSSimon Glass } 80808a7aa1eSSimon Glass 8098c9b8dc0SSimon Glass ret = exynos_dp_get_pll_lock_status(dp_regs); 81008a7aa1eSSimon Glass if (ret != PLL_LOCKED) { 81108a7aa1eSSimon Glass printf("DP PLL is not locked yet\n"); 81208a7aa1eSSimon Glass return -EIO; 81308a7aa1eSSimon Glass } 81408a7aa1eSSimon Glass 81508a7aa1eSSimon Glass if (edp_info->video_info.master_mode == 0) { 81608a7aa1eSSimon Glass retry_cnt = 10; 81708a7aa1eSSimon Glass while (retry_cnt) { 8188c9b8dc0SSimon Glass ret = exynos_dp_is_slave_video_stream_clock_on(dp_regs); 81908a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 82008a7aa1eSSimon Glass if (retry_cnt == 0) { 82108a7aa1eSSimon Glass printf("DP stream_clock_on failed\n"); 82208a7aa1eSSimon Glass return ret; 82308a7aa1eSSimon Glass } 82408a7aa1eSSimon Glass retry_cnt--; 82508a7aa1eSSimon Glass mdelay(1); 82608a7aa1eSSimon Glass } else 82708a7aa1eSSimon Glass break; 82808a7aa1eSSimon Glass } 82908a7aa1eSSimon Glass } 83008a7aa1eSSimon Glass 83108a7aa1eSSimon Glass /* Set to use the register calculated M/N video */ 8328c9b8dc0SSimon Glass exynos_dp_set_video_cr_mn(dp_regs, CALCULATED_M, 0, 0); 83308a7aa1eSSimon Glass 83408a7aa1eSSimon Glass /* For video bist, Video timing must be generated by register */ 8358c9b8dc0SSimon Glass exynos_dp_set_video_timing_mode(dp_regs, VIDEO_TIMING_FROM_CAPTURE); 83608a7aa1eSSimon Glass 83708a7aa1eSSimon Glass /* Enable video bist */ 83808a7aa1eSSimon Glass if (edp_info->video_info.bist_pattern != COLOR_RAMP && 83908a7aa1eSSimon Glass edp_info->video_info.bist_pattern != BALCK_WHITE_V_LINES && 84008a7aa1eSSimon Glass edp_info->video_info.bist_pattern != COLOR_SQUARE) 8418c9b8dc0SSimon Glass exynos_dp_enable_video_bist(dp_regs, 8428c9b8dc0SSimon Glass edp_info->video_info.bist_mode); 84308a7aa1eSSimon Glass else 8448c9b8dc0SSimon Glass exynos_dp_enable_video_bist(dp_regs, DP_DISABLE); 84508a7aa1eSSimon Glass 84608a7aa1eSSimon Glass /* Disable video mute */ 8478c9b8dc0SSimon Glass exynos_dp_enable_video_mute(dp_regs, DP_DISABLE); 84808a7aa1eSSimon Glass 84908a7aa1eSSimon Glass /* Configure video Master or Slave mode */ 8508c9b8dc0SSimon Glass exynos_dp_enable_video_master(dp_regs, 8518c9b8dc0SSimon Glass edp_info->video_info.master_mode); 85208a7aa1eSSimon Glass 85308a7aa1eSSimon Glass /* Enable video */ 8548c9b8dc0SSimon Glass exynos_dp_start_video(dp_regs); 85508a7aa1eSSimon Glass 85608a7aa1eSSimon Glass if (edp_info->video_info.master_mode == 0) { 85708a7aa1eSSimon Glass retry_cnt = 100; 85808a7aa1eSSimon Glass while (retry_cnt) { 8598c9b8dc0SSimon Glass ret = exynos_dp_is_video_stream_on(dp_regs); 86008a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 86108a7aa1eSSimon Glass if (retry_cnt == 0) { 86208a7aa1eSSimon Glass printf("DP Timeout of video stream\n"); 86308a7aa1eSSimon Glass return ret; 86408a7aa1eSSimon Glass } 86508a7aa1eSSimon Glass retry_cnt--; 86608a7aa1eSSimon Glass mdelay(5); 86708a7aa1eSSimon Glass } else 86808a7aa1eSSimon Glass break; 86908a7aa1eSSimon Glass } 87008a7aa1eSSimon Glass } 87108a7aa1eSSimon Glass 87208a7aa1eSSimon Glass return ret; 87308a7aa1eSSimon Glass } 87408a7aa1eSSimon Glass 87508a7aa1eSSimon Glass int exynos_dp_parse_dt(const void *blob, struct edp_device_info *edp_info) 87608a7aa1eSSimon Glass { 87708a7aa1eSSimon Glass unsigned int node = fdtdec_next_compatible(blob, 0, 87808a7aa1eSSimon Glass COMPAT_SAMSUNG_EXYNOS5_DP); 87908a7aa1eSSimon Glass if (node <= 0) { 88008a7aa1eSSimon Glass debug("exynos_dp: Can't get device node for dp\n"); 88108a7aa1eSSimon Glass return -ENODEV; 88208a7aa1eSSimon Glass } 88308a7aa1eSSimon Glass 88408a7aa1eSSimon Glass edp_info->disp_info.h_res = fdtdec_get_int(blob, node, 88508a7aa1eSSimon Glass "samsung,h-res", 0); 88608a7aa1eSSimon Glass edp_info->disp_info.h_sync_width = fdtdec_get_int(blob, node, 88708a7aa1eSSimon Glass "samsung,h-sync-width", 0); 88808a7aa1eSSimon Glass edp_info->disp_info.h_back_porch = fdtdec_get_int(blob, node, 88908a7aa1eSSimon Glass "samsung,h-back-porch", 0); 89008a7aa1eSSimon Glass edp_info->disp_info.h_front_porch = fdtdec_get_int(blob, node, 89108a7aa1eSSimon Glass "samsung,h-front-porch", 0); 89208a7aa1eSSimon Glass edp_info->disp_info.v_res = fdtdec_get_int(blob, node, 89308a7aa1eSSimon Glass "samsung,v-res", 0); 89408a7aa1eSSimon Glass edp_info->disp_info.v_sync_width = fdtdec_get_int(blob, node, 89508a7aa1eSSimon Glass "samsung,v-sync-width", 0); 89608a7aa1eSSimon Glass edp_info->disp_info.v_back_porch = fdtdec_get_int(blob, node, 89708a7aa1eSSimon Glass "samsung,v-back-porch", 0); 89808a7aa1eSSimon Glass edp_info->disp_info.v_front_porch = fdtdec_get_int(blob, node, 89908a7aa1eSSimon Glass "samsung,v-front-porch", 0); 90008a7aa1eSSimon Glass edp_info->disp_info.v_sync_rate = fdtdec_get_int(blob, node, 90108a7aa1eSSimon Glass "samsung,v-sync-rate", 0); 90208a7aa1eSSimon Glass 90308a7aa1eSSimon Glass edp_info->lt_info.lt_status = fdtdec_get_int(blob, node, 90408a7aa1eSSimon Glass "samsung,lt-status", 0); 90508a7aa1eSSimon Glass 90608a7aa1eSSimon Glass edp_info->video_info.master_mode = fdtdec_get_int(blob, node, 90708a7aa1eSSimon Glass "samsung,master-mode", 0); 90808a7aa1eSSimon Glass edp_info->video_info.bist_mode = fdtdec_get_int(blob, node, 90908a7aa1eSSimon Glass "samsung,bist-mode", 0); 91008a7aa1eSSimon Glass edp_info->video_info.bist_pattern = fdtdec_get_int(blob, node, 91108a7aa1eSSimon Glass "samsung,bist-pattern", 0); 91208a7aa1eSSimon Glass edp_info->video_info.h_sync_polarity = fdtdec_get_int(blob, node, 91308a7aa1eSSimon Glass "samsung,h-sync-polarity", 0); 91408a7aa1eSSimon Glass edp_info->video_info.v_sync_polarity = fdtdec_get_int(blob, node, 91508a7aa1eSSimon Glass "samsung,v-sync-polarity", 0); 91608a7aa1eSSimon Glass edp_info->video_info.interlaced = fdtdec_get_int(blob, node, 91708a7aa1eSSimon Glass "samsung,interlaced", 0); 91808a7aa1eSSimon Glass edp_info->video_info.color_space = fdtdec_get_int(blob, node, 91908a7aa1eSSimon Glass "samsung,color-space", 0); 92008a7aa1eSSimon Glass edp_info->video_info.dynamic_range = fdtdec_get_int(blob, node, 92108a7aa1eSSimon Glass "samsung,dynamic-range", 0); 92208a7aa1eSSimon Glass edp_info->video_info.ycbcr_coeff = fdtdec_get_int(blob, node, 92308a7aa1eSSimon Glass "samsung,ycbcr-coeff", 0); 92408a7aa1eSSimon Glass edp_info->video_info.color_depth = fdtdec_get_int(blob, node, 92508a7aa1eSSimon Glass "samsung,color-depth", 0); 92608a7aa1eSSimon Glass return 0; 92708a7aa1eSSimon Glass } 92808a7aa1eSSimon Glass 92908a7aa1eSSimon Glass unsigned int exynos_init_dp(void) 93008a7aa1eSSimon Glass { 93108a7aa1eSSimon Glass unsigned int ret; 93208a7aa1eSSimon Glass struct edp_device_info *edp_info; 9338c9b8dc0SSimon Glass struct exynos_dp *dp_regs; 9348c9b8dc0SSimon Glass int node; 93508a7aa1eSSimon Glass 93608a7aa1eSSimon Glass edp_info = kzalloc(sizeof(struct edp_device_info), GFP_KERNEL); 93708a7aa1eSSimon Glass if (!edp_info) { 93808a7aa1eSSimon Glass debug("failed to allocate edp device object.\n"); 93908a7aa1eSSimon Glass return -EFAULT; 94008a7aa1eSSimon Glass } 94108a7aa1eSSimon Glass 94208a7aa1eSSimon Glass if (exynos_dp_parse_dt(gd->fdt_blob, edp_info)) 94308a7aa1eSSimon Glass debug("unable to parse DP DT node\n"); 94408a7aa1eSSimon Glass 9458c9b8dc0SSimon Glass node = fdtdec_next_compatible(gd->fdt_blob, 0, 9468c9b8dc0SSimon Glass COMPAT_SAMSUNG_EXYNOS5_DP); 9478c9b8dc0SSimon Glass if (node <= 0) 9488c9b8dc0SSimon Glass debug("exynos_dp: Can't get device node for dp\n"); 9498c9b8dc0SSimon Glass 9508c9b8dc0SSimon Glass dp_regs = (struct exynos_dp *)fdtdec_get_addr(gd->fdt_blob, node, 9518c9b8dc0SSimon Glass "reg"); 9528c9b8dc0SSimon Glass if (dp_regs == NULL) 9538c9b8dc0SSimon Glass debug("Can't get the DP base address\n"); 95408a7aa1eSSimon Glass 95508a7aa1eSSimon Glass exynos_dp_disp_info(&edp_info->disp_info); 95608a7aa1eSSimon Glass 957*7eb860dfSSimon Glass exynos_dp_phy_ctrl(1); 95808a7aa1eSSimon Glass 9598c9b8dc0SSimon Glass ret = exynos_dp_init_dp(dp_regs); 96008a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 96108a7aa1eSSimon Glass printf("DP exynos_dp_init_dp() failed\n"); 96208a7aa1eSSimon Glass return ret; 96308a7aa1eSSimon Glass } 96408a7aa1eSSimon Glass 9658c9b8dc0SSimon Glass ret = exynos_dp_handle_edid(dp_regs, edp_info); 96608a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 96708a7aa1eSSimon Glass printf("EDP handle_edid fail\n"); 96808a7aa1eSSimon Glass return ret; 96908a7aa1eSSimon Glass } 97008a7aa1eSSimon Glass 9718c9b8dc0SSimon Glass ret = exynos_dp_set_link_train(dp_regs, edp_info); 97208a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 97308a7aa1eSSimon Glass printf("DP link training fail\n"); 97408a7aa1eSSimon Glass return ret; 97508a7aa1eSSimon Glass } 97608a7aa1eSSimon Glass 9778c9b8dc0SSimon Glass exynos_dp_enable_scramble(dp_regs, DP_ENABLE); 9788c9b8dc0SSimon Glass exynos_dp_enable_rx_to_enhanced_mode(dp_regs, DP_ENABLE); 9798c9b8dc0SSimon Glass exynos_dp_enable_enhanced_mode(dp_regs, DP_ENABLE); 98008a7aa1eSSimon Glass 9818c9b8dc0SSimon Glass exynos_dp_set_link_bandwidth(dp_regs, edp_info->lane_bw); 9828c9b8dc0SSimon Glass exynos_dp_set_lane_count(dp_regs, edp_info->lane_cnt); 98308a7aa1eSSimon Glass 9848c9b8dc0SSimon Glass exynos_dp_init_video(dp_regs); 9858c9b8dc0SSimon Glass ret = exynos_dp_config_video(dp_regs, edp_info); 98608a7aa1eSSimon Glass if (ret != EXYNOS_DP_SUCCESS) { 98708a7aa1eSSimon Glass printf("Exynos DP init failed\n"); 98808a7aa1eSSimon Glass return ret; 98908a7aa1eSSimon Glass } 99008a7aa1eSSimon Glass 99108a7aa1eSSimon Glass debug("Exynos DP init done\n"); 99208a7aa1eSSimon Glass 99308a7aa1eSSimon Glass return ret; 99408a7aa1eSSimon Glass } 995