1 /* 2 * Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at> 3 * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com 4 * 5 * minimal framebuffer driver for TI's AM335x SoC to be compatible with 6 * Wolfgang Denk's LCD-Framework (CONFIG_LCD, common/lcd.c) 7 * 8 * - supporting only 24bit RGB/TFT raster Mode (not using palette) 9 * - sets up LCD controller as in 'am335x_lcdpanel' struct given 10 * - starts output DMA from gd->fb_base buffer 11 * 12 * SPDX-License-Identifier: GPL-2.0+ 13 */ 14 #include <common.h> 15 #include <asm/arch/hardware.h> 16 #include <lcd.h> 17 #include "am335x-fb.h" 18 19 #if !defined(LCD_CNTL_BASE) 20 #error "hw-base address of LCD-Controller (LCD_CNTL_BASE) not defined!" 21 #endif 22 23 24 /* LCD Control Register */ 25 #define LCD_CLK_DIVISOR(x) ((x) << 8) 26 #define LCD_RASTER_MODE 0x01 27 /* LCD Clock Enable Register */ 28 #define LCD_CORECLKEN (0x01 << 0) 29 #define LCD_LIDDCLKEN (0x01 << 1) 30 #define LCD_DMACLKEN (0x01 << 2) 31 /* LCD DMA Control Register */ 32 #define LCD_DMA_BURST_SIZE(x) ((x) << 4) 33 #define LCD_DMA_BURST_1 0x0 34 #define LCD_DMA_BURST_2 0x1 35 #define LCD_DMA_BURST_4 0x2 36 #define LCD_DMA_BURST_8 0x3 37 #define LCD_DMA_BURST_16 0x4 38 /* LCD Timing_0 Register */ 39 #define LCD_HBPLSB(x) ((((x)-1) & 0xFF) << 24) 40 #define LCD_HFPLSB(x) ((((x)-1) & 0xFF) << 16) 41 #define LCD_HSWLSB(x) ((((x)-1) & 0x3F) << 10) 42 #define LCD_HORLSB(x) (((((x) >> 4)-1) & 0x3F) << 4) 43 #define LCD_HORMSB(x) (((((x) >> 4)-1) & 0x40) >> 4) 44 /* LCD Timing_1 Register */ 45 #define LCD_VBP(x) ((x) << 24) 46 #define LCD_VFP(x) ((x) << 16) 47 #define LCD_VSW(x) (((x)-1) << 10) 48 #define LCD_VERLSB(x) (((x)-1) & 0x3FF) 49 /* LCD Timing_2 Register */ 50 #define LCD_HSWMSB(x) ((((x)-1) & 0x3C0) << 21) 51 #define LCD_VERMSB(x) ((((x)-1) & 0x400) << 16) 52 #define LCD_HBPMSB(x) ((((x)-1) & 0x300) >> 4) 53 #define LCD_HFPMSB(x) ((((x)-1) & 0x300) >> 8) 54 #define LCD_INVMASK(x) ((x) & 0x3F00000) 55 /* LCD Raster Ctrl Register */ 56 #define LCD_TFT_24BPP_MODE (1 << 25) 57 #define LCD_TFT_24BPP_UNPACK (1 << 26) 58 #define LCD_PALMODE_RAWDATA (0x10 << 20) 59 #define LCD_TFT_MODE (0x01 << 7) 60 #define LCD_RASTER_ENABLE (0x01 << 0) 61 62 63 /* Macro definitions */ 64 #define FBSIZE(x) ((x->hactive * x->vactive * x->bpp) >> 3) 65 66 struct am335x_lcdhw { 67 unsigned int pid; /* 0x00 */ 68 unsigned int ctrl; /* 0x04 */ 69 unsigned int gap0; /* 0x08 */ 70 unsigned int lidd_ctrl; /* 0x0C */ 71 unsigned int lidd_cs0_conf; /* 0x10 */ 72 unsigned int lidd_cs0_addr; /* 0x14 */ 73 unsigned int lidd_cs0_data; /* 0x18 */ 74 unsigned int lidd_cs1_conf; /* 0x1C */ 75 unsigned int lidd_cs1_addr; /* 0x20 */ 76 unsigned int lidd_cs1_data; /* 0x24 */ 77 unsigned int raster_ctrl; /* 0x28 */ 78 unsigned int raster_timing0; /* 0x2C */ 79 unsigned int raster_timing1; /* 0x30 */ 80 unsigned int raster_timing2; /* 0x34 */ 81 unsigned int raster_subpanel; /* 0x38 */ 82 unsigned int raster_subpanel2; /* 0x3C */ 83 unsigned int lcddma_ctrl; /* 0x40 */ 84 unsigned int lcddma_fb0_base; /* 0x44 */ 85 unsigned int lcddma_fb0_ceiling; /* 0x48 */ 86 unsigned int lcddma_fb1_base; /* 0x4C */ 87 unsigned int lcddma_fb1_ceiling; /* 0x50 */ 88 unsigned int sysconfig; /* 0x54 */ 89 unsigned int irqstatus_raw; /* 0x58 */ 90 unsigned int irqstatus; /* 0x5C */ 91 unsigned int irqenable_set; /* 0x60 */ 92 unsigned int irqenable_clear; /* 0x64 */ 93 unsigned int gap1; /* 0x68 */ 94 unsigned int clkc_enable; /* 0x6C */ 95 unsigned int clkc_reset; /* 0x70 */ 96 }; 97 98 static struct am335x_lcdhw *lcdhw = (void *)LCD_CNTL_BASE; 99 DECLARE_GLOBAL_DATA_PTR; 100 101 int lcd_get_size(int *line_length) 102 { 103 *line_length = (panel_info.vl_col * NBITS(panel_info.vl_bpix)) / 8; 104 return *line_length * panel_info.vl_row + 0x20; 105 } 106 107 int am335xfb_init(struct am335x_lcdpanel *panel) 108 { 109 if (0 == gd->fb_base) { 110 printf("ERROR: no valid fb_base stored in GLOBAL_DATA_PTR!\n"); 111 return -1; 112 } 113 if (0 == panel) { 114 printf("ERROR: missing ptr to am335x_lcdpanel!\n"); 115 return -1; 116 } 117 118 debug("setting up LCD-Controller for %dx%dx%d (hfp=%d,hbp=%d,hsw=%d / ", 119 panel->hactive, panel->vactive, panel->bpp, 120 panel->hfp, panel->hbp, panel->hsw); 121 debug("vfp=%d,vbp=%d,vsw=%d / clk-div=%d)\n", 122 panel->vfp, panel->vfp, panel->vsw, panel->pxl_clk_div); 123 debug("using frambuffer at 0x%08x with size %d.\n", 124 (unsigned int)gd->fb_base, FBSIZE(panel)); 125 126 /* palette default entry */ 127 memset((void *)gd->fb_base, 0, 0x20); 128 *(unsigned int *)gd->fb_base = 0x4000; 129 130 lcdhw->clkc_enable = LCD_CORECLKEN | LCD_LIDDCLKEN | LCD_DMACLKEN; 131 lcdhw->raster_ctrl = 0; 132 lcdhw->ctrl = LCD_CLK_DIVISOR(panel->pxl_clk_div) | LCD_RASTER_MODE; 133 lcdhw->lcddma_fb0_base = gd->fb_base; 134 lcdhw->lcddma_fb0_ceiling = gd->fb_base + FBSIZE(panel) + 0x20; 135 lcdhw->lcddma_fb1_base = gd->fb_base; 136 lcdhw->lcddma_fb1_ceiling = gd->fb_base + FBSIZE(panel) + 0x20; 137 lcdhw->lcddma_ctrl = LCD_DMA_BURST_SIZE(LCD_DMA_BURST_16); 138 139 lcdhw->raster_timing0 = LCD_HORLSB(panel->hactive) | 140 LCD_HORMSB(panel->hactive) | 141 LCD_HFPLSB(panel->hfp) | 142 LCD_HBPLSB(panel->hbp) | 143 LCD_HSWLSB(panel->hsw); 144 lcdhw->raster_timing1 = LCD_VBP(panel->vbp) | 145 LCD_VFP(panel->vfp) | 146 LCD_VSW(panel->vsw) | 147 LCD_VERLSB(panel->vactive); 148 lcdhw->raster_timing2 = LCD_HSWMSB(panel->hsw) | 149 LCD_VERMSB(panel->vactive) | 150 LCD_INVMASK(panel->pol) | 151 LCD_HBPMSB(panel->hbp) | 152 LCD_HFPMSB(panel->hfp) | 153 0x0000FF00; /* clk cycles for ac-bias */ 154 lcdhw->raster_ctrl = LCD_TFT_24BPP_MODE | 155 LCD_TFT_24BPP_UNPACK | 156 LCD_PALMODE_RAWDATA | 157 LCD_TFT_MODE | 158 LCD_RASTER_ENABLE; 159 160 gd->fb_base += 0x20; /* point fb behind palette */ 161 162 /* turn ON display through powercontrol function if accessible */ 163 if (0 != panel->panel_power_ctrl) { 164 mdelay(panel->pon_delay); 165 panel->panel_power_ctrl(1); 166 } 167 168 return 0; 169 } 170