xref: /openbmc/u-boot/drivers/video/Kconfig (revision 6b1ba984)
1*6b1ba984SSimon Glassconfig VIDEO_VESA
2*6b1ba984SSimon Glass	bool "Enable VESA video driver support"
3*6b1ba984SSimon Glass	depends on X86
4*6b1ba984SSimon Glass	default n
5*6b1ba984SSimon Glass	help
6*6b1ba984SSimon Glass	  Turn on this option to enable a very simple driver which uses vesa
7*6b1ba984SSimon Glass	  to discover the video mode and then provides a frame buffer for use
8*6b1ba984SSimon Glass	  by U-Boot. This can in principle be used with any platform that
9*6b1ba984SSimon Glass	  supports PCI and video cards that support VESA BIOS Extension (VBE).
10*6b1ba984SSimon Glass
11ade8127aSBin Mengconfig VIDEO_X86
12ade8127aSBin Meng	bool "Enable x86 video driver support"
13ade8127aSBin Meng	depends on X86
14ade8127aSBin Meng	default n
15ade8127aSBin Meng	help
16ade8127aSBin Meng	  Turn on this option to enable a very simple driver which uses vesa
17ade8127aSBin Meng	  to discover the video mode and then provides a frame buffer for use
18ade8127aSBin Meng	  by U-Boot.
19b8329acfSSiarhei Siamashka
20b8329acfSSiarhei Siamashkaconfig VIDEO_LCD_SSD2828
21b8329acfSSiarhei Siamashka	bool "SSD2828 bridge chip"
22b8329acfSSiarhei Siamashka	default n
23b8329acfSSiarhei Siamashka	---help---
24b8329acfSSiarhei Siamashka	Support for the SSD2828 bridge chip, which can take pixel data coming
25b8329acfSSiarhei Siamashka	from a parallel LCD interface and translate it on the fly into MIPI DSI
26b8329acfSSiarhei Siamashka	interface for driving a MIPI compatible LCD panel. It uses SPI for
27b8329acfSSiarhei Siamashka	configuration.
28b8329acfSSiarhei Siamashka
29b8329acfSSiarhei Siamashkaconfig VIDEO_LCD_SSD2828_TX_CLK
30b8329acfSSiarhei Siamashka	int "SSD2828 TX_CLK frequency (in MHz)"
31b8329acfSSiarhei Siamashka	depends on VIDEO_LCD_SSD2828
32dddccd69SSiarhei Siamashka	default 0
33b8329acfSSiarhei Siamashka	---help---
34b8329acfSSiarhei Siamashka	The frequency of the crystal, which is clocking SSD2828. It may be
35b8329acfSSiarhei Siamashka	anything in the 8MHz-30MHz range and the exact value should be
36b8329acfSSiarhei Siamashka	retrieved from the board schematics. Or in the case of Allwinner
37b8329acfSSiarhei Siamashka	hardware, it can be usually found as 'lcd_xtal_freq' variable in
38dddccd69SSiarhei Siamashka	FEX files. It can be also set to 0 for selecting PCLK from the
39dddccd69SSiarhei Siamashka	parallel LCD interface instead of TX_CLK as the PLL clock source.
40b8329acfSSiarhei Siamashka
41b8329acfSSiarhei Siamashkaconfig VIDEO_LCD_SSD2828_RESET
42b8329acfSSiarhei Siamashka	string "RESET pin of SSD2828"
43b8329acfSSiarhei Siamashka	depends on VIDEO_LCD_SSD2828
44b8329acfSSiarhei Siamashka	default ""
45b8329acfSSiarhei Siamashka	---help---
46b8329acfSSiarhei Siamashka	The reset pin of SSD2828 chip. This takes a string in the format
47b8329acfSSiarhei Siamashka	understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H.
48b8329acfSSiarhei Siamashka
49a5464f2bSHans de Goedeconfig VIDEO_LCD_HITACHI_TX18D42VM
50a5464f2bSHans de Goede	bool "Hitachi tx18d42vm LVDS LCD panel support"
51a5464f2bSHans de Goede	depends on VIDEO
52a5464f2bSHans de Goede	default n
53a5464f2bSHans de Goede	---help---
54a5464f2bSHans de Goede	Support for Hitachi tx18d42vm LVDS LCD panels, these panels have a
55a5464f2bSHans de Goede	lcd controller which needs to be initialized over SPI, once that is
56a5464f2bSHans de Goede	done they work like a regular LVDS panel.
57a5464f2bSHans de Goede
58b8329acfSSiarhei Siamashkaconfig VIDEO_LCD_SPI_CS
59b8329acfSSiarhei Siamashka	string "SPI CS pin for LCD related config job"
60a5464f2bSHans de Goede	depends on VIDEO_LCD_SSD2828 || VIDEO_LCD_HITACHI_TX18D42VM
61b8329acfSSiarhei Siamashka	default ""
62b8329acfSSiarhei Siamashka	---help---
63b8329acfSSiarhei Siamashka	This is one of the SPI communication pins, involved in setting up a
64b8329acfSSiarhei Siamashka	working LCD configuration. The exact role of SPI may differ for
65b8329acfSSiarhei Siamashka	different hardware setups. The option takes a string in the format
66b8329acfSSiarhei Siamashka	understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H.
67b8329acfSSiarhei Siamashka
68b8329acfSSiarhei Siamashkaconfig VIDEO_LCD_SPI_SCLK
69b8329acfSSiarhei Siamashka	string "SPI SCLK pin for LCD related config job"
70a5464f2bSHans de Goede	depends on VIDEO_LCD_SSD2828 || VIDEO_LCD_HITACHI_TX18D42VM
71b8329acfSSiarhei Siamashka	default ""
72b8329acfSSiarhei Siamashka	---help---
73b8329acfSSiarhei Siamashka	This is one of the SPI communication pins, involved in setting up a
74b8329acfSSiarhei Siamashka	working LCD configuration. The exact role of SPI may differ for
75b8329acfSSiarhei Siamashka	different hardware setups. The option takes a string in the format
76b8329acfSSiarhei Siamashka	understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H.
77b8329acfSSiarhei Siamashka
78b8329acfSSiarhei Siamashkaconfig VIDEO_LCD_SPI_MOSI
79b8329acfSSiarhei Siamashka	string "SPI MOSI pin for LCD related config job"
80a5464f2bSHans de Goede	depends on VIDEO_LCD_SSD2828 || VIDEO_LCD_HITACHI_TX18D42VM
81b8329acfSSiarhei Siamashka	default ""
82b8329acfSSiarhei Siamashka	---help---
83b8329acfSSiarhei Siamashka	This is one of the SPI communication pins, involved in setting up a
84b8329acfSSiarhei Siamashka	working LCD configuration. The exact role of SPI may differ for
85b8329acfSSiarhei Siamashka	different hardware setups. The option takes a string in the format
86b8329acfSSiarhei Siamashka	understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H.
87b8329acfSSiarhei Siamashka
88b8329acfSSiarhei Siamashkaconfig VIDEO_LCD_SPI_MISO
89b8329acfSSiarhei Siamashka	string "SPI MISO pin for LCD related config job (optional)"
90b8329acfSSiarhei Siamashka	depends on VIDEO_LCD_SSD2828
91b8329acfSSiarhei Siamashka	default ""
92b8329acfSSiarhei Siamashka	---help---
93b8329acfSSiarhei Siamashka	This is one of the SPI communication pins, involved in setting up a
94b8329acfSSiarhei Siamashka	working LCD configuration. The exact role of SPI may differ for
95b8329acfSSiarhei Siamashka	different hardware setups. If wired up, this pin may provide additional
96b8329acfSSiarhei Siamashka	useful functionality. Such as bi-directional communication with the
97b8329acfSSiarhei Siamashka	hardware and LCD panel id retrieval (if the panel can report it). The
98b8329acfSSiarhei Siamashka	option takes a string in the format understood by 'name_to_gpio'
99b8329acfSSiarhei Siamashka	function, e.g. PH1 for pin 1 of port H.
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