1 /* 2 * Mentor USB OTG Core functionality common for both Host and Device 3 * functionality. 4 * 5 * Copyright (c) 2008 Texas Instruments 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as 9 * published by the Free Software Foundation; either version 2 of 10 * the License, or (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20 * MA 02111-1307 USA 21 * 22 * Author: Thomas Abraham t-abraham@ti.com, Texas Instruments 23 */ 24 25 #include <common.h> 26 27 #include "musb_core.h" 28 struct musb_regs *musbr; 29 30 /* 31 * program the mentor core to start (enable interrupts, dma, etc.) 32 */ 33 void musb_start(void) 34 { 35 u8 devctl; 36 37 /* disable all interrupts */ 38 writew(0, &musbr->intrtxe); 39 writew(0, &musbr->intrrxe); 40 writeb(0, &musbr->intrusbe); 41 writeb(0, &musbr->testmode); 42 43 /* put into basic highspeed mode and start session */ 44 writeb(MUSB_POWER_HSENAB, &musbr->power); 45 #if defined(CONFIG_MUSB_HCD) 46 devctl = readb(&musbr->devctl); 47 writeb(devctl | MUSB_DEVCTL_SESSION, &musbr->devctl); 48 #endif 49 } 50 51 /* 52 * This function configures the endpoint configuration. The musb hcd or musb 53 * device implementation can use this function to configure the endpoints 54 * and set the FIFO sizes. Note: The summation of FIFO sizes of all endpoints 55 * should not be more than the available FIFO size. 56 * 57 * epinfo - Pointer to EP configuration table 58 * cnt - Number of entries in the EP conf table. 59 */ 60 void musb_configure_ep(struct musb_epinfo *epinfo, u8 cnt) 61 { 62 u16 csr; 63 u16 fifoaddr = 64; /* First 64 bytes of FIFO reserved for EP0 */ 64 u32 fifosize; 65 u8 idx; 66 67 while (cnt--) { 68 /* prepare fifosize to write to register */ 69 fifosize = epinfo->epsize >> 3; 70 idx = ffs(fifosize) - 1; 71 72 writeb(epinfo->epnum, &musbr->index); 73 if (epinfo->epdir) { 74 /* Configure fifo size and fifo base address */ 75 writeb(idx, &musbr->txfifosz); 76 writew(fifoaddr >> 3, &musbr->txfifoadd); 77 #if defined(CONFIG_MUSB_HCD) 78 /* clear the data toggle bit */ 79 csr = readw(&musbr->txcsr); 80 writew(csr | MUSB_TXCSR_CLRDATATOG, &musbr->txcsr); 81 #endif 82 /* Flush fifo if required */ 83 if (csr & MUSB_TXCSR_TXPKTRDY) 84 writew(csr | MUSB_TXCSR_FLUSHFIFO, 85 &musbr->txcsr); 86 } else { 87 /* Configure fifo size and fifo base address */ 88 writeb(idx, &musbr->rxfifosz); 89 writew(fifoaddr >> 3, &musbr->rxfifoadd); 90 #if defined(CONFIG_MUSB_HCD) 91 /* clear the data toggle bit */ 92 csr = readw(&musbr->rxcsr); 93 writew(csr | MUSB_RXCSR_CLRDATATOG, &musbr->rxcsr); 94 #endif 95 /* Flush fifo if required */ 96 if (csr & MUSB_RXCSR_RXPKTRDY) 97 writew(csr | MUSB_RXCSR_FLUSHFIFO, 98 &musbr->rxcsr); 99 } 100 fifoaddr += epinfo->epsize; 101 epinfo++; 102 } 103 } 104 105 /* 106 * This function writes data to endpoint fifo 107 * 108 * ep - endpoint number 109 * length - number of bytes to write to FIFO 110 * fifo_data - Pointer to data buffer that contains the data to write 111 */ 112 void write_fifo(u8 ep, u32 length, void *fifo_data) 113 { 114 u8 *data = (u8 *)fifo_data; 115 116 /* select the endpoint index */ 117 writeb(ep, &musbr->index); 118 119 /* write the data to the fifo */ 120 while (length--) 121 writeb(*data++, &musbr->fifox[ep]); 122 } 123 124 /* 125 * This function reads data from endpoint fifo 126 * 127 * ep - endpoint number 128 * length - number of bytes to read from FIFO 129 * fifo_data - pointer to data buffer into which data is read 130 */ 131 void read_fifo(u8 ep, u32 length, void *fifo_data) 132 { 133 u8 *data = (u8 *)fifo_data; 134 135 /* select the endpoint index */ 136 writeb(ep, &musbr->index); 137 138 /* read the data to the fifo */ 139 while (length--) 140 *data++ = readb(&musbr->fifox[ep]); 141 } 142