1 /* 2 * Allwinner SUNXI "glue layer" 3 * 4 * Copyright © 2015 Hans de Goede <hdegoede@redhat.com> 5 * Copyright © 2013 Jussi Kivilinna <jussi.kivilinna@iki.fi> 6 * 7 * Based on the sw_usb "Allwinner OTG Dual Role Controller" code. 8 * Copyright 2007-2012 (C) Allwinner Technology Co., Ltd. 9 * javen <javen@allwinnertech.com> 10 * 11 * Based on the DA8xx "glue layer" code. 12 * Copyright (c) 2008-2009 MontaVista Software, Inc. <source@mvista.com> 13 * Copyright (C) 2005-2006 by Texas Instruments 14 * 15 * This file is part of the Inventra Controller Driver for Linux. 16 * 17 * SPDX-License-Identifier: GPL-2.0 18 */ 19 #include <common.h> 20 #include <dm.h> 21 #include <asm/arch/cpu.h> 22 #include <asm/arch/clock.h> 23 #include <asm/arch/gpio.h> 24 #include <asm/arch/usb_phy.h> 25 #include <asm-generic/gpio.h> 26 #include <dm/lists.h> 27 #include <dm/root.h> 28 #include <linux/usb/musb.h> 29 #include "linux-compat.h" 30 #include "musb_core.h" 31 #include "musb_uboot.h" 32 33 /****************************************************************************** 34 ****************************************************************************** 35 * From the Allwinner driver 36 ****************************************************************************** 37 ******************************************************************************/ 38 39 /****************************************************************************** 40 * From include/sunxi_usb_bsp.h 41 ******************************************************************************/ 42 43 /* reg offsets */ 44 #define USBC_REG_o_ISCR 0x0400 45 #define USBC_REG_o_PHYCTL 0x0404 46 #define USBC_REG_o_PHYBIST 0x0408 47 #define USBC_REG_o_PHYTUNE 0x040c 48 49 #define USBC_REG_o_VEND0 0x0043 50 51 /* Interface Status and Control */ 52 #define USBC_BP_ISCR_VBUS_VALID_FROM_DATA 30 53 #define USBC_BP_ISCR_VBUS_VALID_FROM_VBUS 29 54 #define USBC_BP_ISCR_EXT_ID_STATUS 28 55 #define USBC_BP_ISCR_EXT_DM_STATUS 27 56 #define USBC_BP_ISCR_EXT_DP_STATUS 26 57 #define USBC_BP_ISCR_MERGED_VBUS_STATUS 25 58 #define USBC_BP_ISCR_MERGED_ID_STATUS 24 59 60 #define USBC_BP_ISCR_ID_PULLUP_EN 17 61 #define USBC_BP_ISCR_DPDM_PULLUP_EN 16 62 #define USBC_BP_ISCR_FORCE_ID 14 63 #define USBC_BP_ISCR_FORCE_VBUS_VALID 12 64 #define USBC_BP_ISCR_VBUS_VALID_SRC 10 65 66 #define USBC_BP_ISCR_HOSC_EN 7 67 #define USBC_BP_ISCR_VBUS_CHANGE_DETECT 6 68 #define USBC_BP_ISCR_ID_CHANGE_DETECT 5 69 #define USBC_BP_ISCR_DPDM_CHANGE_DETECT 4 70 #define USBC_BP_ISCR_IRQ_ENABLE 3 71 #define USBC_BP_ISCR_VBUS_CHANGE_DETECT_EN 2 72 #define USBC_BP_ISCR_ID_CHANGE_DETECT_EN 1 73 #define USBC_BP_ISCR_DPDM_CHANGE_DETECT_EN 0 74 75 /****************************************************************************** 76 * From usbc/usbc.c 77 ******************************************************************************/ 78 79 static u32 USBC_WakeUp_ClearChangeDetect(u32 reg_val) 80 { 81 u32 temp = reg_val; 82 83 temp &= ~(1 << USBC_BP_ISCR_VBUS_CHANGE_DETECT); 84 temp &= ~(1 << USBC_BP_ISCR_ID_CHANGE_DETECT); 85 temp &= ~(1 << USBC_BP_ISCR_DPDM_CHANGE_DETECT); 86 87 return temp; 88 } 89 90 static void USBC_EnableIdPullUp(__iomem void *base) 91 { 92 u32 reg_val; 93 94 reg_val = musb_readl(base, USBC_REG_o_ISCR); 95 reg_val |= (1 << USBC_BP_ISCR_ID_PULLUP_EN); 96 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val); 97 musb_writel(base, USBC_REG_o_ISCR, reg_val); 98 } 99 100 static void USBC_EnableDpDmPullUp(__iomem void *base) 101 { 102 u32 reg_val; 103 104 reg_val = musb_readl(base, USBC_REG_o_ISCR); 105 reg_val |= (1 << USBC_BP_ISCR_DPDM_PULLUP_EN); 106 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val); 107 musb_writel(base, USBC_REG_o_ISCR, reg_val); 108 } 109 110 static void USBC_ForceIdToLow(__iomem void *base) 111 { 112 u32 reg_val; 113 114 reg_val = musb_readl(base, USBC_REG_o_ISCR); 115 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_ID); 116 reg_val |= (0x02 << USBC_BP_ISCR_FORCE_ID); 117 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val); 118 musb_writel(base, USBC_REG_o_ISCR, reg_val); 119 } 120 121 static void USBC_ForceIdToHigh(__iomem void *base) 122 { 123 u32 reg_val; 124 125 reg_val = musb_readl(base, USBC_REG_o_ISCR); 126 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_ID); 127 reg_val |= (0x03 << USBC_BP_ISCR_FORCE_ID); 128 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val); 129 musb_writel(base, USBC_REG_o_ISCR, reg_val); 130 } 131 132 static void USBC_ForceVbusValidToLow(__iomem void *base) 133 { 134 u32 reg_val; 135 136 reg_val = musb_readl(base, USBC_REG_o_ISCR); 137 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID); 138 reg_val |= (0x02 << USBC_BP_ISCR_FORCE_VBUS_VALID); 139 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val); 140 musb_writel(base, USBC_REG_o_ISCR, reg_val); 141 } 142 143 static void USBC_ForceVbusValidToHigh(__iomem void *base) 144 { 145 u32 reg_val; 146 147 reg_val = musb_readl(base, USBC_REG_o_ISCR); 148 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID); 149 reg_val |= (0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID); 150 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val); 151 musb_writel(base, USBC_REG_o_ISCR, reg_val); 152 } 153 154 static void USBC_ConfigFIFO_Base(void) 155 { 156 u32 reg_value; 157 158 /* config usb fifo, 8kb mode */ 159 reg_value = readl(SUNXI_SRAMC_BASE + 0x04); 160 reg_value &= ~(0x03 << 0); 161 reg_value |= (1 << 0); 162 writel(reg_value, SUNXI_SRAMC_BASE + 0x04); 163 } 164 165 /****************************************************************************** 166 * Needed for the DFU polling magic 167 ******************************************************************************/ 168 169 static u8 last_int_usb; 170 171 bool dfu_usb_get_reset(void) 172 { 173 return !!(last_int_usb & MUSB_INTR_RESET); 174 } 175 176 /****************************************************************************** 177 * MUSB Glue code 178 ******************************************************************************/ 179 180 static irqreturn_t sunxi_musb_interrupt(int irq, void *__hci) 181 { 182 struct musb *musb = __hci; 183 irqreturn_t retval = IRQ_NONE; 184 185 /* read and flush interrupts */ 186 musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB); 187 last_int_usb = musb->int_usb; 188 if (musb->int_usb) 189 musb_writeb(musb->mregs, MUSB_INTRUSB, musb->int_usb); 190 musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX); 191 if (musb->int_tx) 192 musb_writew(musb->mregs, MUSB_INTRTX, musb->int_tx); 193 musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX); 194 if (musb->int_rx) 195 musb_writew(musb->mregs, MUSB_INTRRX, musb->int_rx); 196 197 if (musb->int_usb || musb->int_tx || musb->int_rx) 198 retval |= musb_interrupt(musb); 199 200 return retval; 201 } 202 203 /* musb_core does not call enable / disable in a balanced manner <sigh> */ 204 static bool enabled = false; 205 206 static int sunxi_musb_enable(struct musb *musb) 207 { 208 int ret; 209 210 pr_debug("%s():\n", __func__); 211 212 musb_ep_select(musb->mregs, 0); 213 musb_writeb(musb->mregs, MUSB_FADDR, 0); 214 215 if (enabled) 216 return 0; 217 218 /* select PIO mode */ 219 musb_writeb(musb->mregs, USBC_REG_o_VEND0, 0); 220 221 if (is_host_enabled(musb)) { 222 ret = sunxi_usb_phy_vbus_detect(0); 223 if (ret == 1) { 224 printf("A charger is plugged into the OTG: "); 225 return -ENODEV; 226 } 227 ret = sunxi_usb_phy_id_detect(0); 228 if (ret == 1) { 229 printf("No host cable detected: "); 230 return -ENODEV; 231 } 232 sunxi_usb_phy_power_on(0); /* port power on */ 233 } 234 235 USBC_ForceVbusValidToHigh(musb->mregs); 236 237 enabled = true; 238 return 0; 239 } 240 241 static void sunxi_musb_disable(struct musb *musb) 242 { 243 pr_debug("%s():\n", __func__); 244 245 if (!enabled) 246 return; 247 248 if (is_host_enabled(musb)) 249 sunxi_usb_phy_power_off(0); /* port power off */ 250 251 USBC_ForceVbusValidToLow(musb->mregs); 252 mdelay(200); /* Wait for the current session to timeout */ 253 254 enabled = false; 255 } 256 257 static int sunxi_musb_init(struct musb *musb) 258 { 259 struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; 260 261 pr_debug("%s():\n", __func__); 262 263 musb->isr = sunxi_musb_interrupt; 264 265 setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0); 266 #ifdef CONFIG_SUNXI_GEN_SUN6I 267 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0); 268 #endif 269 sunxi_usb_phy_init(0); 270 271 USBC_ConfigFIFO_Base(); 272 USBC_EnableDpDmPullUp(musb->mregs); 273 USBC_EnableIdPullUp(musb->mregs); 274 275 if (is_host_enabled(musb)) { 276 /* Host mode */ 277 USBC_ForceIdToLow(musb->mregs); 278 } else { 279 /* Peripheral mode */ 280 USBC_ForceIdToHigh(musb->mregs); 281 } 282 USBC_ForceVbusValidToHigh(musb->mregs); 283 284 return 0; 285 } 286 287 static const struct musb_platform_ops sunxi_musb_ops = { 288 .init = sunxi_musb_init, 289 .enable = sunxi_musb_enable, 290 .disable = sunxi_musb_disable, 291 }; 292 293 static struct musb_hdrc_config musb_config = { 294 .multipoint = 1, 295 .dyn_fifo = 1, 296 .num_eps = 6, 297 .ram_bits = 11, 298 }; 299 300 static struct musb_hdrc_platform_data musb_plat = { 301 #if defined(CONFIG_USB_MUSB_HOST) 302 .mode = MUSB_HOST, 303 #else 304 .mode = MUSB_PERIPHERAL, 305 #endif 306 .config = &musb_config, 307 .power = 250, 308 .platform_ops = &sunxi_musb_ops, 309 }; 310 311 #ifdef CONFIG_USB_MUSB_HOST 312 static int musb_usb_remove(struct udevice *dev); 313 314 static int musb_usb_probe(struct udevice *dev) 315 { 316 struct musb_host_data *host = dev_get_priv(dev); 317 struct usb_bus_priv *priv = dev_get_uclass_priv(dev); 318 int ret; 319 320 priv->desc_before_addr = true; 321 322 host->host = musb_init_controller(&musb_plat, NULL, 323 (void *)SUNXI_USB0_BASE); 324 if (!host->host) 325 return -EIO; 326 327 ret = musb_lowlevel_init(host); 328 if (ret == 0) 329 printf("MUSB OTG\n"); 330 else 331 musb_usb_remove(dev); 332 333 return ret; 334 } 335 336 static int musb_usb_remove(struct udevice *dev) 337 { 338 struct musb_host_data *host = dev_get_priv(dev); 339 struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; 340 341 musb_stop(host->host); 342 343 sunxi_usb_phy_exit(0); 344 #ifdef CONFIG_SUNXI_GEN_SUN6I 345 clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0); 346 #endif 347 clrbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0); 348 349 free(host->host); 350 host->host = NULL; 351 352 return 0; 353 } 354 355 U_BOOT_DRIVER(usb_musb) = { 356 .name = "sunxi-musb", 357 .id = UCLASS_USB, 358 .probe = musb_usb_probe, 359 .remove = musb_usb_remove, 360 .ops = &musb_usb_ops, 361 .platdata_auto_alloc_size = sizeof(struct usb_platdata), 362 .priv_auto_alloc_size = sizeof(struct musb_host_data), 363 }; 364 #endif 365 366 void sunxi_musb_board_init(void) 367 { 368 #ifdef CONFIG_USB_MUSB_HOST 369 struct udevice *dev; 370 371 /* 372 * Bind the driver directly for now as musb linux kernel support is 373 * still pending upstream so our dts files do not have the necessary 374 * nodes yet. TODO: Remove this as soon as the dts nodes are in place 375 * and bind by compatible instead. 376 */ 377 device_bind_driver(dm_root(), "sunxi-musb", "sunxi-musb", &dev); 378 #else 379 musb_register(&musb_plat, NULL, (void *)SUNXI_USB0_BASE); 380 #endif 381 } 382