xref: /openbmc/u-boot/drivers/usb/musb-new/sunxi.c (revision 00a457b2)
1 /*
2  * Allwinner SUNXI "glue layer"
3  *
4  * Copyright © 2015 Hans de Goede <hdegoede@redhat.com>
5  * Copyright © 2013 Jussi Kivilinna <jussi.kivilinna@iki.fi>
6  *
7  * Based on the sw_usb "Allwinner OTG Dual Role Controller" code.
8  *  Copyright 2007-2012 (C) Allwinner Technology Co., Ltd.
9  *  javen <javen@allwinnertech.com>
10  *
11  * Based on the DA8xx "glue layer" code.
12  *  Copyright (c) 2008-2009 MontaVista Software, Inc. <source@mvista.com>
13  *  Copyright (C) 2005-2006 by Texas Instruments
14  *
15  * This file is part of the Inventra Controller Driver for Linux.
16  *
17  * The Inventra Controller Driver for Linux is free software; you
18  * can redistribute it and/or modify it under the terms of the GNU
19  * General Public License version 2 as published by the Free Software
20  * Foundation.
21  *
22  */
23 #include <common.h>
24 #include <asm/arch/cpu.h>
25 #include <asm/arch/clock.h>
26 #include <asm/arch/gpio.h>
27 #include <asm/arch/usb_phy.h>
28 #include <asm-generic/gpio.h>
29 #include <dm/lists.h>
30 #include <dm/root.h>
31 #include <linux/usb/musb.h>
32 #include "linux-compat.h"
33 #include "musb_core.h"
34 #include "musb_uboot.h"
35 
36 /******************************************************************************
37  ******************************************************************************
38  * From the Allwinner driver
39  ******************************************************************************
40  ******************************************************************************/
41 
42 /******************************************************************************
43  * From include/sunxi_usb_bsp.h
44  ******************************************************************************/
45 
46 /* reg offsets */
47 #define  USBC_REG_o_ISCR	0x0400
48 #define  USBC_REG_o_PHYCTL	0x0404
49 #define  USBC_REG_o_PHYBIST	0x0408
50 #define  USBC_REG_o_PHYTUNE	0x040c
51 
52 #define  USBC_REG_o_VEND0	0x0043
53 
54 /* Interface Status and Control */
55 #define  USBC_BP_ISCR_VBUS_VALID_FROM_DATA	30
56 #define  USBC_BP_ISCR_VBUS_VALID_FROM_VBUS	29
57 #define  USBC_BP_ISCR_EXT_ID_STATUS		28
58 #define  USBC_BP_ISCR_EXT_DM_STATUS		27
59 #define  USBC_BP_ISCR_EXT_DP_STATUS		26
60 #define  USBC_BP_ISCR_MERGED_VBUS_STATUS	25
61 #define  USBC_BP_ISCR_MERGED_ID_STATUS		24
62 
63 #define  USBC_BP_ISCR_ID_PULLUP_EN		17
64 #define  USBC_BP_ISCR_DPDM_PULLUP_EN		16
65 #define  USBC_BP_ISCR_FORCE_ID			14
66 #define  USBC_BP_ISCR_FORCE_VBUS_VALID		12
67 #define  USBC_BP_ISCR_VBUS_VALID_SRC		10
68 
69 #define  USBC_BP_ISCR_HOSC_EN			7
70 #define  USBC_BP_ISCR_VBUS_CHANGE_DETECT	6
71 #define  USBC_BP_ISCR_ID_CHANGE_DETECT		5
72 #define  USBC_BP_ISCR_DPDM_CHANGE_DETECT	4
73 #define  USBC_BP_ISCR_IRQ_ENABLE		3
74 #define  USBC_BP_ISCR_VBUS_CHANGE_DETECT_EN	2
75 #define  USBC_BP_ISCR_ID_CHANGE_DETECT_EN	1
76 #define  USBC_BP_ISCR_DPDM_CHANGE_DETECT_EN	0
77 
78 /******************************************************************************
79  * From usbc/usbc.c
80  ******************************************************************************/
81 
82 static u32 USBC_WakeUp_ClearChangeDetect(u32 reg_val)
83 {
84 	u32 temp = reg_val;
85 
86 	temp &= ~(1 << USBC_BP_ISCR_VBUS_CHANGE_DETECT);
87 	temp &= ~(1 << USBC_BP_ISCR_ID_CHANGE_DETECT);
88 	temp &= ~(1 << USBC_BP_ISCR_DPDM_CHANGE_DETECT);
89 
90 	return temp;
91 }
92 
93 static void USBC_EnableIdPullUp(__iomem void *base)
94 {
95 	u32 reg_val;
96 
97 	reg_val = musb_readl(base, USBC_REG_o_ISCR);
98 	reg_val |= (1 << USBC_BP_ISCR_ID_PULLUP_EN);
99 	reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
100 	musb_writel(base, USBC_REG_o_ISCR, reg_val);
101 }
102 
103 static void USBC_EnableDpDmPullUp(__iomem void *base)
104 {
105 	u32 reg_val;
106 
107 	reg_val = musb_readl(base, USBC_REG_o_ISCR);
108 	reg_val |= (1 << USBC_BP_ISCR_DPDM_PULLUP_EN);
109 	reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
110 	musb_writel(base, USBC_REG_o_ISCR, reg_val);
111 }
112 
113 static void USBC_ForceIdToLow(__iomem void *base)
114 {
115 	u32 reg_val;
116 
117 	reg_val = musb_readl(base, USBC_REG_o_ISCR);
118 	reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_ID);
119 	reg_val |= (0x02 << USBC_BP_ISCR_FORCE_ID);
120 	reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
121 	musb_writel(base, USBC_REG_o_ISCR, reg_val);
122 }
123 
124 static void USBC_ForceIdToHigh(__iomem void *base)
125 {
126 	u32 reg_val;
127 
128 	reg_val = musb_readl(base, USBC_REG_o_ISCR);
129 	reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_ID);
130 	reg_val |= (0x03 << USBC_BP_ISCR_FORCE_ID);
131 	reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
132 	musb_writel(base, USBC_REG_o_ISCR, reg_val);
133 }
134 
135 static void USBC_ForceVbusValidToLow(__iomem void *base)
136 {
137 	u32 reg_val;
138 
139 	reg_val = musb_readl(base, USBC_REG_o_ISCR);
140 	reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID);
141 	reg_val |= (0x02 << USBC_BP_ISCR_FORCE_VBUS_VALID);
142 	reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
143 	musb_writel(base, USBC_REG_o_ISCR, reg_val);
144 }
145 
146 static void USBC_ForceVbusValidToHigh(__iomem void *base)
147 {
148 	u32 reg_val;
149 
150 	reg_val = musb_readl(base, USBC_REG_o_ISCR);
151 	reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID);
152 	reg_val |= (0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID);
153 	reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
154 	musb_writel(base, USBC_REG_o_ISCR, reg_val);
155 }
156 
157 static void USBC_ConfigFIFO_Base(void)
158 {
159 	u32 reg_value;
160 
161 	/* config usb fifo, 8kb mode */
162 	reg_value = readl(SUNXI_SRAMC_BASE + 0x04);
163 	reg_value &= ~(0x03 << 0);
164 	reg_value |= (1 << 0);
165 	writel(reg_value, SUNXI_SRAMC_BASE + 0x04);
166 }
167 
168 /******************************************************************************
169  * Needed for the DFU polling magic
170  ******************************************************************************/
171 
172 static u8 last_int_usb;
173 
174 bool dfu_usb_get_reset(void)
175 {
176 	return !!(last_int_usb & MUSB_INTR_RESET);
177 }
178 
179 /******************************************************************************
180  * MUSB Glue code
181  ******************************************************************************/
182 
183 static irqreturn_t sunxi_musb_interrupt(int irq, void *__hci)
184 {
185 	struct musb		*musb = __hci;
186 	irqreturn_t		retval = IRQ_NONE;
187 
188 	/* read and flush interrupts */
189 	musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
190 	last_int_usb = musb->int_usb;
191 	if (musb->int_usb)
192 		musb_writeb(musb->mregs, MUSB_INTRUSB, musb->int_usb);
193 	musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
194 	if (musb->int_tx)
195 		musb_writew(musb->mregs, MUSB_INTRTX, musb->int_tx);
196 	musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
197 	if (musb->int_rx)
198 		musb_writew(musb->mregs, MUSB_INTRRX, musb->int_rx);
199 
200 	if (musb->int_usb || musb->int_tx || musb->int_rx)
201 		retval |= musb_interrupt(musb);
202 
203 	return retval;
204 }
205 
206 /* musb_core does not call enable / disable in a balanced manner <sigh> */
207 static bool enabled = false;
208 
209 static int sunxi_musb_enable(struct musb *musb)
210 {
211 	pr_debug("%s():\n", __func__);
212 
213 	musb_ep_select(musb->mregs, 0);
214 	musb_writeb(musb->mregs, MUSB_FADDR, 0);
215 
216 	if (enabled)
217 		return 0;
218 
219 	/* select PIO mode */
220 	musb_writeb(musb->mregs, USBC_REG_o_VEND0, 0);
221 
222 	if (is_host_enabled(musb)) {
223 		int id = sunxi_usb_phy_id_detect(0);
224 
225 		if (id == 1 && sunxi_usb_phy_power_is_on(0))
226 			sunxi_usb_phy_power_off(0);
227 
228 		if (!sunxi_usb_phy_power_is_on(0)) {
229 			int vbus = sunxi_usb_phy_vbus_detect(0);
230 			if (vbus == 1) {
231 				printf("A charger is plugged into the OTG: ");
232 				return -ENODEV;
233 			}
234 		}
235 
236 		if (id == 1) {
237 			printf("No host cable detected: ");
238 			return -ENODEV;
239 		}
240 
241 		if (!sunxi_usb_phy_power_is_on(0))
242 			sunxi_usb_phy_power_on(0);
243 	}
244 
245 	USBC_ForceVbusValidToHigh(musb->mregs);
246 
247 	enabled = true;
248 	return 0;
249 }
250 
251 static void sunxi_musb_disable(struct musb *musb)
252 {
253 	pr_debug("%s():\n", __func__);
254 
255 	if (!enabled)
256 		return;
257 
258 	USBC_ForceVbusValidToLow(musb->mregs);
259 	mdelay(200); /* Wait for the current session to timeout */
260 
261 	enabled = false;
262 }
263 
264 static int sunxi_musb_init(struct musb *musb)
265 {
266 	struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
267 
268 	pr_debug("%s():\n", __func__);
269 
270 	musb->isr = sunxi_musb_interrupt;
271 
272 	setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
273 #ifdef CONFIG_SUNXI_GEN_SUN6I
274 	setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0);
275 #endif
276 	sunxi_usb_phy_init(0);
277 
278 	USBC_ConfigFIFO_Base();
279 	USBC_EnableDpDmPullUp(musb->mregs);
280 	USBC_EnableIdPullUp(musb->mregs);
281 
282 	if (is_host_enabled(musb)) {
283 		/* Host mode */
284 		USBC_ForceIdToLow(musb->mregs);
285 	} else {
286 		/* Peripheral mode */
287 		USBC_ForceIdToHigh(musb->mregs);
288 	}
289 	USBC_ForceVbusValidToHigh(musb->mregs);
290 
291 	return 0;
292 }
293 
294 static const struct musb_platform_ops sunxi_musb_ops = {
295 	.init		= sunxi_musb_init,
296 	.enable		= sunxi_musb_enable,
297 	.disable	= sunxi_musb_disable,
298 };
299 
300 static struct musb_hdrc_config musb_config = {
301 	.multipoint     = 1,
302 	.dyn_fifo       = 1,
303 	.num_eps        = 6,
304 	.ram_bits       = 11,
305 };
306 
307 static struct musb_hdrc_platform_data musb_plat = {
308 #if defined(CONFIG_USB_MUSB_HOST)
309 	.mode           = MUSB_HOST,
310 #else
311 	.mode		= MUSB_PERIPHERAL,
312 #endif
313 	.config         = &musb_config,
314 	.power          = 250,
315 	.platform_ops	= &sunxi_musb_ops,
316 };
317 
318 #ifdef CONFIG_USB_MUSB_HOST
319 int musb_usb_probe(struct udevice *dev)
320 {
321 	struct musb_host_data *host = dev_get_priv(dev);
322 	struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
323 	int ret;
324 
325 	priv->desc_before_addr = true;
326 
327 	if (!host->host) {
328 		host->host = musb_init_controller(&musb_plat, NULL,
329 						  (void *)SUNXI_USB0_BASE);
330 		if (!host->host)
331 			return -EIO;
332 	}
333 
334 	ret = musb_lowlevel_init(host);
335 	if (ret == 0)
336 		printf("MUSB OTG\n");
337 
338 	return ret;
339 }
340 
341 int musb_usb_remove(struct udevice *dev)
342 {
343 	struct musb_host_data *host = dev_get_priv(dev);
344 
345 	musb_stop(host->host);
346 
347 	return 0;
348 }
349 
350 U_BOOT_DRIVER(usb_musb) = {
351 	.name	= "sunxi-musb",
352 	.id	= UCLASS_USB,
353 	.probe = musb_usb_probe,
354 	.remove = musb_usb_remove,
355 	.ops	= &musb_usb_ops,
356 	.platdata_auto_alloc_size = sizeof(struct usb_platdata),
357 	.priv_auto_alloc_size = sizeof(struct musb_host_data),
358 };
359 #endif
360 
361 void sunxi_musb_board_init(void)
362 {
363 #ifdef CONFIG_USB_MUSB_HOST
364 	struct udevice *dev;
365 
366 	/*
367 	 * Bind the driver directly for now as musb linux kernel support is
368 	 * still pending upstream so our dts files do not have the necessary
369 	 * nodes yet. TODO: Remove this as soon as the dts nodes are in place
370 	 * and bind by compatible instead.
371 	 */
372 	device_bind_driver(dm_root(), "sunxi-musb", "sunxi-musb", &dev);
373 #else
374 	musb_register(&musb_plat, NULL, (void *)SUNXI_USB0_BASE);
375 #endif
376 }
377