1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Texas Instruments DSPS platforms "glue layer" 4 * 5 * Copyright (C) 2012, by Texas Instruments 6 * 7 * Based on the am35x "glue layer" code. 8 * 9 * This file is part of the Inventra Controller Driver for Linux. 10 * 11 * musb_dsps.c will be a common file for all the TI DSPS platforms 12 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x. 13 * For now only ti81x is using this and in future davinci.c, am35x.c 14 * da8xx.c would be merged to this file after testing. 15 */ 16 17 #ifndef __UBOOT__ 18 #include <linux/init.h> 19 #include <linux/io.h> 20 #include <linux/err.h> 21 #include <linux/platform_device.h> 22 #include <linux/dma-mapping.h> 23 #include <linux/pm_runtime.h> 24 #include <linux/module.h> 25 26 #include <linux/of.h> 27 #include <linux/of_device.h> 28 #include <linux/of_address.h> 29 30 #include <plat/usb.h> 31 #else 32 #include <common.h> 33 #include <asm/omap_musb.h> 34 #include "linux-compat.h" 35 #endif 36 37 #include "musb_core.h" 38 39 /** 40 * avoid using musb_readx()/musb_writex() as glue layer should not be 41 * dependent on musb core layer symbols. 42 */ 43 static inline u8 dsps_readb(const void __iomem *addr, unsigned offset) 44 { return __raw_readb(addr + offset); } 45 46 static inline u32 dsps_readl(const void __iomem *addr, unsigned offset) 47 { return __raw_readl(addr + offset); } 48 49 static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data) 50 { __raw_writeb(data, addr + offset); } 51 52 static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data) 53 { __raw_writel(data, addr + offset); } 54 55 /** 56 * DSPS musb wrapper register offset. 57 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS 58 * musb ips. 59 */ 60 struct dsps_musb_wrapper { 61 u16 revision; 62 u16 control; 63 u16 status; 64 u16 eoi; 65 u16 epintr_set; 66 u16 epintr_clear; 67 u16 epintr_status; 68 u16 coreintr_set; 69 u16 coreintr_clear; 70 u16 coreintr_status; 71 u16 phy_utmi; 72 u16 mode; 73 74 /* bit positions for control */ 75 unsigned reset:5; 76 77 /* bit positions for interrupt */ 78 unsigned usb_shift:5; 79 u32 usb_mask; 80 u32 usb_bitmap; 81 unsigned drvvbus:5; 82 83 unsigned txep_shift:5; 84 u32 txep_mask; 85 u32 txep_bitmap; 86 87 unsigned rxep_shift:5; 88 u32 rxep_mask; 89 u32 rxep_bitmap; 90 91 /* bit positions for phy_utmi */ 92 unsigned otg_disable:5; 93 94 /* bit positions for mode */ 95 unsigned iddig:5; 96 /* miscellaneous stuff */ 97 u32 musb_core_offset; 98 u8 poll_seconds; 99 }; 100 101 static const struct dsps_musb_wrapper ti81xx_driver_data __devinitconst = { 102 .revision = 0x00, 103 .control = 0x14, 104 .status = 0x18, 105 .eoi = 0x24, 106 .epintr_set = 0x38, 107 .epintr_clear = 0x40, 108 .epintr_status = 0x30, 109 .coreintr_set = 0x3c, 110 .coreintr_clear = 0x44, 111 .coreintr_status = 0x34, 112 .phy_utmi = 0xe0, 113 .mode = 0xe8, 114 .reset = 0, 115 .otg_disable = 21, 116 .iddig = 8, 117 .usb_shift = 0, 118 .usb_mask = 0x1ff, 119 .usb_bitmap = (0x1ff << 0), 120 .drvvbus = 8, 121 .txep_shift = 0, 122 .txep_mask = 0xffff, 123 .txep_bitmap = (0xffff << 0), 124 .rxep_shift = 16, 125 .rxep_mask = 0xfffe, 126 .rxep_bitmap = (0xfffe << 16), 127 .musb_core_offset = 0x400, 128 .poll_seconds = 2, 129 }; 130 131 /** 132 * DSPS glue structure. 133 */ 134 struct dsps_glue { 135 struct device *dev; 136 struct platform_device *musb; /* child musb pdev */ 137 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */ 138 struct timer_list timer; /* otg_workaround timer */ 139 }; 140 141 /** 142 * dsps_musb_enable - enable interrupts 143 */ 144 #ifndef __UBOOT__ 145 static void dsps_musb_enable(struct musb *musb) 146 #else 147 static int dsps_musb_enable(struct musb *musb) 148 #endif 149 { 150 #ifndef __UBOOT__ 151 struct device *dev = musb->controller; 152 struct platform_device *pdev = to_platform_device(dev->parent); 153 struct dsps_glue *glue = platform_get_drvdata(pdev); 154 const struct dsps_musb_wrapper *wrp = glue->wrp; 155 #else 156 const struct dsps_musb_wrapper *wrp = &ti81xx_driver_data; 157 #endif 158 void __iomem *reg_base = musb->ctrl_base; 159 u32 epmask, coremask; 160 161 /* Workaround: setup IRQs through both register sets. */ 162 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) | 163 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift); 164 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF); 165 166 dsps_writel(reg_base, wrp->epintr_set, epmask); 167 dsps_writel(reg_base, wrp->coreintr_set, coremask); 168 /* Force the DRVVBUS IRQ so we can start polling for ID change. */ 169 #ifndef __UBOOT__ 170 if (is_otg_enabled(musb)) 171 dsps_writel(reg_base, wrp->coreintr_set, 172 (1 << wrp->drvvbus) << wrp->usb_shift); 173 #else 174 return 0; 175 #endif 176 } 177 178 /** 179 * dsps_musb_disable - disable HDRC and flush interrupts 180 */ 181 static void dsps_musb_disable(struct musb *musb) 182 { 183 #ifndef __UBOOT__ 184 struct device *dev = musb->controller; 185 struct platform_device *pdev = to_platform_device(dev->parent); 186 struct dsps_glue *glue = platform_get_drvdata(pdev); 187 const struct dsps_musb_wrapper *wrp = glue->wrp; 188 void __iomem *reg_base = musb->ctrl_base; 189 190 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap); 191 dsps_writel(reg_base, wrp->epintr_clear, 192 wrp->txep_bitmap | wrp->rxep_bitmap); 193 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0); 194 dsps_writel(reg_base, wrp->eoi, 0); 195 #endif 196 } 197 198 #ifndef __UBOOT__ 199 static void otg_timer(unsigned long _musb) 200 { 201 struct musb *musb = (void *)_musb; 202 void __iomem *mregs = musb->mregs; 203 struct device *dev = musb->controller; 204 struct platform_device *pdev = to_platform_device(dev->parent); 205 struct dsps_glue *glue = platform_get_drvdata(pdev); 206 const struct dsps_musb_wrapper *wrp = glue->wrp; 207 u8 devctl; 208 unsigned long flags; 209 210 /* 211 * We poll because DSPS IP's won't expose several OTG-critical 212 * status change events (from the transceiver) otherwise. 213 */ 214 devctl = dsps_readb(mregs, MUSB_DEVCTL); 215 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, 216 otg_state_string(musb->xceiv->state)); 217 218 spin_lock_irqsave(&musb->lock, flags); 219 switch (musb->xceiv->state) { 220 case OTG_STATE_A_WAIT_BCON: 221 devctl &= ~MUSB_DEVCTL_SESSION; 222 dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl); 223 224 devctl = dsps_readb(musb->mregs, MUSB_DEVCTL); 225 if (devctl & MUSB_DEVCTL_BDEVICE) { 226 musb->xceiv->state = OTG_STATE_B_IDLE; 227 MUSB_DEV_MODE(musb); 228 } else { 229 musb->xceiv->state = OTG_STATE_A_IDLE; 230 MUSB_HST_MODE(musb); 231 } 232 break; 233 case OTG_STATE_A_WAIT_VFALL: 234 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 235 dsps_writel(musb->ctrl_base, wrp->coreintr_set, 236 MUSB_INTR_VBUSERROR << wrp->usb_shift); 237 break; 238 case OTG_STATE_B_IDLE: 239 if (!is_peripheral_enabled(musb)) 240 break; 241 242 devctl = dsps_readb(mregs, MUSB_DEVCTL); 243 if (devctl & MUSB_DEVCTL_BDEVICE) 244 mod_timer(&glue->timer, 245 jiffies + wrp->poll_seconds * HZ); 246 else 247 musb->xceiv->state = OTG_STATE_A_IDLE; 248 break; 249 default: 250 break; 251 } 252 spin_unlock_irqrestore(&musb->lock, flags); 253 } 254 255 static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout) 256 { 257 struct device *dev = musb->controller; 258 struct platform_device *pdev = to_platform_device(dev->parent); 259 struct dsps_glue *glue = platform_get_drvdata(pdev); 260 static unsigned long last_timer; 261 262 if (!is_otg_enabled(musb)) 263 return; 264 265 if (timeout == 0) 266 timeout = jiffies + msecs_to_jiffies(3); 267 268 /* Never idle if active, or when VBUS timeout is not set as host */ 269 if (musb->is_active || (musb->a_wait_bcon == 0 && 270 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) { 271 dev_dbg(musb->controller, "%s active, deleting timer\n", 272 otg_state_string(musb->xceiv->state)); 273 del_timer(&glue->timer); 274 last_timer = jiffies; 275 return; 276 } 277 278 if (time_after(last_timer, timeout) && timer_pending(&glue->timer)) { 279 dev_dbg(musb->controller, 280 "Longer idle timer already pending, ignoring...\n"); 281 return; 282 } 283 last_timer = timeout; 284 285 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n", 286 otg_state_string(musb->xceiv->state), 287 jiffies_to_msecs(timeout - jiffies)); 288 mod_timer(&glue->timer, timeout); 289 } 290 #endif 291 292 static irqreturn_t dsps_interrupt(int irq, void *hci) 293 { 294 struct musb *musb = hci; 295 void __iomem *reg_base = musb->ctrl_base; 296 #ifndef __UBOOT__ 297 struct device *dev = musb->controller; 298 struct platform_device *pdev = to_platform_device(dev->parent); 299 struct dsps_glue *glue = platform_get_drvdata(pdev); 300 const struct dsps_musb_wrapper *wrp = glue->wrp; 301 #else 302 const struct dsps_musb_wrapper *wrp = &ti81xx_driver_data; 303 #endif 304 unsigned long flags; 305 irqreturn_t ret = IRQ_NONE; 306 u32 epintr, usbintr; 307 308 spin_lock_irqsave(&musb->lock, flags); 309 310 /* Get endpoint interrupts */ 311 epintr = dsps_readl(reg_base, wrp->epintr_status); 312 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift; 313 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift; 314 315 if (epintr) 316 dsps_writel(reg_base, wrp->epintr_status, epintr); 317 318 /* Get usb core interrupts */ 319 usbintr = dsps_readl(reg_base, wrp->coreintr_status); 320 if (!usbintr && !epintr) 321 goto eoi; 322 323 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift; 324 if (usbintr) 325 dsps_writel(reg_base, wrp->coreintr_status, usbintr); 326 327 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n", 328 usbintr, epintr); 329 #ifndef __UBOOT__ 330 /* 331 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for 332 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to 333 * switch appropriately between halves of the OTG state machine. 334 * Managing DEVCTL.SESSION per Mentor docs requires that we know its 335 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set. 336 * Also, DRVVBUS pulses for SRP (but not at 5V) ... 337 */ 338 if ((usbintr & MUSB_INTR_BABBLE) && is_host_enabled(musb)) 339 pr_info("CAUTION: musb: Babble Interrupt Occured\n"); 340 341 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) { 342 int drvvbus = dsps_readl(reg_base, wrp->status); 343 void __iomem *mregs = musb->mregs; 344 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL); 345 int err; 346 347 err = is_host_enabled(musb) && (musb->int_usb & 348 MUSB_INTR_VBUSERROR); 349 if (err) { 350 /* 351 * The Mentor core doesn't debounce VBUS as needed 352 * to cope with device connect current spikes. This 353 * means it's not uncommon for bus-powered devices 354 * to get VBUS errors during enumeration. 355 * 356 * This is a workaround, but newer RTL from Mentor 357 * seems to allow a better one: "re"-starting sessions 358 * without waiting for VBUS to stop registering in 359 * devctl. 360 */ 361 musb->int_usb &= ~MUSB_INTR_VBUSERROR; 362 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; 363 mod_timer(&glue->timer, 364 jiffies + wrp->poll_seconds * HZ); 365 WARNING("VBUS error workaround (delay coming)\n"); 366 } else if (is_host_enabled(musb) && drvvbus) { 367 musb->is_active = 1; 368 MUSB_HST_MODE(musb); 369 musb->xceiv->otg->default_a = 1; 370 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 371 del_timer(&glue->timer); 372 } else { 373 musb->is_active = 0; 374 MUSB_DEV_MODE(musb); 375 musb->xceiv->otg->default_a = 0; 376 musb->xceiv->state = OTG_STATE_B_IDLE; 377 } 378 379 /* NOTE: this must complete power-on within 100 ms. */ 380 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", 381 drvvbus ? "on" : "off", 382 otg_state_string(musb->xceiv->state), 383 err ? " ERROR" : "", 384 devctl); 385 ret = IRQ_HANDLED; 386 } 387 #endif 388 389 if (musb->int_tx || musb->int_rx || musb->int_usb) 390 ret |= musb_interrupt(musb); 391 392 eoi: 393 /* EOI needs to be written for the IRQ to be re-asserted. */ 394 if (ret == IRQ_HANDLED || epintr || usbintr) 395 dsps_writel(reg_base, wrp->eoi, 1); 396 397 #ifndef __UBOOT__ 398 /* Poll for ID change */ 399 if (is_otg_enabled(musb) && musb->xceiv->state == OTG_STATE_B_IDLE) 400 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ); 401 #endif 402 403 spin_unlock_irqrestore(&musb->lock, flags); 404 405 return ret; 406 } 407 408 static int dsps_musb_init(struct musb *musb) 409 { 410 #ifndef __UBOOT__ 411 struct device *dev = musb->controller; 412 struct musb_hdrc_platform_data *plat = dev->platform_data; 413 struct platform_device *pdev = to_platform_device(dev->parent); 414 struct dsps_glue *glue = platform_get_drvdata(pdev); 415 const struct dsps_musb_wrapper *wrp = glue->wrp; 416 struct omap_musb_board_data *data = plat->board_data; 417 #else 418 struct omap_musb_board_data *data = 419 (struct omap_musb_board_data *)musb->controller; 420 const struct dsps_musb_wrapper *wrp = &ti81xx_driver_data; 421 #endif 422 void __iomem *reg_base = musb->ctrl_base; 423 u32 rev, val; 424 int status; 425 426 /* mentor core register starts at offset of 0x400 from musb base */ 427 musb->mregs += wrp->musb_core_offset; 428 429 #ifndef __UBOOT__ 430 /* NOP driver needs change if supporting dual instance */ 431 usb_nop_xceiv_register(); 432 musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2); 433 if (IS_ERR_OR_NULL(musb->xceiv)) 434 return -ENODEV; 435 #endif 436 437 /* Returns zero if e.g. not clocked */ 438 rev = dsps_readl(reg_base, wrp->revision); 439 if (!rev) { 440 status = -ENODEV; 441 goto err0; 442 } 443 444 #ifndef __UBOOT__ 445 if (is_host_enabled(musb)) 446 setup_timer(&glue->timer, otg_timer, (unsigned long) musb); 447 #endif 448 449 /* Reset the musb */ 450 dsps_writel(reg_base, wrp->control, (1 << wrp->reset)); 451 452 /* Start the on-chip PHY and its PLL. */ 453 if (data->set_phy_power) 454 data->set_phy_power(data->dev, 1); 455 456 musb->isr = dsps_interrupt; 457 458 /* reset the otgdisable bit, needed for host mode to work */ 459 val = dsps_readl(reg_base, wrp->phy_utmi); 460 val &= ~(1 << wrp->otg_disable); 461 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val); 462 463 /* clear level interrupt */ 464 dsps_writel(reg_base, wrp->eoi, 0); 465 466 return 0; 467 err0: 468 #ifndef __UBOOT__ 469 usb_put_phy(musb->xceiv); 470 usb_nop_xceiv_unregister(); 471 #endif 472 return status; 473 } 474 475 static int dsps_musb_exit(struct musb *musb) 476 { 477 #ifndef __UBOOT__ 478 struct device *dev = musb->controller; 479 struct musb_hdrc_platform_data *plat = dev->platform_data; 480 struct omap_musb_board_data *data = plat->board_data; 481 struct platform_device *pdev = to_platform_device(dev->parent); 482 struct dsps_glue *glue = platform_get_drvdata(pdev); 483 #else 484 struct omap_musb_board_data *data = 485 (struct omap_musb_board_data *)musb->controller; 486 #endif 487 488 #ifndef __UBOOT__ 489 if (is_host_enabled(musb)) 490 del_timer_sync(&glue->timer); 491 #endif 492 493 /* Shutdown the on-chip PHY and its PLL. */ 494 if (data->set_phy_power) 495 data->set_phy_power(data->dev, 0); 496 497 #ifndef __UBOOT__ 498 /* NOP driver needs change if supporting dual instance */ 499 usb_put_phy(musb->xceiv); 500 usb_nop_xceiv_unregister(); 501 #endif 502 503 return 0; 504 } 505 506 #ifndef __UBOOT__ 507 static struct musb_platform_ops dsps_ops = { 508 #else 509 struct musb_platform_ops musb_dsps_ops = { 510 #endif 511 .init = dsps_musb_init, 512 .exit = dsps_musb_exit, 513 514 .enable = dsps_musb_enable, 515 .disable = dsps_musb_disable, 516 517 #ifndef __UBOOT__ 518 .try_idle = dsps_musb_try_idle, 519 #endif 520 }; 521 522 #ifndef __UBOOT__ 523 static u64 musb_dmamask = DMA_BIT_MASK(32); 524 #endif 525 526 #ifndef __UBOOT__ 527 static int __devinit dsps_create_musb_pdev(struct dsps_glue *glue, u8 id) 528 { 529 struct device *dev = glue->dev; 530 struct platform_device *pdev = to_platform_device(dev); 531 struct musb_hdrc_platform_data *pdata = dev->platform_data; 532 struct platform_device *musb; 533 struct resource *res; 534 struct resource resources[2]; 535 char res_name[10]; 536 int ret; 537 538 /* get memory resource */ 539 sprintf(res_name, "musb%d", id); 540 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name); 541 if (!res) { 542 dev_err(dev, "%s get mem resource failed\n", res_name); 543 ret = -ENODEV; 544 goto err0; 545 } 546 res->parent = NULL; 547 resources[0] = *res; 548 549 /* get irq resource */ 550 sprintf(res_name, "musb%d-irq", id); 551 res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name); 552 if (!res) { 553 dev_err(dev, "%s get irq resource failed\n", res_name); 554 ret = -ENODEV; 555 goto err0; 556 } 557 res->parent = NULL; 558 resources[1] = *res; 559 resources[1].name = "mc"; 560 561 /* allocate the child platform device */ 562 musb = platform_device_alloc("musb-hdrc", -1); 563 if (!musb) { 564 dev_err(dev, "failed to allocate musb device\n"); 565 ret = -ENOMEM; 566 goto err0; 567 } 568 569 musb->dev.parent = dev; 570 musb->dev.dma_mask = &musb_dmamask; 571 musb->dev.coherent_dma_mask = musb_dmamask; 572 573 glue->musb = musb; 574 575 pdata->platform_ops = &dsps_ops; 576 577 ret = platform_device_add_resources(musb, resources, 2); 578 if (ret) { 579 dev_err(dev, "failed to add resources\n"); 580 goto err1; 581 } 582 583 ret = platform_device_add_data(musb, pdata, sizeof(*pdata)); 584 if (ret) { 585 dev_err(dev, "failed to add platform_data\n"); 586 goto err1; 587 } 588 589 ret = platform_device_add(musb); 590 if (ret) { 591 dev_err(dev, "failed to register musb device\n"); 592 goto err1; 593 } 594 595 return 0; 596 597 err1: 598 platform_device_put(musb); 599 err0: 600 return ret; 601 } 602 603 static void __devexit dsps_delete_musb_pdev(struct dsps_glue *glue) 604 { 605 platform_device_del(glue->musb); 606 platform_device_put(glue->musb); 607 } 608 609 static int __devinit dsps_probe(struct platform_device *pdev) 610 { 611 const struct platform_device_id *id = platform_get_device_id(pdev); 612 const struct dsps_musb_wrapper *wrp = 613 (struct dsps_musb_wrapper *)id->driver_data; 614 struct dsps_glue *glue; 615 struct resource *iomem; 616 int ret; 617 618 /* allocate glue */ 619 glue = kzalloc(sizeof(*glue), GFP_KERNEL); 620 if (!glue) { 621 dev_err(&pdev->dev, "unable to allocate glue memory\n"); 622 ret = -ENOMEM; 623 goto err0; 624 } 625 626 /* get memory resource */ 627 iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 628 if (!iomem) { 629 dev_err(&pdev->dev, "failed to get usbss mem resource\n"); 630 ret = -ENODEV; 631 goto err1; 632 } 633 634 glue->dev = &pdev->dev; 635 636 glue->wrp = kmemdup(wrp, sizeof(*wrp), GFP_KERNEL); 637 if (!glue->wrp) { 638 dev_err(&pdev->dev, "failed to duplicate wrapper struct memory\n"); 639 ret = -ENOMEM; 640 goto err1; 641 } 642 platform_set_drvdata(pdev, glue); 643 644 /* enable the usbss clocks */ 645 pm_runtime_enable(&pdev->dev); 646 647 ret = pm_runtime_get_sync(&pdev->dev); 648 if (ret < 0) { 649 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED"); 650 goto err2; 651 } 652 653 /* create the child platform device for first instances of musb */ 654 ret = dsps_create_musb_pdev(glue, 0); 655 if (ret != 0) { 656 dev_err(&pdev->dev, "failed to create child pdev\n"); 657 goto err3; 658 } 659 660 return 0; 661 662 err3: 663 pm_runtime_put(&pdev->dev); 664 err2: 665 pm_runtime_disable(&pdev->dev); 666 kfree(glue->wrp); 667 err1: 668 kfree(glue); 669 err0: 670 return ret; 671 } 672 static int __devexit dsps_remove(struct platform_device *pdev) 673 { 674 struct dsps_glue *glue = platform_get_drvdata(pdev); 675 676 /* delete the child platform device */ 677 dsps_delete_musb_pdev(glue); 678 679 /* disable usbss clocks */ 680 pm_runtime_put(&pdev->dev); 681 pm_runtime_disable(&pdev->dev); 682 kfree(glue->wrp); 683 kfree(glue); 684 return 0; 685 } 686 687 #ifdef CONFIG_PM_SLEEP 688 static int dsps_suspend(struct device *dev) 689 { 690 struct musb_hdrc_platform_data *plat = dev->platform_data; 691 struct omap_musb_board_data *data = plat->board_data; 692 693 /* Shutdown the on-chip PHY and its PLL. */ 694 if (data->set_phy_power) 695 data->set_phy_power(data->dev, 0); 696 697 return 0; 698 } 699 700 static int dsps_resume(struct device *dev) 701 { 702 struct musb_hdrc_platform_data *plat = dev->platform_data; 703 struct omap_musb_board_data *data = plat->board_data; 704 705 /* Start the on-chip PHY and its PLL. */ 706 if (data->set_phy_power) 707 data->set_phy_power(data->dev, 1); 708 709 return 0; 710 } 711 #endif 712 713 static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume); 714 #endif 715 716 #ifndef __UBOOT__ 717 static const struct platform_device_id musb_dsps_id_table[] __devinitconst = { 718 { 719 .name = "musb-ti81xx", 720 .driver_data = (kernel_ulong_t) &ti81xx_driver_data, 721 }, 722 { }, /* Terminating Entry */ 723 }; 724 MODULE_DEVICE_TABLE(platform, musb_dsps_id_table); 725 726 static const struct of_device_id musb_dsps_of_match[] __devinitconst = { 727 { .compatible = "musb-ti81xx", }, 728 { .compatible = "ti,ti81xx-musb", }, 729 { .compatible = "ti,am335x-musb", }, 730 { }, 731 }; 732 MODULE_DEVICE_TABLE(of, musb_dsps_of_match); 733 734 static struct platform_driver dsps_usbss_driver = { 735 .probe = dsps_probe, 736 .remove = __devexit_p(dsps_remove), 737 .driver = { 738 .name = "musb-dsps", 739 .pm = &dsps_pm_ops, 740 .of_match_table = musb_dsps_of_match, 741 }, 742 .id_table = musb_dsps_id_table, 743 }; 744 745 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer"); 746 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>"); 747 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>"); 748 MODULE_LICENSE("GPL v2"); 749 750 static int __init dsps_init(void) 751 { 752 return platform_driver_register(&dsps_usbss_driver); 753 } 754 subsys_initcall(dsps_init); 755 756 static void __exit dsps_exit(void) 757 { 758 platform_driver_unregister(&dsps_usbss_driver); 759 } 760 module_exit(dsps_exit); 761 #endif 762