1 /* 2 * Texas Instruments DSPS platforms "glue layer" 3 * 4 * Copyright (C) 2012, by Texas Instruments 5 * 6 * Based on the am35x "glue layer" code. 7 * 8 * This file is part of the Inventra Controller Driver for Linux. 9 * 10 * The Inventra Controller Driver for Linux is free software; you 11 * can redistribute it and/or modify it under the terms of the GNU 12 * General Public License version 2 as published by the Free Software 13 * Foundation. 14 * 15 * The Inventra Controller Driver for Linux is distributed in 16 * the hope that it will be useful, but WITHOUT ANY WARRANTY; 17 * without even the implied warranty of MERCHANTABILITY or 18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 19 * License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with The Inventra Controller Driver for Linux ; if not, 23 * write to the Free Software Foundation, Inc., 59 Temple Place, 24 * Suite 330, Boston, MA 02111-1307 USA 25 * 26 * musb_dsps.c will be a common file for all the TI DSPS platforms 27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x. 28 * For now only ti81x is using this and in future davinci.c, am35x.c 29 * da8xx.c would be merged to this file after testing. 30 */ 31 32 #ifndef __UBOOT__ 33 #include <linux/init.h> 34 #include <linux/io.h> 35 #include <linux/err.h> 36 #include <linux/platform_device.h> 37 #include <linux/dma-mapping.h> 38 #include <linux/pm_runtime.h> 39 #include <linux/module.h> 40 41 #include <linux/of.h> 42 #include <linux/of_device.h> 43 #include <linux/of_address.h> 44 45 #include <plat/usb.h> 46 #else 47 #include <common.h> 48 #include <asm/omap_musb.h> 49 #include "linux-compat.h" 50 #endif 51 52 #include "musb_core.h" 53 54 /** 55 * avoid using musb_readx()/musb_writex() as glue layer should not be 56 * dependent on musb core layer symbols. 57 */ 58 static inline u8 dsps_readb(const void __iomem *addr, unsigned offset) 59 { return __raw_readb(addr + offset); } 60 61 static inline u32 dsps_readl(const void __iomem *addr, unsigned offset) 62 { return __raw_readl(addr + offset); } 63 64 static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data) 65 { __raw_writeb(data, addr + offset); } 66 67 static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data) 68 { __raw_writel(data, addr + offset); } 69 70 /** 71 * DSPS musb wrapper register offset. 72 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS 73 * musb ips. 74 */ 75 struct dsps_musb_wrapper { 76 u16 revision; 77 u16 control; 78 u16 status; 79 u16 eoi; 80 u16 epintr_set; 81 u16 epintr_clear; 82 u16 epintr_status; 83 u16 coreintr_set; 84 u16 coreintr_clear; 85 u16 coreintr_status; 86 u16 phy_utmi; 87 u16 mode; 88 89 /* bit positions for control */ 90 unsigned reset:5; 91 92 /* bit positions for interrupt */ 93 unsigned usb_shift:5; 94 u32 usb_mask; 95 u32 usb_bitmap; 96 unsigned drvvbus:5; 97 98 unsigned txep_shift:5; 99 u32 txep_mask; 100 u32 txep_bitmap; 101 102 unsigned rxep_shift:5; 103 u32 rxep_mask; 104 u32 rxep_bitmap; 105 106 /* bit positions for phy_utmi */ 107 unsigned otg_disable:5; 108 109 /* bit positions for mode */ 110 unsigned iddig:5; 111 /* miscellaneous stuff */ 112 u32 musb_core_offset; 113 u8 poll_seconds; 114 }; 115 116 static const struct dsps_musb_wrapper ti81xx_driver_data __devinitconst = { 117 .revision = 0x00, 118 .control = 0x14, 119 .status = 0x18, 120 .eoi = 0x24, 121 .epintr_set = 0x38, 122 .epintr_clear = 0x40, 123 .epintr_status = 0x30, 124 .coreintr_set = 0x3c, 125 .coreintr_clear = 0x44, 126 .coreintr_status = 0x34, 127 .phy_utmi = 0xe0, 128 .mode = 0xe8, 129 .reset = 0, 130 .otg_disable = 21, 131 .iddig = 8, 132 .usb_shift = 0, 133 .usb_mask = 0x1ff, 134 .usb_bitmap = (0x1ff << 0), 135 .drvvbus = 8, 136 .txep_shift = 0, 137 .txep_mask = 0xffff, 138 .txep_bitmap = (0xffff << 0), 139 .rxep_shift = 16, 140 .rxep_mask = 0xfffe, 141 .rxep_bitmap = (0xfffe << 16), 142 .musb_core_offset = 0x400, 143 .poll_seconds = 2, 144 }; 145 146 /** 147 * DSPS glue structure. 148 */ 149 struct dsps_glue { 150 struct device *dev; 151 struct platform_device *musb; /* child musb pdev */ 152 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */ 153 struct timer_list timer; /* otg_workaround timer */ 154 }; 155 156 /** 157 * dsps_musb_enable - enable interrupts 158 */ 159 #ifndef __UBOOT__ 160 static void dsps_musb_enable(struct musb *musb) 161 #else 162 static int dsps_musb_enable(struct musb *musb) 163 #endif 164 { 165 #ifndef __UBOOT__ 166 struct device *dev = musb->controller; 167 struct platform_device *pdev = to_platform_device(dev->parent); 168 struct dsps_glue *glue = platform_get_drvdata(pdev); 169 const struct dsps_musb_wrapper *wrp = glue->wrp; 170 #else 171 const struct dsps_musb_wrapper *wrp = &ti81xx_driver_data; 172 #endif 173 void __iomem *reg_base = musb->ctrl_base; 174 u32 epmask, coremask; 175 176 /* Workaround: setup IRQs through both register sets. */ 177 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) | 178 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift); 179 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF); 180 181 dsps_writel(reg_base, wrp->epintr_set, epmask); 182 dsps_writel(reg_base, wrp->coreintr_set, coremask); 183 /* Force the DRVVBUS IRQ so we can start polling for ID change. */ 184 #ifndef __UBOOT__ 185 if (is_otg_enabled(musb)) 186 dsps_writel(reg_base, wrp->coreintr_set, 187 (1 << wrp->drvvbus) << wrp->usb_shift); 188 #else 189 return 0; 190 #endif 191 } 192 193 /** 194 * dsps_musb_disable - disable HDRC and flush interrupts 195 */ 196 static void dsps_musb_disable(struct musb *musb) 197 { 198 #ifndef __UBOOT__ 199 struct device *dev = musb->controller; 200 struct platform_device *pdev = to_platform_device(dev->parent); 201 struct dsps_glue *glue = platform_get_drvdata(pdev); 202 const struct dsps_musb_wrapper *wrp = glue->wrp; 203 void __iomem *reg_base = musb->ctrl_base; 204 205 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap); 206 dsps_writel(reg_base, wrp->epintr_clear, 207 wrp->txep_bitmap | wrp->rxep_bitmap); 208 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0); 209 dsps_writel(reg_base, wrp->eoi, 0); 210 #endif 211 } 212 213 #ifndef __UBOOT__ 214 static void otg_timer(unsigned long _musb) 215 { 216 struct musb *musb = (void *)_musb; 217 void __iomem *mregs = musb->mregs; 218 struct device *dev = musb->controller; 219 struct platform_device *pdev = to_platform_device(dev->parent); 220 struct dsps_glue *glue = platform_get_drvdata(pdev); 221 const struct dsps_musb_wrapper *wrp = glue->wrp; 222 u8 devctl; 223 unsigned long flags; 224 225 /* 226 * We poll because DSPS IP's won't expose several OTG-critical 227 * status change events (from the transceiver) otherwise. 228 */ 229 devctl = dsps_readb(mregs, MUSB_DEVCTL); 230 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, 231 otg_state_string(musb->xceiv->state)); 232 233 spin_lock_irqsave(&musb->lock, flags); 234 switch (musb->xceiv->state) { 235 case OTG_STATE_A_WAIT_BCON: 236 devctl &= ~MUSB_DEVCTL_SESSION; 237 dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl); 238 239 devctl = dsps_readb(musb->mregs, MUSB_DEVCTL); 240 if (devctl & MUSB_DEVCTL_BDEVICE) { 241 musb->xceiv->state = OTG_STATE_B_IDLE; 242 MUSB_DEV_MODE(musb); 243 } else { 244 musb->xceiv->state = OTG_STATE_A_IDLE; 245 MUSB_HST_MODE(musb); 246 } 247 break; 248 case OTG_STATE_A_WAIT_VFALL: 249 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 250 dsps_writel(musb->ctrl_base, wrp->coreintr_set, 251 MUSB_INTR_VBUSERROR << wrp->usb_shift); 252 break; 253 case OTG_STATE_B_IDLE: 254 if (!is_peripheral_enabled(musb)) 255 break; 256 257 devctl = dsps_readb(mregs, MUSB_DEVCTL); 258 if (devctl & MUSB_DEVCTL_BDEVICE) 259 mod_timer(&glue->timer, 260 jiffies + wrp->poll_seconds * HZ); 261 else 262 musb->xceiv->state = OTG_STATE_A_IDLE; 263 break; 264 default: 265 break; 266 } 267 spin_unlock_irqrestore(&musb->lock, flags); 268 } 269 270 static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout) 271 { 272 struct device *dev = musb->controller; 273 struct platform_device *pdev = to_platform_device(dev->parent); 274 struct dsps_glue *glue = platform_get_drvdata(pdev); 275 static unsigned long last_timer; 276 277 if (!is_otg_enabled(musb)) 278 return; 279 280 if (timeout == 0) 281 timeout = jiffies + msecs_to_jiffies(3); 282 283 /* Never idle if active, or when VBUS timeout is not set as host */ 284 if (musb->is_active || (musb->a_wait_bcon == 0 && 285 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) { 286 dev_dbg(musb->controller, "%s active, deleting timer\n", 287 otg_state_string(musb->xceiv->state)); 288 del_timer(&glue->timer); 289 last_timer = jiffies; 290 return; 291 } 292 293 if (time_after(last_timer, timeout) && timer_pending(&glue->timer)) { 294 dev_dbg(musb->controller, 295 "Longer idle timer already pending, ignoring...\n"); 296 return; 297 } 298 last_timer = timeout; 299 300 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n", 301 otg_state_string(musb->xceiv->state), 302 jiffies_to_msecs(timeout - jiffies)); 303 mod_timer(&glue->timer, timeout); 304 } 305 #endif 306 307 static irqreturn_t dsps_interrupt(int irq, void *hci) 308 { 309 struct musb *musb = hci; 310 void __iomem *reg_base = musb->ctrl_base; 311 #ifndef __UBOOT__ 312 struct device *dev = musb->controller; 313 struct platform_device *pdev = to_platform_device(dev->parent); 314 struct dsps_glue *glue = platform_get_drvdata(pdev); 315 const struct dsps_musb_wrapper *wrp = glue->wrp; 316 #else 317 const struct dsps_musb_wrapper *wrp = &ti81xx_driver_data; 318 #endif 319 unsigned long flags; 320 irqreturn_t ret = IRQ_NONE; 321 u32 epintr, usbintr; 322 323 spin_lock_irqsave(&musb->lock, flags); 324 325 /* Get endpoint interrupts */ 326 epintr = dsps_readl(reg_base, wrp->epintr_status); 327 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift; 328 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift; 329 330 if (epintr) 331 dsps_writel(reg_base, wrp->epintr_status, epintr); 332 333 /* Get usb core interrupts */ 334 usbintr = dsps_readl(reg_base, wrp->coreintr_status); 335 if (!usbintr && !epintr) 336 goto eoi; 337 338 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift; 339 if (usbintr) 340 dsps_writel(reg_base, wrp->coreintr_status, usbintr); 341 342 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n", 343 usbintr, epintr); 344 #ifndef __UBOOT__ 345 /* 346 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for 347 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to 348 * switch appropriately between halves of the OTG state machine. 349 * Managing DEVCTL.SESSION per Mentor docs requires that we know its 350 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set. 351 * Also, DRVVBUS pulses for SRP (but not at 5V) ... 352 */ 353 if ((usbintr & MUSB_INTR_BABBLE) && is_host_enabled(musb)) 354 pr_info("CAUTION: musb: Babble Interrupt Occured\n"); 355 356 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) { 357 int drvvbus = dsps_readl(reg_base, wrp->status); 358 void __iomem *mregs = musb->mregs; 359 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL); 360 int err; 361 362 err = is_host_enabled(musb) && (musb->int_usb & 363 MUSB_INTR_VBUSERROR); 364 if (err) { 365 /* 366 * The Mentor core doesn't debounce VBUS as needed 367 * to cope with device connect current spikes. This 368 * means it's not uncommon for bus-powered devices 369 * to get VBUS errors during enumeration. 370 * 371 * This is a workaround, but newer RTL from Mentor 372 * seems to allow a better one: "re"-starting sessions 373 * without waiting for VBUS to stop registering in 374 * devctl. 375 */ 376 musb->int_usb &= ~MUSB_INTR_VBUSERROR; 377 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; 378 mod_timer(&glue->timer, 379 jiffies + wrp->poll_seconds * HZ); 380 WARNING("VBUS error workaround (delay coming)\n"); 381 } else if (is_host_enabled(musb) && drvvbus) { 382 musb->is_active = 1; 383 MUSB_HST_MODE(musb); 384 musb->xceiv->otg->default_a = 1; 385 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 386 del_timer(&glue->timer); 387 } else { 388 musb->is_active = 0; 389 MUSB_DEV_MODE(musb); 390 musb->xceiv->otg->default_a = 0; 391 musb->xceiv->state = OTG_STATE_B_IDLE; 392 } 393 394 /* NOTE: this must complete power-on within 100 ms. */ 395 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", 396 drvvbus ? "on" : "off", 397 otg_state_string(musb->xceiv->state), 398 err ? " ERROR" : "", 399 devctl); 400 ret = IRQ_HANDLED; 401 } 402 #endif 403 404 if (musb->int_tx || musb->int_rx || musb->int_usb) 405 ret |= musb_interrupt(musb); 406 407 eoi: 408 /* EOI needs to be written for the IRQ to be re-asserted. */ 409 if (ret == IRQ_HANDLED || epintr || usbintr) 410 dsps_writel(reg_base, wrp->eoi, 1); 411 412 #ifndef __UBOOT__ 413 /* Poll for ID change */ 414 if (is_otg_enabled(musb) && musb->xceiv->state == OTG_STATE_B_IDLE) 415 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ); 416 #endif 417 418 spin_unlock_irqrestore(&musb->lock, flags); 419 420 return ret; 421 } 422 423 static int dsps_musb_init(struct musb *musb) 424 { 425 #ifndef __UBOOT__ 426 struct device *dev = musb->controller; 427 struct musb_hdrc_platform_data *plat = dev->platform_data; 428 struct platform_device *pdev = to_platform_device(dev->parent); 429 struct dsps_glue *glue = platform_get_drvdata(pdev); 430 const struct dsps_musb_wrapper *wrp = glue->wrp; 431 struct omap_musb_board_data *data = plat->board_data; 432 #else 433 struct omap_musb_board_data *data = 434 (struct omap_musb_board_data *)musb->controller; 435 const struct dsps_musb_wrapper *wrp = &ti81xx_driver_data; 436 #endif 437 void __iomem *reg_base = musb->ctrl_base; 438 u32 rev, val; 439 int status; 440 441 /* mentor core register starts at offset of 0x400 from musb base */ 442 musb->mregs += wrp->musb_core_offset; 443 444 #ifndef __UBOOT__ 445 /* NOP driver needs change if supporting dual instance */ 446 usb_nop_xceiv_register(); 447 musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2); 448 if (IS_ERR_OR_NULL(musb->xceiv)) 449 return -ENODEV; 450 #endif 451 452 /* Returns zero if e.g. not clocked */ 453 rev = dsps_readl(reg_base, wrp->revision); 454 if (!rev) { 455 status = -ENODEV; 456 goto err0; 457 } 458 459 #ifndef __UBOOT__ 460 if (is_host_enabled(musb)) 461 setup_timer(&glue->timer, otg_timer, (unsigned long) musb); 462 #endif 463 464 /* Reset the musb */ 465 dsps_writel(reg_base, wrp->control, (1 << wrp->reset)); 466 467 /* Start the on-chip PHY and its PLL. */ 468 if (data->set_phy_power) 469 data->set_phy_power(1); 470 471 musb->isr = dsps_interrupt; 472 473 /* reset the otgdisable bit, needed for host mode to work */ 474 val = dsps_readl(reg_base, wrp->phy_utmi); 475 val &= ~(1 << wrp->otg_disable); 476 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val); 477 478 /* clear level interrupt */ 479 dsps_writel(reg_base, wrp->eoi, 0); 480 481 return 0; 482 err0: 483 #ifndef __UBOOT__ 484 usb_put_phy(musb->xceiv); 485 usb_nop_xceiv_unregister(); 486 #endif 487 return status; 488 } 489 490 static int dsps_musb_exit(struct musb *musb) 491 { 492 #ifndef __UBOOT__ 493 struct device *dev = musb->controller; 494 struct musb_hdrc_platform_data *plat = dev->platform_data; 495 struct omap_musb_board_data *data = plat->board_data; 496 struct platform_device *pdev = to_platform_device(dev->parent); 497 struct dsps_glue *glue = platform_get_drvdata(pdev); 498 #else 499 struct omap_musb_board_data *data = 500 (struct omap_musb_board_data *)musb->controller; 501 #endif 502 503 #ifndef __UBOOT__ 504 if (is_host_enabled(musb)) 505 del_timer_sync(&glue->timer); 506 #endif 507 508 /* Shutdown the on-chip PHY and its PLL. */ 509 if (data->set_phy_power) 510 data->set_phy_power(0); 511 512 #ifndef __UBOOT__ 513 /* NOP driver needs change if supporting dual instance */ 514 usb_put_phy(musb->xceiv); 515 usb_nop_xceiv_unregister(); 516 #endif 517 518 return 0; 519 } 520 521 #ifndef __UBOOT__ 522 static struct musb_platform_ops dsps_ops = { 523 #else 524 struct musb_platform_ops musb_dsps_ops = { 525 #endif 526 .init = dsps_musb_init, 527 .exit = dsps_musb_exit, 528 529 .enable = dsps_musb_enable, 530 .disable = dsps_musb_disable, 531 532 #ifndef __UBOOT__ 533 .try_idle = dsps_musb_try_idle, 534 #endif 535 }; 536 537 #ifndef __UBOOT__ 538 static u64 musb_dmamask = DMA_BIT_MASK(32); 539 #endif 540 541 #ifndef __UBOOT__ 542 static int __devinit dsps_create_musb_pdev(struct dsps_glue *glue, u8 id) 543 { 544 struct device *dev = glue->dev; 545 struct platform_device *pdev = to_platform_device(dev); 546 struct musb_hdrc_platform_data *pdata = dev->platform_data; 547 struct platform_device *musb; 548 struct resource *res; 549 struct resource resources[2]; 550 char res_name[10]; 551 int ret; 552 553 /* get memory resource */ 554 sprintf(res_name, "musb%d", id); 555 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name); 556 if (!res) { 557 dev_err(dev, "%s get mem resource failed\n", res_name); 558 ret = -ENODEV; 559 goto err0; 560 } 561 res->parent = NULL; 562 resources[0] = *res; 563 564 /* get irq resource */ 565 sprintf(res_name, "musb%d-irq", id); 566 res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name); 567 if (!res) { 568 dev_err(dev, "%s get irq resource failed\n", res_name); 569 ret = -ENODEV; 570 goto err0; 571 } 572 res->parent = NULL; 573 resources[1] = *res; 574 resources[1].name = "mc"; 575 576 /* allocate the child platform device */ 577 musb = platform_device_alloc("musb-hdrc", -1); 578 if (!musb) { 579 dev_err(dev, "failed to allocate musb device\n"); 580 ret = -ENOMEM; 581 goto err0; 582 } 583 584 musb->dev.parent = dev; 585 musb->dev.dma_mask = &musb_dmamask; 586 musb->dev.coherent_dma_mask = musb_dmamask; 587 588 glue->musb = musb; 589 590 pdata->platform_ops = &dsps_ops; 591 592 ret = platform_device_add_resources(musb, resources, 2); 593 if (ret) { 594 dev_err(dev, "failed to add resources\n"); 595 goto err1; 596 } 597 598 ret = platform_device_add_data(musb, pdata, sizeof(*pdata)); 599 if (ret) { 600 dev_err(dev, "failed to add platform_data\n"); 601 goto err1; 602 } 603 604 ret = platform_device_add(musb); 605 if (ret) { 606 dev_err(dev, "failed to register musb device\n"); 607 goto err1; 608 } 609 610 return 0; 611 612 err1: 613 platform_device_put(musb); 614 err0: 615 return ret; 616 } 617 618 static void __devexit dsps_delete_musb_pdev(struct dsps_glue *glue) 619 { 620 platform_device_del(glue->musb); 621 platform_device_put(glue->musb); 622 } 623 624 static int __devinit dsps_probe(struct platform_device *pdev) 625 { 626 const struct platform_device_id *id = platform_get_device_id(pdev); 627 const struct dsps_musb_wrapper *wrp = 628 (struct dsps_musb_wrapper *)id->driver_data; 629 struct dsps_glue *glue; 630 struct resource *iomem; 631 int ret; 632 633 /* allocate glue */ 634 glue = kzalloc(sizeof(*glue), GFP_KERNEL); 635 if (!glue) { 636 dev_err(&pdev->dev, "unable to allocate glue memory\n"); 637 ret = -ENOMEM; 638 goto err0; 639 } 640 641 /* get memory resource */ 642 iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 643 if (!iomem) { 644 dev_err(&pdev->dev, "failed to get usbss mem resourse\n"); 645 ret = -ENODEV; 646 goto err1; 647 } 648 649 glue->dev = &pdev->dev; 650 651 glue->wrp = kmemdup(wrp, sizeof(*wrp), GFP_KERNEL); 652 if (!glue->wrp) { 653 dev_err(&pdev->dev, "failed to duplicate wrapper struct memory\n"); 654 ret = -ENOMEM; 655 goto err1; 656 } 657 platform_set_drvdata(pdev, glue); 658 659 /* enable the usbss clocks */ 660 pm_runtime_enable(&pdev->dev); 661 662 ret = pm_runtime_get_sync(&pdev->dev); 663 if (ret < 0) { 664 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED"); 665 goto err2; 666 } 667 668 /* create the child platform device for first instances of musb */ 669 ret = dsps_create_musb_pdev(glue, 0); 670 if (ret != 0) { 671 dev_err(&pdev->dev, "failed to create child pdev\n"); 672 goto err3; 673 } 674 675 return 0; 676 677 err3: 678 pm_runtime_put(&pdev->dev); 679 err2: 680 pm_runtime_disable(&pdev->dev); 681 kfree(glue->wrp); 682 err1: 683 kfree(glue); 684 err0: 685 return ret; 686 } 687 static int __devexit dsps_remove(struct platform_device *pdev) 688 { 689 struct dsps_glue *glue = platform_get_drvdata(pdev); 690 691 /* delete the child platform device */ 692 dsps_delete_musb_pdev(glue); 693 694 /* disable usbss clocks */ 695 pm_runtime_put(&pdev->dev); 696 pm_runtime_disable(&pdev->dev); 697 kfree(glue->wrp); 698 kfree(glue); 699 return 0; 700 } 701 702 #ifdef CONFIG_PM_SLEEP 703 static int dsps_suspend(struct device *dev) 704 { 705 struct musb_hdrc_platform_data *plat = dev->platform_data; 706 struct omap_musb_board_data *data = plat->board_data; 707 708 /* Shutdown the on-chip PHY and its PLL. */ 709 if (data->set_phy_power) 710 data->set_phy_power(0); 711 712 return 0; 713 } 714 715 static int dsps_resume(struct device *dev) 716 { 717 struct musb_hdrc_platform_data *plat = dev->platform_data; 718 struct omap_musb_board_data *data = plat->board_data; 719 720 /* Start the on-chip PHY and its PLL. */ 721 if (data->set_phy_power) 722 data->set_phy_power(1); 723 724 return 0; 725 } 726 #endif 727 728 static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume); 729 #endif 730 731 #ifndef __UBOOT__ 732 static const struct platform_device_id musb_dsps_id_table[] __devinitconst = { 733 { 734 .name = "musb-ti81xx", 735 .driver_data = (kernel_ulong_t) &ti81xx_driver_data, 736 }, 737 { }, /* Terminating Entry */ 738 }; 739 MODULE_DEVICE_TABLE(platform, musb_dsps_id_table); 740 741 static const struct of_device_id musb_dsps_of_match[] __devinitconst = { 742 { .compatible = "musb-ti81xx", }, 743 { .compatible = "ti,ti81xx-musb", }, 744 { .compatible = "ti,am335x-musb", }, 745 { }, 746 }; 747 MODULE_DEVICE_TABLE(of, musb_dsps_of_match); 748 749 static struct platform_driver dsps_usbss_driver = { 750 .probe = dsps_probe, 751 .remove = __devexit_p(dsps_remove), 752 .driver = { 753 .name = "musb-dsps", 754 .pm = &dsps_pm_ops, 755 .of_match_table = musb_dsps_of_match, 756 }, 757 .id_table = musb_dsps_id_table, 758 }; 759 760 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer"); 761 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>"); 762 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>"); 763 MODULE_LICENSE("GPL v2"); 764 765 static int __init dsps_init(void) 766 { 767 return platform_driver_register(&dsps_usbss_driver); 768 } 769 subsys_initcall(dsps_init); 770 771 static void __exit dsps_exit(void) 772 { 773 platform_driver_unregister(&dsps_usbss_driver); 774 } 775 module_exit(dsps_exit); 776 #endif 777