1 /* 2 * MUSB OTG driver defines 3 * 4 * Copyright 2005 Mentor Graphics Corporation 5 * Copyright (C) 2005-2006 by Texas Instruments 6 * Copyright (C) 2006-2007 Nokia Corporation 7 * 8 * SPDX-License-Identifier: GPL-2.0 9 */ 10 11 #ifndef __MUSB_CORE_H__ 12 #define __MUSB_CORE_H__ 13 14 #ifndef __UBOOT__ 15 #include <linux/slab.h> 16 #include <linux/list.h> 17 #include <linux/interrupt.h> 18 #include <linux/errno.h> 19 #include <linux/timer.h> 20 #include <linux/device.h> 21 #include <linux/usb.h> 22 #include <linux/usb/otg.h> 23 #else 24 #include <linux/errno.h> 25 #endif 26 #include <linux/usb/ch9.h> 27 #include <linux/usb/gadget.h> 28 #include <linux/usb/musb.h> 29 30 struct musb; 31 struct musb_hw_ep; 32 struct musb_ep; 33 34 /* Helper defines for struct musb->hwvers */ 35 #define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f) 36 #define MUSB_HWVERS_MINOR(x) (x & 0x3ff) 37 #define MUSB_HWVERS_RC 0x8000 38 #define MUSB_HWVERS_1300 0x52C 39 #define MUSB_HWVERS_1400 0x590 40 #define MUSB_HWVERS_1800 0x720 41 #define MUSB_HWVERS_1900 0x784 42 #define MUSB_HWVERS_2000 0x800 43 44 #include "musb_debug.h" 45 #include "musb_dma.h" 46 47 #include "musb_io.h" 48 #include "musb_regs.h" 49 50 #include "musb_gadget.h" 51 #ifndef __UBOOT__ 52 #include <linux/usb/hcd.h> 53 #endif 54 #include "musb_host.h" 55 56 #define is_peripheral_enabled(musb) ((musb)->board_mode != MUSB_HOST) 57 #define is_host_enabled(musb) ((musb)->board_mode != MUSB_PERIPHERAL) 58 #define is_otg_enabled(musb) ((musb)->board_mode == MUSB_OTG) 59 60 /* NOTE: otg and peripheral-only state machines start at B_IDLE. 61 * OTG or host-only go to A_IDLE when ID is sensed. 62 */ 63 #define is_peripheral_active(m) (!(m)->is_host) 64 #define is_host_active(m) ((m)->is_host) 65 66 #ifdef CONFIG_PROC_FS 67 #include <linux/fs.h> 68 #define MUSB_CONFIG_PROC_FS 69 #endif 70 71 /****************************** PERIPHERAL ROLE *****************************/ 72 73 #ifndef __UBOOT__ 74 #define is_peripheral_capable() (1) 75 #else 76 #ifdef CONFIG_USB_MUSB_GADGET 77 #define is_peripheral_capable() (1) 78 #else 79 #define is_peripheral_capable() (0) 80 #endif 81 #endif 82 83 extern irqreturn_t musb_g_ep0_irq(struct musb *); 84 extern void musb_g_tx(struct musb *, u8); 85 extern void musb_g_rx(struct musb *, u8); 86 extern void musb_g_reset(struct musb *); 87 extern void musb_g_suspend(struct musb *); 88 extern void musb_g_resume(struct musb *); 89 extern void musb_g_wakeup(struct musb *); 90 extern void musb_g_disconnect(struct musb *); 91 92 /****************************** HOST ROLE ***********************************/ 93 94 #ifndef __UBOOT__ 95 #define is_host_capable() (1) 96 #else 97 #ifdef CONFIG_USB_MUSB_HOST 98 #define is_host_capable() (1) 99 #else 100 #define is_host_capable() (0) 101 #endif 102 #endif 103 104 extern irqreturn_t musb_h_ep0_irq(struct musb *); 105 extern void musb_host_tx(struct musb *, u8); 106 extern void musb_host_rx(struct musb *, u8); 107 108 /****************************** CONSTANTS ********************************/ 109 110 #ifndef MUSB_C_NUM_EPS 111 #define MUSB_C_NUM_EPS ((u8)16) 112 #endif 113 114 #ifndef MUSB_MAX_END0_PACKET 115 #define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE) 116 #endif 117 118 /* host side ep0 states */ 119 enum musb_h_ep0_state { 120 MUSB_EP0_IDLE, 121 MUSB_EP0_START, /* expect ack of setup */ 122 MUSB_EP0_IN, /* expect IN DATA */ 123 MUSB_EP0_OUT, /* expect ack of OUT DATA */ 124 MUSB_EP0_STATUS, /* expect ack of STATUS */ 125 } __attribute__ ((packed)); 126 127 /* peripheral side ep0 states */ 128 enum musb_g_ep0_state { 129 MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */ 130 MUSB_EP0_STAGE_SETUP, /* received SETUP */ 131 MUSB_EP0_STAGE_TX, /* IN data */ 132 MUSB_EP0_STAGE_RX, /* OUT data */ 133 MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */ 134 MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */ 135 MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */ 136 } __attribute__ ((packed)); 137 138 /* 139 * OTG protocol constants. See USB OTG 1.3 spec, 140 * sections 5.5 "Device Timings" and 6.6.5 "Timers". 141 */ 142 #define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */ 143 #define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */ 144 #define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */ 145 #define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */ 146 147 148 /*************************** REGISTER ACCESS ********************************/ 149 150 /* Endpoint registers (other than dynfifo setup) can be accessed either 151 * directly with the "flat" model, or after setting up an index register. 152 */ 153 154 #if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_SOC_OMAP2430) \ 155 || defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_ARCH_OMAP4) 156 /* REVISIT indexed access seemed to 157 * misbehave (on DaVinci) for at least peripheral IN ... 158 */ 159 #define MUSB_FLAT_REG 160 #endif 161 162 /* TUSB mapping: "flat" plus ep0 special cases */ 163 #if defined(CONFIG_USB_MUSB_TUSB6010) || \ 164 defined(CONFIG_USB_MUSB_TUSB6010_MODULE) 165 #define musb_ep_select(_mbase, _epnum) \ 166 musb_writeb((_mbase), MUSB_INDEX, (_epnum)) 167 #define MUSB_EP_OFFSET MUSB_TUSB_OFFSET 168 169 /* "flat" mapping: each endpoint has its own i/o address */ 170 #elif defined(MUSB_FLAT_REG) 171 #define musb_ep_select(_mbase, _epnum) (((void)(_mbase)), ((void)(_epnum))) 172 #define MUSB_EP_OFFSET MUSB_FLAT_OFFSET 173 174 /* "indexed" mapping: INDEX register controls register bank select */ 175 #else 176 #define musb_ep_select(_mbase, _epnum) \ 177 musb_writeb((_mbase), MUSB_INDEX, (_epnum)) 178 #define MUSB_EP_OFFSET MUSB_INDEXED_OFFSET 179 #endif 180 181 /****************************** FUNCTIONS ********************************/ 182 183 #define MUSB_HST_MODE(_musb)\ 184 { (_musb)->is_host = true; } 185 #define MUSB_DEV_MODE(_musb) \ 186 { (_musb)->is_host = false; } 187 188 #define test_devctl_hst_mode(_x) \ 189 (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM) 190 191 #define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral") 192 193 /******************************** TYPES *************************************/ 194 195 /** 196 * struct musb_platform_ops - Operations passed to musb_core by HW glue layer 197 * @init: turns on clocks, sets up platform-specific registers, etc 198 * @exit: undoes @init 199 * @set_mode: forcefully changes operating mode 200 * @try_ilde: tries to idle the IP 201 * @vbus_status: returns vbus status if possible 202 * @set_vbus: forces vbus status 203 * @adjust_channel_params: pre check for standard dma channel_program func 204 */ 205 struct musb_platform_ops { 206 int (*init)(struct musb *musb); 207 int (*exit)(struct musb *musb); 208 209 #ifndef __UBOOT__ 210 void (*enable)(struct musb *musb); 211 #else 212 int (*enable)(struct musb *musb); 213 #endif 214 void (*disable)(struct musb *musb); 215 216 int (*set_mode)(struct musb *musb, u8 mode); 217 void (*try_idle)(struct musb *musb, unsigned long timeout); 218 219 int (*vbus_status)(struct musb *musb); 220 void (*set_vbus)(struct musb *musb, int on); 221 222 int (*adjust_channel_params)(struct dma_channel *channel, 223 u16 packet_sz, u8 *mode, 224 dma_addr_t *dma_addr, u32 *len); 225 }; 226 227 /* 228 * struct musb_hw_ep - endpoint hardware (bidirectional) 229 * 230 * Ordered slightly for better cacheline locality. 231 */ 232 struct musb_hw_ep { 233 struct musb *musb; 234 void __iomem *fifo; 235 void __iomem *regs; 236 237 #if defined(CONFIG_USB_MUSB_TUSB6010) || \ 238 defined(CONFIG_USB_MUSB_TUSB6010_MODULE) 239 void __iomem *conf; 240 #endif 241 242 /* index in musb->endpoints[] */ 243 u8 epnum; 244 245 /* hardware configuration, possibly dynamic */ 246 bool is_shared_fifo; 247 bool tx_double_buffered; 248 bool rx_double_buffered; 249 u16 max_packet_sz_tx; 250 u16 max_packet_sz_rx; 251 252 struct dma_channel *tx_channel; 253 struct dma_channel *rx_channel; 254 255 #if defined(CONFIG_USB_MUSB_TUSB6010) || \ 256 defined(CONFIG_USB_MUSB_TUSB6010_MODULE) 257 /* TUSB has "asynchronous" and "synchronous" dma modes */ 258 dma_addr_t fifo_async; 259 dma_addr_t fifo_sync; 260 void __iomem *fifo_sync_va; 261 #endif 262 263 void __iomem *target_regs; 264 265 /* currently scheduled peripheral endpoint */ 266 struct musb_qh *in_qh; 267 struct musb_qh *out_qh; 268 269 u8 rx_reinit; 270 u8 tx_reinit; 271 272 /* peripheral side */ 273 struct musb_ep ep_in; /* TX */ 274 struct musb_ep ep_out; /* RX */ 275 }; 276 277 static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep) 278 { 279 return next_request(&hw_ep->ep_in); 280 } 281 282 static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep) 283 { 284 return next_request(&hw_ep->ep_out); 285 } 286 287 struct musb_csr_regs { 288 /* FIFO registers */ 289 u16 txmaxp, txcsr, rxmaxp, rxcsr; 290 u16 rxfifoadd, txfifoadd; 291 u8 txtype, txinterval, rxtype, rxinterval; 292 u8 rxfifosz, txfifosz; 293 u8 txfunaddr, txhubaddr, txhubport; 294 u8 rxfunaddr, rxhubaddr, rxhubport; 295 }; 296 297 struct musb_context_registers { 298 299 u8 power; 300 u16 intrtxe, intrrxe; 301 u8 intrusbe; 302 u16 frame; 303 u8 index, testmode; 304 305 u8 devctl, busctl, misc; 306 u32 otg_interfsel; 307 308 struct musb_csr_regs index_regs[MUSB_C_NUM_EPS]; 309 }; 310 311 /* 312 * struct musb - Driver instance data. 313 */ 314 struct musb { 315 /* device lock */ 316 spinlock_t lock; 317 318 const struct musb_platform_ops *ops; 319 struct musb_context_registers context; 320 321 irqreturn_t (*isr)(int, void *); 322 struct work_struct irq_work; 323 u16 hwvers; 324 325 /* this hub status bit is reserved by USB 2.0 and not seen by usbcore */ 326 #define MUSB_PORT_STAT_RESUME (1 << 31) 327 328 u32 port1_status; 329 330 unsigned long rh_timer; 331 332 enum musb_h_ep0_state ep0_stage; 333 334 /* bulk traffic normally dedicates endpoint hardware, and each 335 * direction has its own ring of host side endpoints. 336 * we try to progress the transfer at the head of each endpoint's 337 * queue until it completes or NAKs too much; then we try the next 338 * endpoint. 339 */ 340 struct musb_hw_ep *bulk_ep; 341 342 struct list_head control; /* of musb_qh */ 343 struct list_head in_bulk; /* of musb_qh */ 344 struct list_head out_bulk; /* of musb_qh */ 345 346 struct timer_list otg_timer; 347 struct notifier_block nb; 348 349 struct dma_controller *dma_controller; 350 351 struct device *controller; 352 void __iomem *ctrl_base; 353 void __iomem *mregs; 354 355 #if defined(CONFIG_USB_MUSB_TUSB6010) || \ 356 defined(CONFIG_USB_MUSB_TUSB6010_MODULE) 357 dma_addr_t async; 358 dma_addr_t sync; 359 void __iomem *sync_va; 360 #endif 361 362 /* passed down from chip/board specific irq handlers */ 363 u8 int_usb; 364 u16 int_rx; 365 u16 int_tx; 366 367 struct usb_phy *xceiv; 368 369 int nIrq; 370 unsigned irq_wake:1; 371 372 struct musb_hw_ep endpoints[MUSB_C_NUM_EPS]; 373 #define control_ep endpoints 374 375 #define VBUSERR_RETRY_COUNT 3 376 u16 vbuserr_retry; 377 u16 epmask; 378 u8 nr_endpoints; 379 380 u8 board_mode; /* enum musb_mode */ 381 int (*board_set_power)(int state); 382 383 u8 min_power; /* vbus for periph, in mA/2 */ 384 385 bool is_host; 386 387 int a_wait_bcon; /* VBUS timeout in msecs */ 388 unsigned long idle_timeout; /* Next timeout in jiffies */ 389 390 /* active means connected and not suspended */ 391 unsigned is_active:1; 392 393 unsigned is_multipoint:1; 394 unsigned ignore_disconnect:1; /* during bus resets */ 395 396 unsigned hb_iso_rx:1; /* high bandwidth iso rx? */ 397 unsigned hb_iso_tx:1; /* high bandwidth iso tx? */ 398 unsigned dyn_fifo:1; /* dynamic FIFO supported? */ 399 400 unsigned bulk_split:1; 401 #define can_bulk_split(musb,type) \ 402 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split) 403 404 unsigned bulk_combine:1; 405 #define can_bulk_combine(musb,type) \ 406 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine) 407 408 /* is_suspended means USB B_PERIPHERAL suspend */ 409 unsigned is_suspended:1; 410 411 /* may_wakeup means remote wakeup is enabled */ 412 unsigned may_wakeup:1; 413 414 /* is_self_powered is reported in device status and the 415 * config descriptor. is_bus_powered means B_PERIPHERAL 416 * draws some VBUS current; both can be true. 417 */ 418 unsigned is_self_powered:1; 419 unsigned is_bus_powered:1; 420 421 unsigned set_address:1; 422 unsigned test_mode:1; 423 unsigned softconnect:1; 424 425 u8 address; 426 u8 test_mode_nr; 427 u16 ackpend; /* ep0 */ 428 enum musb_g_ep0_state ep0_state; 429 struct usb_gadget g; /* the gadget */ 430 struct usb_gadget_driver *gadget_driver; /* its driver */ 431 432 /* 433 * FIXME: Remove this flag. 434 * 435 * This is only added to allow Blackfin to work 436 * with current driver. For some unknown reason 437 * Blackfin doesn't work with double buffering 438 * and that's enabled by default. 439 * 440 * We added this flag to forcefully disable double 441 * buffering until we get it working. 442 */ 443 unsigned double_buffer_not_ok:1; 444 445 struct musb_hdrc_config *config; 446 447 #ifdef MUSB_CONFIG_PROC_FS 448 struct proc_dir_entry *proc_entry; 449 #endif 450 }; 451 452 static inline struct musb *gadget_to_musb(struct usb_gadget *g) 453 { 454 return container_of(g, struct musb, g); 455 } 456 457 static inline int musb_read_fifosize(struct musb *musb, 458 struct musb_hw_ep *hw_ep, u8 epnum) 459 { 460 void *mbase = musb->mregs; 461 u8 reg = 0; 462 463 /* read from core using indexed model */ 464 reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE)); 465 /* 0's returned when no more endpoints */ 466 if (!reg) 467 return -ENODEV; 468 469 musb->nr_endpoints++; 470 musb->epmask |= (1 << epnum); 471 472 hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f); 473 474 /* shared TX/RX FIFO? */ 475 if ((reg & 0xf0) == 0xf0) { 476 hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx; 477 hw_ep->is_shared_fifo = true; 478 return 0; 479 } else { 480 hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4); 481 hw_ep->is_shared_fifo = false; 482 } 483 484 return 0; 485 } 486 487 static inline void musb_configure_ep0(struct musb *musb) 488 { 489 musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE; 490 musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE; 491 musb->endpoints[0].is_shared_fifo = true; 492 } 493 494 /***************************** Glue it together *****************************/ 495 496 extern const char musb_driver_name[]; 497 498 #ifndef __UBOOT__ 499 extern void musb_start(struct musb *musb); 500 #else 501 extern int musb_start(struct musb *musb); 502 #endif 503 extern void musb_stop(struct musb *musb); 504 505 extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src); 506 extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst); 507 508 extern void musb_load_testpacket(struct musb *); 509 510 extern irqreturn_t musb_interrupt(struct musb *); 511 512 extern void musb_hnp_stop(struct musb *musb); 513 514 static inline void musb_platform_set_vbus(struct musb *musb, int is_on) 515 { 516 if (musb->ops->set_vbus) 517 musb->ops->set_vbus(musb, is_on); 518 } 519 520 #ifndef __UBOOT__ 521 static inline void musb_platform_enable(struct musb *musb) 522 { 523 if (musb->ops->enable) 524 musb->ops->enable(musb); 525 } 526 #else 527 static inline int musb_platform_enable(struct musb *musb) 528 { 529 if (!musb->ops->enable) 530 return 0; 531 532 return musb->ops->enable(musb); 533 } 534 #endif 535 536 static inline void musb_platform_disable(struct musb *musb) 537 { 538 if (musb->ops->disable) 539 musb->ops->disable(musb); 540 } 541 542 static inline int musb_platform_set_mode(struct musb *musb, u8 mode) 543 { 544 if (!musb->ops->set_mode) 545 return 0; 546 547 return musb->ops->set_mode(musb, mode); 548 } 549 550 static inline void musb_platform_try_idle(struct musb *musb, 551 unsigned long timeout) 552 { 553 if (musb->ops->try_idle) 554 musb->ops->try_idle(musb, timeout); 555 } 556 557 static inline int musb_platform_get_vbus_status(struct musb *musb) 558 { 559 if (!musb->ops->vbus_status) 560 return 0; 561 562 return musb->ops->vbus_status(musb); 563 } 564 565 static inline int musb_platform_init(struct musb *musb) 566 { 567 if (!musb->ops->init) 568 return -EINVAL; 569 570 return musb->ops->init(musb); 571 } 572 573 static inline int musb_platform_exit(struct musb *musb) 574 { 575 if (!musb->ops->exit) 576 return -EINVAL; 577 578 return musb->ops->exit(musb); 579 } 580 581 #ifdef __UBOOT__ 582 struct musb * 583 musb_init_controller(struct musb_hdrc_platform_data *plat, struct device *dev, 584 void *ctrl); 585 #endif 586 #endif /* __MUSB_CORE_H__ */ 587