1 /* 2 * MUSB OTG driver defines 3 * 4 * Copyright 2005 Mentor Graphics Corporation 5 * Copyright (C) 2005-2006 by Texas Instruments 6 * Copyright (C) 2006-2007 Nokia Corporation 7 * 8 * SPDX-License-Identifier: GPL-2.0 9 */ 10 11 #ifndef __MUSB_CORE_H__ 12 #define __MUSB_CORE_H__ 13 14 #ifndef __UBOOT__ 15 #include <linux/slab.h> 16 #include <linux/list.h> 17 #include <linux/interrupt.h> 18 #include <linux/errno.h> 19 #include <linux/timer.h> 20 #include <linux/device.h> 21 #include <linux/usb.h> 22 #include <linux/usb/otg.h> 23 #else 24 #include <linux/errno.h> 25 #endif 26 #include <linux/usb/ch9.h> 27 #include <linux/usb/gadget.h> 28 #include <linux/usb/musb.h> 29 30 struct musb; 31 struct musb_hw_ep; 32 struct musb_ep; 33 34 /* Helper defines for struct musb->hwvers */ 35 #define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f) 36 #define MUSB_HWVERS_MINOR(x) (x & 0x3ff) 37 #define MUSB_HWVERS_RC 0x8000 38 #define MUSB_HWVERS_1300 0x52C 39 #define MUSB_HWVERS_1400 0x590 40 #define MUSB_HWVERS_1800 0x720 41 #define MUSB_HWVERS_1900 0x784 42 #define MUSB_HWVERS_2000 0x800 43 44 #include "musb_debug.h" 45 #include "musb_dma.h" 46 47 #include "musb_io.h" 48 #include "musb_regs.h" 49 50 #include "musb_gadget.h" 51 #ifndef __UBOOT__ 52 #include <linux/usb/hcd.h> 53 #endif 54 #include "musb_host.h" 55 56 #define is_peripheral_enabled(musb) ((musb)->board_mode != MUSB_HOST) 57 #define is_host_enabled(musb) ((musb)->board_mode != MUSB_PERIPHERAL) 58 #define is_otg_enabled(musb) ((musb)->board_mode == MUSB_OTG) 59 60 /* NOTE: otg and peripheral-only state machines start at B_IDLE. 61 * OTG or host-only go to A_IDLE when ID is sensed. 62 */ 63 #define is_peripheral_active(m) (!(m)->is_host) 64 #define is_host_active(m) ((m)->is_host) 65 66 #ifdef CONFIG_PROC_FS 67 #include <linux/fs.h> 68 #define MUSB_CONFIG_PROC_FS 69 #endif 70 71 /****************************** PERIPHERAL ROLE *****************************/ 72 73 #ifndef __UBOOT__ 74 #define is_peripheral_capable() (1) 75 #else 76 #ifdef CONFIG_USB_MUSB_GADGET 77 #define is_peripheral_capable() (1) 78 #else 79 #define is_peripheral_capable() (0) 80 #endif 81 #endif 82 83 extern irqreturn_t musb_g_ep0_irq(struct musb *); 84 extern void musb_g_tx(struct musb *, u8); 85 extern void musb_g_rx(struct musb *, u8); 86 extern void musb_g_reset(struct musb *); 87 extern void musb_g_suspend(struct musb *); 88 extern void musb_g_resume(struct musb *); 89 extern void musb_g_wakeup(struct musb *); 90 extern void musb_g_disconnect(struct musb *); 91 92 /****************************** HOST ROLE ***********************************/ 93 94 #ifndef __UBOOT__ 95 #define is_host_capable() (1) 96 #else 97 #ifdef CONFIG_USB_MUSB_HOST 98 #define is_host_capable() (1) 99 #else 100 #define is_host_capable() (0) 101 #endif 102 #endif 103 104 extern irqreturn_t musb_h_ep0_irq(struct musb *); 105 extern void musb_host_tx(struct musb *, u8); 106 extern void musb_host_rx(struct musb *, u8); 107 108 /****************************** CONSTANTS ********************************/ 109 110 #ifndef MUSB_C_NUM_EPS 111 #define MUSB_C_NUM_EPS ((u8)16) 112 #endif 113 114 #ifndef MUSB_MAX_END0_PACKET 115 #define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE) 116 #endif 117 118 /* host side ep0 states */ 119 enum musb_h_ep0_state { 120 MUSB_EP0_IDLE, 121 MUSB_EP0_START, /* expect ack of setup */ 122 MUSB_EP0_IN, /* expect IN DATA */ 123 MUSB_EP0_OUT, /* expect ack of OUT DATA */ 124 MUSB_EP0_STATUS, /* expect ack of STATUS */ 125 } __attribute__ ((packed)); 126 127 /* peripheral side ep0 states */ 128 enum musb_g_ep0_state { 129 MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */ 130 MUSB_EP0_STAGE_SETUP, /* received SETUP */ 131 MUSB_EP0_STAGE_TX, /* IN data */ 132 MUSB_EP0_STAGE_RX, /* OUT data */ 133 MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */ 134 MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */ 135 MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */ 136 } __attribute__ ((packed)); 137 138 /* 139 * OTG protocol constants. See USB OTG 1.3 spec, 140 * sections 5.5 "Device Timings" and 6.6.5 "Timers". 141 */ 142 #define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */ 143 #define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */ 144 #define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */ 145 #define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */ 146 147 148 /*************************** REGISTER ACCESS ********************************/ 149 150 /* Endpoint registers (other than dynfifo setup) can be accessed either 151 * directly with the "flat" model, or after setting up an index register. 152 */ 153 154 #if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_SOC_OMAP2430) \ 155 || defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_BLACKFIN) \ 156 || defined(CONFIG_ARCH_OMAP4) 157 /* REVISIT indexed access seemed to 158 * misbehave (on DaVinci) for at least peripheral IN ... 159 */ 160 #define MUSB_FLAT_REG 161 #endif 162 163 /* TUSB mapping: "flat" plus ep0 special cases */ 164 #if defined(CONFIG_USB_MUSB_TUSB6010) || \ 165 defined(CONFIG_USB_MUSB_TUSB6010_MODULE) 166 #define musb_ep_select(_mbase, _epnum) \ 167 musb_writeb((_mbase), MUSB_INDEX, (_epnum)) 168 #define MUSB_EP_OFFSET MUSB_TUSB_OFFSET 169 170 /* "flat" mapping: each endpoint has its own i/o address */ 171 #elif defined(MUSB_FLAT_REG) 172 #define musb_ep_select(_mbase, _epnum) (((void)(_mbase)), ((void)(_epnum))) 173 #define MUSB_EP_OFFSET MUSB_FLAT_OFFSET 174 175 /* "indexed" mapping: INDEX register controls register bank select */ 176 #else 177 #define musb_ep_select(_mbase, _epnum) \ 178 musb_writeb((_mbase), MUSB_INDEX, (_epnum)) 179 #define MUSB_EP_OFFSET MUSB_INDEXED_OFFSET 180 #endif 181 182 /****************************** FUNCTIONS ********************************/ 183 184 #define MUSB_HST_MODE(_musb)\ 185 { (_musb)->is_host = true; } 186 #define MUSB_DEV_MODE(_musb) \ 187 { (_musb)->is_host = false; } 188 189 #define test_devctl_hst_mode(_x) \ 190 (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM) 191 192 #define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral") 193 194 /******************************** TYPES *************************************/ 195 196 /** 197 * struct musb_platform_ops - Operations passed to musb_core by HW glue layer 198 * @init: turns on clocks, sets up platform-specific registers, etc 199 * @exit: undoes @init 200 * @set_mode: forcefully changes operating mode 201 * @try_ilde: tries to idle the IP 202 * @vbus_status: returns vbus status if possible 203 * @set_vbus: forces vbus status 204 * @adjust_channel_params: pre check for standard dma channel_program func 205 */ 206 struct musb_platform_ops { 207 int (*init)(struct musb *musb); 208 int (*exit)(struct musb *musb); 209 210 #ifndef __UBOOT__ 211 void (*enable)(struct musb *musb); 212 #else 213 int (*enable)(struct musb *musb); 214 #endif 215 void (*disable)(struct musb *musb); 216 217 int (*set_mode)(struct musb *musb, u8 mode); 218 void (*try_idle)(struct musb *musb, unsigned long timeout); 219 220 int (*vbus_status)(struct musb *musb); 221 void (*set_vbus)(struct musb *musb, int on); 222 223 int (*adjust_channel_params)(struct dma_channel *channel, 224 u16 packet_sz, u8 *mode, 225 dma_addr_t *dma_addr, u32 *len); 226 }; 227 228 /* 229 * struct musb_hw_ep - endpoint hardware (bidirectional) 230 * 231 * Ordered slightly for better cacheline locality. 232 */ 233 struct musb_hw_ep { 234 struct musb *musb; 235 void __iomem *fifo; 236 void __iomem *regs; 237 238 #if defined(CONFIG_USB_MUSB_TUSB6010) || \ 239 defined(CONFIG_USB_MUSB_TUSB6010_MODULE) 240 void __iomem *conf; 241 #endif 242 243 /* index in musb->endpoints[] */ 244 u8 epnum; 245 246 /* hardware configuration, possibly dynamic */ 247 bool is_shared_fifo; 248 bool tx_double_buffered; 249 bool rx_double_buffered; 250 u16 max_packet_sz_tx; 251 u16 max_packet_sz_rx; 252 253 struct dma_channel *tx_channel; 254 struct dma_channel *rx_channel; 255 256 #if defined(CONFIG_USB_MUSB_TUSB6010) || \ 257 defined(CONFIG_USB_MUSB_TUSB6010_MODULE) 258 /* TUSB has "asynchronous" and "synchronous" dma modes */ 259 dma_addr_t fifo_async; 260 dma_addr_t fifo_sync; 261 void __iomem *fifo_sync_va; 262 #endif 263 264 void __iomem *target_regs; 265 266 /* currently scheduled peripheral endpoint */ 267 struct musb_qh *in_qh; 268 struct musb_qh *out_qh; 269 270 u8 rx_reinit; 271 u8 tx_reinit; 272 273 /* peripheral side */ 274 struct musb_ep ep_in; /* TX */ 275 struct musb_ep ep_out; /* RX */ 276 }; 277 278 static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep) 279 { 280 return next_request(&hw_ep->ep_in); 281 } 282 283 static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep) 284 { 285 return next_request(&hw_ep->ep_out); 286 } 287 288 struct musb_csr_regs { 289 /* FIFO registers */ 290 u16 txmaxp, txcsr, rxmaxp, rxcsr; 291 u16 rxfifoadd, txfifoadd; 292 u8 txtype, txinterval, rxtype, rxinterval; 293 u8 rxfifosz, txfifosz; 294 u8 txfunaddr, txhubaddr, txhubport; 295 u8 rxfunaddr, rxhubaddr, rxhubport; 296 }; 297 298 struct musb_context_registers { 299 300 u8 power; 301 u16 intrtxe, intrrxe; 302 u8 intrusbe; 303 u16 frame; 304 u8 index, testmode; 305 306 u8 devctl, busctl, misc; 307 u32 otg_interfsel; 308 309 struct musb_csr_regs index_regs[MUSB_C_NUM_EPS]; 310 }; 311 312 /* 313 * struct musb - Driver instance data. 314 */ 315 struct musb { 316 /* device lock */ 317 spinlock_t lock; 318 319 const struct musb_platform_ops *ops; 320 struct musb_context_registers context; 321 322 irqreturn_t (*isr)(int, void *); 323 struct work_struct irq_work; 324 u16 hwvers; 325 326 /* this hub status bit is reserved by USB 2.0 and not seen by usbcore */ 327 #define MUSB_PORT_STAT_RESUME (1 << 31) 328 329 u32 port1_status; 330 331 unsigned long rh_timer; 332 333 enum musb_h_ep0_state ep0_stage; 334 335 /* bulk traffic normally dedicates endpoint hardware, and each 336 * direction has its own ring of host side endpoints. 337 * we try to progress the transfer at the head of each endpoint's 338 * queue until it completes or NAKs too much; then we try the next 339 * endpoint. 340 */ 341 struct musb_hw_ep *bulk_ep; 342 343 struct list_head control; /* of musb_qh */ 344 struct list_head in_bulk; /* of musb_qh */ 345 struct list_head out_bulk; /* of musb_qh */ 346 347 struct timer_list otg_timer; 348 struct notifier_block nb; 349 350 struct dma_controller *dma_controller; 351 352 struct device *controller; 353 void __iomem *ctrl_base; 354 void __iomem *mregs; 355 356 #if defined(CONFIG_USB_MUSB_TUSB6010) || \ 357 defined(CONFIG_USB_MUSB_TUSB6010_MODULE) 358 dma_addr_t async; 359 dma_addr_t sync; 360 void __iomem *sync_va; 361 #endif 362 363 /* passed down from chip/board specific irq handlers */ 364 u8 int_usb; 365 u16 int_rx; 366 u16 int_tx; 367 368 struct usb_phy *xceiv; 369 370 int nIrq; 371 unsigned irq_wake:1; 372 373 struct musb_hw_ep endpoints[MUSB_C_NUM_EPS]; 374 #define control_ep endpoints 375 376 #define VBUSERR_RETRY_COUNT 3 377 u16 vbuserr_retry; 378 u16 epmask; 379 u8 nr_endpoints; 380 381 u8 board_mode; /* enum musb_mode */ 382 int (*board_set_power)(int state); 383 384 u8 min_power; /* vbus for periph, in mA/2 */ 385 386 bool is_host; 387 388 int a_wait_bcon; /* VBUS timeout in msecs */ 389 unsigned long idle_timeout; /* Next timeout in jiffies */ 390 391 /* active means connected and not suspended */ 392 unsigned is_active:1; 393 394 unsigned is_multipoint:1; 395 unsigned ignore_disconnect:1; /* during bus resets */ 396 397 unsigned hb_iso_rx:1; /* high bandwidth iso rx? */ 398 unsigned hb_iso_tx:1; /* high bandwidth iso tx? */ 399 unsigned dyn_fifo:1; /* dynamic FIFO supported? */ 400 401 unsigned bulk_split:1; 402 #define can_bulk_split(musb,type) \ 403 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split) 404 405 unsigned bulk_combine:1; 406 #define can_bulk_combine(musb,type) \ 407 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine) 408 409 /* is_suspended means USB B_PERIPHERAL suspend */ 410 unsigned is_suspended:1; 411 412 /* may_wakeup means remote wakeup is enabled */ 413 unsigned may_wakeup:1; 414 415 /* is_self_powered is reported in device status and the 416 * config descriptor. is_bus_powered means B_PERIPHERAL 417 * draws some VBUS current; both can be true. 418 */ 419 unsigned is_self_powered:1; 420 unsigned is_bus_powered:1; 421 422 unsigned set_address:1; 423 unsigned test_mode:1; 424 unsigned softconnect:1; 425 426 u8 address; 427 u8 test_mode_nr; 428 u16 ackpend; /* ep0 */ 429 enum musb_g_ep0_state ep0_state; 430 struct usb_gadget g; /* the gadget */ 431 struct usb_gadget_driver *gadget_driver; /* its driver */ 432 433 /* 434 * FIXME: Remove this flag. 435 * 436 * This is only added to allow Blackfin to work 437 * with current driver. For some unknown reason 438 * Blackfin doesn't work with double buffering 439 * and that's enabled by default. 440 * 441 * We added this flag to forcefully disable double 442 * buffering until we get it working. 443 */ 444 unsigned double_buffer_not_ok:1; 445 446 struct musb_hdrc_config *config; 447 448 #ifdef MUSB_CONFIG_PROC_FS 449 struct proc_dir_entry *proc_entry; 450 #endif 451 }; 452 453 static inline struct musb *gadget_to_musb(struct usb_gadget *g) 454 { 455 return container_of(g, struct musb, g); 456 } 457 458 #ifdef CONFIG_BLACKFIN 459 static inline int musb_read_fifosize(struct musb *musb, 460 struct musb_hw_ep *hw_ep, u8 epnum) 461 { 462 musb->nr_endpoints++; 463 musb->epmask |= (1 << epnum); 464 465 if (epnum < 5) { 466 hw_ep->max_packet_sz_tx = 128; 467 hw_ep->max_packet_sz_rx = 128; 468 } else { 469 hw_ep->max_packet_sz_tx = 1024; 470 hw_ep->max_packet_sz_rx = 1024; 471 } 472 hw_ep->is_shared_fifo = false; 473 474 return 0; 475 } 476 477 static inline void musb_configure_ep0(struct musb *musb) 478 { 479 musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE; 480 musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE; 481 musb->endpoints[0].is_shared_fifo = true; 482 } 483 484 #else 485 486 static inline int musb_read_fifosize(struct musb *musb, 487 struct musb_hw_ep *hw_ep, u8 epnum) 488 { 489 void *mbase = musb->mregs; 490 u8 reg = 0; 491 492 /* read from core using indexed model */ 493 reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE)); 494 /* 0's returned when no more endpoints */ 495 if (!reg) 496 return -ENODEV; 497 498 musb->nr_endpoints++; 499 musb->epmask |= (1 << epnum); 500 501 hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f); 502 503 /* shared TX/RX FIFO? */ 504 if ((reg & 0xf0) == 0xf0) { 505 hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx; 506 hw_ep->is_shared_fifo = true; 507 return 0; 508 } else { 509 hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4); 510 hw_ep->is_shared_fifo = false; 511 } 512 513 return 0; 514 } 515 516 static inline void musb_configure_ep0(struct musb *musb) 517 { 518 musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE; 519 musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE; 520 musb->endpoints[0].is_shared_fifo = true; 521 } 522 #endif /* CONFIG_BLACKFIN */ 523 524 525 /***************************** Glue it together *****************************/ 526 527 extern const char musb_driver_name[]; 528 529 #ifndef __UBOOT__ 530 extern void musb_start(struct musb *musb); 531 #else 532 extern int musb_start(struct musb *musb); 533 #endif 534 extern void musb_stop(struct musb *musb); 535 536 extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src); 537 extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst); 538 539 extern void musb_load_testpacket(struct musb *); 540 541 extern irqreturn_t musb_interrupt(struct musb *); 542 543 extern void musb_hnp_stop(struct musb *musb); 544 545 static inline void musb_platform_set_vbus(struct musb *musb, int is_on) 546 { 547 if (musb->ops->set_vbus) 548 musb->ops->set_vbus(musb, is_on); 549 } 550 551 #ifndef __UBOOT__ 552 static inline void musb_platform_enable(struct musb *musb) 553 { 554 if (musb->ops->enable) 555 musb->ops->enable(musb); 556 } 557 #else 558 static inline int musb_platform_enable(struct musb *musb) 559 { 560 if (!musb->ops->enable) 561 return 0; 562 563 return musb->ops->enable(musb); 564 } 565 #endif 566 567 static inline void musb_platform_disable(struct musb *musb) 568 { 569 if (musb->ops->disable) 570 musb->ops->disable(musb); 571 } 572 573 static inline int musb_platform_set_mode(struct musb *musb, u8 mode) 574 { 575 if (!musb->ops->set_mode) 576 return 0; 577 578 return musb->ops->set_mode(musb, mode); 579 } 580 581 static inline void musb_platform_try_idle(struct musb *musb, 582 unsigned long timeout) 583 { 584 if (musb->ops->try_idle) 585 musb->ops->try_idle(musb, timeout); 586 } 587 588 static inline int musb_platform_get_vbus_status(struct musb *musb) 589 { 590 if (!musb->ops->vbus_status) 591 return 0; 592 593 return musb->ops->vbus_status(musb); 594 } 595 596 static inline int musb_platform_init(struct musb *musb) 597 { 598 if (!musb->ops->init) 599 return -EINVAL; 600 601 return musb->ops->init(musb); 602 } 603 604 static inline int musb_platform_exit(struct musb *musb) 605 { 606 if (!musb->ops->exit) 607 return -EINVAL; 608 609 return musb->ops->exit(musb); 610 } 611 612 #ifdef __UBOOT__ 613 struct musb * 614 musb_init_controller(struct musb_hdrc_platform_data *plat, struct device *dev, 615 void *ctrl); 616 #endif 617 #endif /* __MUSB_CORE_H__ */ 618