1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * MUSB OTG driver defines 4 * 5 * Copyright 2005 Mentor Graphics Corporation 6 * Copyright (C) 2005-2006 by Texas Instruments 7 * Copyright (C) 2006-2007 Nokia Corporation 8 */ 9 10 #ifndef __MUSB_CORE_H__ 11 #define __MUSB_CORE_H__ 12 13 #ifndef __UBOOT__ 14 #include <linux/slab.h> 15 #include <linux/list.h> 16 #include <linux/interrupt.h> 17 #include <linux/errno.h> 18 #include <linux/timer.h> 19 #include <linux/device.h> 20 #include <linux/usb.h> 21 #include <linux/usb/otg.h> 22 #else 23 #include <linux/errno.h> 24 #endif 25 #include <linux/usb/ch9.h> 26 #include <linux/usb/gadget.h> 27 #include <linux/usb/musb.h> 28 29 struct musb; 30 struct musb_hw_ep; 31 struct musb_ep; 32 33 /* Helper defines for struct musb->hwvers */ 34 #define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f) 35 #define MUSB_HWVERS_MINOR(x) (x & 0x3ff) 36 #define MUSB_HWVERS_RC 0x8000 37 #define MUSB_HWVERS_1300 0x52C 38 #define MUSB_HWVERS_1400 0x590 39 #define MUSB_HWVERS_1800 0x720 40 #define MUSB_HWVERS_1900 0x784 41 #define MUSB_HWVERS_2000 0x800 42 43 #include "musb_debug.h" 44 #include "musb_dma.h" 45 46 #include "musb_io.h" 47 #include "musb_regs.h" 48 49 #include "musb_gadget.h" 50 #ifndef __UBOOT__ 51 #include <linux/usb/hcd.h> 52 #endif 53 #include "musb_host.h" 54 55 #define is_peripheral_enabled(musb) ((musb)->board_mode != MUSB_HOST) 56 #define is_host_enabled(musb) ((musb)->board_mode != MUSB_PERIPHERAL) 57 #define is_otg_enabled(musb) ((musb)->board_mode == MUSB_OTG) 58 59 /* NOTE: otg and peripheral-only state machines start at B_IDLE. 60 * OTG or host-only go to A_IDLE when ID is sensed. 61 */ 62 #define is_peripheral_active(m) (!(m)->is_host) 63 #define is_host_active(m) ((m)->is_host) 64 65 #ifdef CONFIG_PROC_FS 66 #include <linux/fs.h> 67 #define MUSB_CONFIG_PROC_FS 68 #endif 69 70 /****************************** PERIPHERAL ROLE *****************************/ 71 72 #ifndef __UBOOT__ 73 #define is_peripheral_capable() (1) 74 #else 75 #ifdef CONFIG_USB_MUSB_GADGET 76 #define is_peripheral_capable() (1) 77 #else 78 #define is_peripheral_capable() (0) 79 #endif 80 #endif 81 82 extern irqreturn_t musb_g_ep0_irq(struct musb *); 83 extern void musb_g_tx(struct musb *, u8); 84 extern void musb_g_rx(struct musb *, u8); 85 extern void musb_g_reset(struct musb *); 86 extern void musb_g_suspend(struct musb *); 87 extern void musb_g_resume(struct musb *); 88 extern void musb_g_wakeup(struct musb *); 89 extern void musb_g_disconnect(struct musb *); 90 91 /****************************** HOST ROLE ***********************************/ 92 93 #ifndef __UBOOT__ 94 #define is_host_capable() (1) 95 #else 96 #ifdef CONFIG_USB_MUSB_HOST 97 #define is_host_capable() (1) 98 #else 99 #define is_host_capable() (0) 100 #endif 101 #endif 102 103 extern irqreturn_t musb_h_ep0_irq(struct musb *); 104 extern void musb_host_tx(struct musb *, u8); 105 extern void musb_host_rx(struct musb *, u8); 106 107 /****************************** CONSTANTS ********************************/ 108 109 #ifndef MUSB_C_NUM_EPS 110 #define MUSB_C_NUM_EPS ((u8)16) 111 #endif 112 113 #ifndef MUSB_MAX_END0_PACKET 114 #define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE) 115 #endif 116 117 /* host side ep0 states */ 118 enum musb_h_ep0_state { 119 MUSB_EP0_IDLE, 120 MUSB_EP0_START, /* expect ack of setup */ 121 MUSB_EP0_IN, /* expect IN DATA */ 122 MUSB_EP0_OUT, /* expect ack of OUT DATA */ 123 MUSB_EP0_STATUS, /* expect ack of STATUS */ 124 } __attribute__ ((packed)); 125 126 /* peripheral side ep0 states */ 127 enum musb_g_ep0_state { 128 MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */ 129 MUSB_EP0_STAGE_SETUP, /* received SETUP */ 130 MUSB_EP0_STAGE_TX, /* IN data */ 131 MUSB_EP0_STAGE_RX, /* OUT data */ 132 MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */ 133 MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */ 134 MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */ 135 } __attribute__ ((packed)); 136 137 /* 138 * OTG protocol constants. See USB OTG 1.3 spec, 139 * sections 5.5 "Device Timings" and 6.6.5 "Timers". 140 */ 141 #define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */ 142 #define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */ 143 #define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */ 144 #define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */ 145 146 147 /*************************** REGISTER ACCESS ********************************/ 148 149 /* Endpoint registers (other than dynfifo setup) can be accessed either 150 * directly with the "flat" model, or after setting up an index register. 151 */ 152 153 #if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_SOC_OMAP2430) \ 154 || defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_ARCH_OMAP4) 155 /* REVISIT indexed access seemed to 156 * misbehave (on DaVinci) for at least peripheral IN ... 157 */ 158 #define MUSB_FLAT_REG 159 #endif 160 161 /* TUSB mapping: "flat" plus ep0 special cases */ 162 #if defined(CONFIG_USB_MUSB_TUSB6010) || \ 163 defined(CONFIG_USB_MUSB_TUSB6010_MODULE) 164 #define musb_ep_select(_mbase, _epnum) \ 165 musb_writeb((_mbase), MUSB_INDEX, (_epnum)) 166 #define MUSB_EP_OFFSET MUSB_TUSB_OFFSET 167 168 /* "flat" mapping: each endpoint has its own i/o address */ 169 #elif defined(MUSB_FLAT_REG) 170 #define musb_ep_select(_mbase, _epnum) (((void)(_mbase)), ((void)(_epnum))) 171 #define MUSB_EP_OFFSET MUSB_FLAT_OFFSET 172 173 /* "indexed" mapping: INDEX register controls register bank select */ 174 #else 175 #define musb_ep_select(_mbase, _epnum) \ 176 musb_writeb((_mbase), MUSB_INDEX, (_epnum)) 177 #define MUSB_EP_OFFSET MUSB_INDEXED_OFFSET 178 #endif 179 180 /****************************** FUNCTIONS ********************************/ 181 182 #define MUSB_HST_MODE(_musb)\ 183 { (_musb)->is_host = true; } 184 #define MUSB_DEV_MODE(_musb) \ 185 { (_musb)->is_host = false; } 186 187 #define test_devctl_hst_mode(_x) \ 188 (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM) 189 190 #define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral") 191 192 /******************************** TYPES *************************************/ 193 194 /** 195 * struct musb_platform_ops - Operations passed to musb_core by HW glue layer 196 * @init: turns on clocks, sets up platform-specific registers, etc 197 * @exit: undoes @init 198 * @set_mode: forcefully changes operating mode 199 * @try_ilde: tries to idle the IP 200 * @vbus_status: returns vbus status if possible 201 * @set_vbus: forces vbus status 202 * @adjust_channel_params: pre check for standard dma channel_program func 203 */ 204 struct musb_platform_ops { 205 int (*init)(struct musb *musb); 206 int (*exit)(struct musb *musb); 207 208 #ifndef __UBOOT__ 209 void (*enable)(struct musb *musb); 210 #else 211 int (*enable)(struct musb *musb); 212 #endif 213 void (*disable)(struct musb *musb); 214 215 int (*set_mode)(struct musb *musb, u8 mode); 216 void (*try_idle)(struct musb *musb, unsigned long timeout); 217 218 int (*vbus_status)(struct musb *musb); 219 void (*set_vbus)(struct musb *musb, int on); 220 221 int (*adjust_channel_params)(struct dma_channel *channel, 222 u16 packet_sz, u8 *mode, 223 dma_addr_t *dma_addr, u32 *len); 224 }; 225 226 /* 227 * struct musb_hw_ep - endpoint hardware (bidirectional) 228 * 229 * Ordered slightly for better cacheline locality. 230 */ 231 struct musb_hw_ep { 232 struct musb *musb; 233 void __iomem *fifo; 234 void __iomem *regs; 235 236 #if defined(CONFIG_USB_MUSB_TUSB6010) || \ 237 defined(CONFIG_USB_MUSB_TUSB6010_MODULE) 238 void __iomem *conf; 239 #endif 240 241 /* index in musb->endpoints[] */ 242 u8 epnum; 243 244 /* hardware configuration, possibly dynamic */ 245 bool is_shared_fifo; 246 bool tx_double_buffered; 247 bool rx_double_buffered; 248 u16 max_packet_sz_tx; 249 u16 max_packet_sz_rx; 250 251 struct dma_channel *tx_channel; 252 struct dma_channel *rx_channel; 253 254 #if defined(CONFIG_USB_MUSB_TUSB6010) || \ 255 defined(CONFIG_USB_MUSB_TUSB6010_MODULE) 256 /* TUSB has "asynchronous" and "synchronous" dma modes */ 257 dma_addr_t fifo_async; 258 dma_addr_t fifo_sync; 259 void __iomem *fifo_sync_va; 260 #endif 261 262 void __iomem *target_regs; 263 264 /* currently scheduled peripheral endpoint */ 265 struct musb_qh *in_qh; 266 struct musb_qh *out_qh; 267 268 u8 rx_reinit; 269 u8 tx_reinit; 270 271 /* peripheral side */ 272 struct musb_ep ep_in; /* TX */ 273 struct musb_ep ep_out; /* RX */ 274 }; 275 276 static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep) 277 { 278 return next_request(&hw_ep->ep_in); 279 } 280 281 static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep) 282 { 283 return next_request(&hw_ep->ep_out); 284 } 285 286 struct musb_csr_regs { 287 /* FIFO registers */ 288 u16 txmaxp, txcsr, rxmaxp, rxcsr; 289 u16 rxfifoadd, txfifoadd; 290 u8 txtype, txinterval, rxtype, rxinterval; 291 u8 rxfifosz, txfifosz; 292 u8 txfunaddr, txhubaddr, txhubport; 293 u8 rxfunaddr, rxhubaddr, rxhubport; 294 }; 295 296 struct musb_context_registers { 297 298 u8 power; 299 u16 intrtxe, intrrxe; 300 u8 intrusbe; 301 u16 frame; 302 u8 index, testmode; 303 304 u8 devctl, busctl, misc; 305 u32 otg_interfsel; 306 307 struct musb_csr_regs index_regs[MUSB_C_NUM_EPS]; 308 }; 309 310 /* 311 * struct musb - Driver instance data. 312 */ 313 struct musb { 314 /* device lock */ 315 spinlock_t lock; 316 317 const struct musb_platform_ops *ops; 318 struct musb_context_registers context; 319 320 irqreturn_t (*isr)(int, void *); 321 struct work_struct irq_work; 322 u16 hwvers; 323 324 /* this hub status bit is reserved by USB 2.0 and not seen by usbcore */ 325 #define MUSB_PORT_STAT_RESUME (1 << 31) 326 327 u32 port1_status; 328 329 unsigned long rh_timer; 330 331 enum musb_h_ep0_state ep0_stage; 332 333 /* bulk traffic normally dedicates endpoint hardware, and each 334 * direction has its own ring of host side endpoints. 335 * we try to progress the transfer at the head of each endpoint's 336 * queue until it completes or NAKs too much; then we try the next 337 * endpoint. 338 */ 339 struct musb_hw_ep *bulk_ep; 340 341 struct list_head control; /* of musb_qh */ 342 struct list_head in_bulk; /* of musb_qh */ 343 struct list_head out_bulk; /* of musb_qh */ 344 345 struct timer_list otg_timer; 346 struct notifier_block nb; 347 348 struct dma_controller *dma_controller; 349 350 struct device *controller; 351 void __iomem *ctrl_base; 352 void __iomem *mregs; 353 354 #if defined(CONFIG_USB_MUSB_TUSB6010) || \ 355 defined(CONFIG_USB_MUSB_TUSB6010_MODULE) 356 dma_addr_t async; 357 dma_addr_t sync; 358 void __iomem *sync_va; 359 #endif 360 361 /* passed down from chip/board specific irq handlers */ 362 u8 int_usb; 363 u16 int_rx; 364 u16 int_tx; 365 366 struct usb_phy *xceiv; 367 368 int nIrq; 369 unsigned irq_wake:1; 370 371 struct musb_hw_ep endpoints[MUSB_C_NUM_EPS]; 372 #define control_ep endpoints 373 374 #define VBUSERR_RETRY_COUNT 3 375 u16 vbuserr_retry; 376 u16 epmask; 377 u8 nr_endpoints; 378 379 u8 board_mode; /* enum musb_mode */ 380 int (*board_set_power)(int state); 381 382 u8 min_power; /* vbus for periph, in mA/2 */ 383 384 bool is_host; 385 386 int a_wait_bcon; /* VBUS timeout in msecs */ 387 unsigned long idle_timeout; /* Next timeout in jiffies */ 388 389 /* active means connected and not suspended */ 390 unsigned is_active:1; 391 392 unsigned is_multipoint:1; 393 unsigned ignore_disconnect:1; /* during bus resets */ 394 395 unsigned hb_iso_rx:1; /* high bandwidth iso rx? */ 396 unsigned hb_iso_tx:1; /* high bandwidth iso tx? */ 397 unsigned dyn_fifo:1; /* dynamic FIFO supported? */ 398 399 unsigned bulk_split:1; 400 #define can_bulk_split(musb,type) \ 401 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split) 402 403 unsigned bulk_combine:1; 404 #define can_bulk_combine(musb,type) \ 405 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine) 406 407 /* is_suspended means USB B_PERIPHERAL suspend */ 408 unsigned is_suspended:1; 409 410 /* may_wakeup means remote wakeup is enabled */ 411 unsigned may_wakeup:1; 412 413 /* is_self_powered is reported in device status and the 414 * config descriptor. is_bus_powered means B_PERIPHERAL 415 * draws some VBUS current; both can be true. 416 */ 417 unsigned is_self_powered:1; 418 unsigned is_bus_powered:1; 419 420 unsigned set_address:1; 421 unsigned test_mode:1; 422 unsigned softconnect:1; 423 424 u8 address; 425 u8 test_mode_nr; 426 u16 ackpend; /* ep0 */ 427 enum musb_g_ep0_state ep0_state; 428 struct usb_gadget g; /* the gadget */ 429 struct usb_gadget_driver *gadget_driver; /* its driver */ 430 431 /* 432 * FIXME: Remove this flag. 433 * 434 * This is only added to allow Blackfin to work 435 * with current driver. For some unknown reason 436 * Blackfin doesn't work with double buffering 437 * and that's enabled by default. 438 * 439 * We added this flag to forcefully disable double 440 * buffering until we get it working. 441 */ 442 unsigned double_buffer_not_ok:1; 443 444 struct musb_hdrc_config *config; 445 446 #ifdef MUSB_CONFIG_PROC_FS 447 struct proc_dir_entry *proc_entry; 448 #endif 449 }; 450 451 static inline struct musb *gadget_to_musb(struct usb_gadget *g) 452 { 453 return container_of(g, struct musb, g); 454 } 455 456 static inline int musb_read_fifosize(struct musb *musb, 457 struct musb_hw_ep *hw_ep, u8 epnum) 458 { 459 void *mbase = musb->mregs; 460 u8 reg = 0; 461 462 /* read from core using indexed model */ 463 reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE)); 464 /* 0's returned when no more endpoints */ 465 if (!reg) 466 return -ENODEV; 467 468 musb->nr_endpoints++; 469 musb->epmask |= (1 << epnum); 470 471 hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f); 472 473 /* shared TX/RX FIFO? */ 474 if ((reg & 0xf0) == 0xf0) { 475 hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx; 476 hw_ep->is_shared_fifo = true; 477 return 0; 478 } else { 479 hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4); 480 hw_ep->is_shared_fifo = false; 481 } 482 483 return 0; 484 } 485 486 static inline void musb_configure_ep0(struct musb *musb) 487 { 488 musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE; 489 musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE; 490 musb->endpoints[0].is_shared_fifo = true; 491 } 492 493 /***************************** Glue it together *****************************/ 494 495 extern const char musb_driver_name[]; 496 497 #ifndef __UBOOT__ 498 extern void musb_start(struct musb *musb); 499 #else 500 extern int musb_start(struct musb *musb); 501 #endif 502 extern void musb_stop(struct musb *musb); 503 504 extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src); 505 extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst); 506 507 extern void musb_load_testpacket(struct musb *); 508 509 extern irqreturn_t musb_interrupt(struct musb *); 510 511 extern void musb_hnp_stop(struct musb *musb); 512 513 static inline void musb_platform_set_vbus(struct musb *musb, int is_on) 514 { 515 if (musb->ops->set_vbus) 516 musb->ops->set_vbus(musb, is_on); 517 } 518 519 #ifndef __UBOOT__ 520 static inline void musb_platform_enable(struct musb *musb) 521 { 522 if (musb->ops->enable) 523 musb->ops->enable(musb); 524 } 525 #else 526 static inline int musb_platform_enable(struct musb *musb) 527 { 528 if (!musb->ops->enable) 529 return 0; 530 531 return musb->ops->enable(musb); 532 } 533 #endif 534 535 static inline void musb_platform_disable(struct musb *musb) 536 { 537 if (musb->ops->disable) 538 musb->ops->disable(musb); 539 } 540 541 static inline int musb_platform_set_mode(struct musb *musb, u8 mode) 542 { 543 if (!musb->ops->set_mode) 544 return 0; 545 546 return musb->ops->set_mode(musb, mode); 547 } 548 549 static inline void musb_platform_try_idle(struct musb *musb, 550 unsigned long timeout) 551 { 552 if (musb->ops->try_idle) 553 musb->ops->try_idle(musb, timeout); 554 } 555 556 static inline int musb_platform_get_vbus_status(struct musb *musb) 557 { 558 if (!musb->ops->vbus_status) 559 return 0; 560 561 return musb->ops->vbus_status(musb); 562 } 563 564 static inline int musb_platform_init(struct musb *musb) 565 { 566 if (!musb->ops->init) 567 return -EINVAL; 568 569 return musb->ops->init(musb); 570 } 571 572 static inline int musb_platform_exit(struct musb *musb) 573 { 574 if (!musb->ops->exit) 575 return -EINVAL; 576 577 return musb->ops->exit(musb); 578 } 579 580 #ifdef __UBOOT__ 581 struct musb * 582 musb_init_controller(struct musb_hdrc_platform_data *plat, struct device *dev, 583 void *ctrl); 584 #endif 585 #endif /* __MUSB_CORE_H__ */ 586