xref: /openbmc/u-boot/drivers/usb/host/xhci-omap.c (revision ae485b54)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * OMAP USB HOST xHCI Controller
4  *
5  * (C) Copyright 2013
6  * Texas Instruments, <www.ti.com>
7  *
8  * Author: Dan Murphy <dmurphy@ti.com>
9  */
10 
11 #include <common.h>
12 #include <usb.h>
13 #include <linux/errno.h>
14 #include <asm/omap_common.h>
15 #include <asm/arch/cpu.h>
16 #include <asm/arch/sys_proto.h>
17 
18 #include <linux/compat.h>
19 #include <linux/usb/dwc3.h>
20 #include <linux/usb/xhci-omap.h>
21 
22 #include "xhci.h"
23 
24 /* Declare global data pointer */
25 static struct omap_xhci omap;
26 
27 static int omap_xhci_core_init(struct omap_xhci *omap)
28 {
29 	int ret = 0;
30 
31 	usb_phy_power(1);
32 	omap_enable_phy(omap);
33 
34 	ret = dwc3_core_init(omap->dwc3_reg);
35 	if (ret) {
36 		debug("%s:failed to initialize core\n", __func__);
37 		return ret;
38 	}
39 
40 	/* We are hard-coding DWC3 core to Host Mode */
41 	dwc3_set_mode(omap->dwc3_reg, DWC3_GCTL_PRTCAP_HOST);
42 
43 	return ret;
44 }
45 
46 static void omap_xhci_core_exit(struct omap_xhci *omap)
47 {
48 	usb_phy_power(0);
49 }
50 
51 int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor)
52 {
53 	struct omap_xhci *ctx = &omap;
54 	int ret = 0;
55 
56 	ctx->hcd = (struct xhci_hccr *)OMAP_XHCI_BASE;
57 	ctx->dwc3_reg = (struct dwc3 *)((char *)(ctx->hcd) + DWC3_REG_OFFSET);
58 	ctx->usb3_phy = (struct omap_usb3_phy *)OMAP_OCP1_SCP_BASE;
59 	ctx->otg_wrapper = (struct omap_dwc_wrapper *)OMAP_OTG_WRAPPER_BASE;
60 
61 	ret = board_usb_init(index, USB_INIT_HOST);
62 	if (ret != 0) {
63 		puts("Failed to initialize board for USB\n");
64 		return ret;
65 	}
66 
67 	ret = omap_xhci_core_init(ctx);
68 	if (ret < 0) {
69 		puts("Failed to initialize xhci\n");
70 		return ret;
71 	}
72 
73 	*hccr = (struct xhci_hccr *)(OMAP_XHCI_BASE);
74 	*hcor = (struct xhci_hcor *)((uint32_t) *hccr
75 				+ HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase)));
76 
77 	debug("omap-xhci: init hccr %x and hcor %x hc_length %d\n",
78 	      (uint32_t)*hccr, (uint32_t)*hcor,
79 	      (uint32_t)HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase)));
80 
81 	return ret;
82 }
83 
84 void xhci_hcd_stop(int index)
85 {
86 	struct omap_xhci *ctx = &omap;
87 
88 	omap_xhci_core_exit(ctx);
89 	board_usb_cleanup(index, USB_INIT_HOST);
90 }
91