1 /* 2 * Copyright 2015,2016 Freescale Semiconductor, Inc. 3 * 4 * FSL USB HOST xHCI Controller 5 * 6 * Author: Ramneek Mehresh<ramneek.mehresh@freescale.com> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #include <common.h> 12 #include <usb.h> 13 #include <asm-generic/errno.h> 14 #include <linux/compat.h> 15 #include <linux/usb/xhci-fsl.h> 16 #include <linux/usb/dwc3.h> 17 #include "xhci.h" 18 #include <fsl_errata.h> 19 #include <fsl_usb.h> 20 #include <dm.h> 21 22 /* Declare global data pointer */ 23 DECLARE_GLOBAL_DATA_PTR; 24 25 #ifndef CONFIG_DM_USB 26 static struct fsl_xhci fsl_xhci; 27 unsigned long ctr_addr[] = FSL_USB_XHCI_ADDR; 28 #else 29 struct xhci_fsl_priv { 30 struct xhci_ctrl xhci; 31 fdt_addr_t hcd_base; 32 struct fsl_xhci ctx; 33 }; 34 #endif 35 36 __weak int __board_usb_init(int index, enum usb_init_type init) 37 { 38 return 0; 39 } 40 41 static int erratum_a008751(void) 42 { 43 #if defined(CONFIG_TARGET_LS2080AQDS) || defined(CONFIG_TARGET_LS2080ARDB) 44 u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE; 45 writel(SCFG_USB3PRM1CR_INIT, scfg + SCFG_USB3PRM1CR / 4); 46 return 0; 47 #endif 48 return 1; 49 } 50 51 static void fsl_apply_xhci_errata(void) 52 { 53 int ret; 54 if (has_erratum_a008751()) { 55 ret = erratum_a008751(); 56 if (ret != 0) 57 puts("Failed to apply erratum a008751\n"); 58 } 59 } 60 61 static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci) 62 { 63 int ret = 0; 64 65 ret = dwc3_core_init(fsl_xhci->dwc3_reg); 66 if (ret) { 67 debug("%s:failed to initialize core\n", __func__); 68 return ret; 69 } 70 71 /* We are hard-coding DWC3 core to Host Mode */ 72 dwc3_set_mode(fsl_xhci->dwc3_reg, DWC3_GCTL_PRTCAP_HOST); 73 74 /* Set GFLADJ_30MHZ as 20h as per XHCI spec default value */ 75 dwc3_set_fladj(fsl_xhci->dwc3_reg, GFLADJ_30MHZ_DEFAULT); 76 77 return ret; 78 } 79 80 static int fsl_xhci_core_exit(struct fsl_xhci *fsl_xhci) 81 { 82 /* 83 * Currently fsl socs do not support PHY shutdown from 84 * sw. But this support may be added in future socs. 85 */ 86 return 0; 87 } 88 89 #ifdef CONFIG_DM_USB 90 static int xhci_fsl_probe(struct udevice *dev) 91 { 92 struct xhci_fsl_priv *priv = dev_get_priv(dev); 93 struct xhci_hccr *hccr; 94 struct xhci_hcor *hcor; 95 96 int ret = 0; 97 98 /* 99 * Get the base address for XHCI controller from the device node 100 */ 101 priv->hcd_base = dev_get_addr(dev); 102 if (priv->hcd_base == FDT_ADDR_T_NONE) { 103 debug("Can't get the XHCI register base address\n"); 104 return -ENXIO; 105 } 106 priv->ctx.hcd = (struct xhci_hccr *)priv->hcd_base; 107 priv->ctx.dwc3_reg = (struct dwc3 *)((char *)(priv->hcd_base) + 108 DWC3_REG_OFFSET); 109 110 fsl_apply_xhci_errata(); 111 112 ret = fsl_xhci_core_init(&priv->ctx); 113 if (ret < 0) { 114 puts("Failed to initialize xhci\n"); 115 return ret; 116 } 117 118 hccr = (struct xhci_hccr *)(priv->ctx.hcd); 119 hcor = (struct xhci_hcor *)((uintptr_t) hccr 120 + HC_LENGTH(xhci_readl(&hccr->cr_capbase))); 121 122 debug("xhci-fsl: init hccr %lx and hcor %lx hc_length %lx\n", 123 (uintptr_t)hccr, (uintptr_t)hcor, 124 (uintptr_t)HC_LENGTH(xhci_readl(&hccr->cr_capbase))); 125 126 return xhci_register(dev, hccr, hcor); 127 } 128 129 static int xhci_fsl_remove(struct udevice *dev) 130 { 131 struct xhci_fsl_priv *priv = dev_get_priv(dev); 132 int ret; 133 134 fsl_xhci_core_exit(&priv->ctx); 135 136 ret = xhci_deregister(dev); 137 if (ret) 138 return ret; 139 140 return 0; 141 } 142 143 static const struct udevice_id xhci_usb_ids[] = { 144 { .compatible = "fsl,layerscape-dwc3", }, 145 { } 146 }; 147 148 U_BOOT_DRIVER(xhci_fsl) = { 149 .name = "xhci_fsl", 150 .id = UCLASS_USB, 151 .of_match = xhci_usb_ids, 152 .probe = xhci_fsl_probe, 153 .remove = xhci_fsl_remove, 154 .ops = &xhci_usb_ops, 155 .platdata_auto_alloc_size = sizeof(struct usb_platdata), 156 .priv_auto_alloc_size = sizeof(struct xhci_fsl_priv), 157 .flags = DM_FLAG_ALLOC_PRIV_DMA, 158 }; 159 #else 160 int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor) 161 { 162 struct fsl_xhci *ctx = &fsl_xhci; 163 int ret = 0; 164 165 ctx->hcd = (struct xhci_hccr *)ctr_addr[index]; 166 ctx->dwc3_reg = (struct dwc3 *)((char *)(ctx->hcd) + DWC3_REG_OFFSET); 167 168 ret = board_usb_init(index, USB_INIT_HOST); 169 if (ret != 0) { 170 puts("Failed to initialize board for USB\n"); 171 return ret; 172 } 173 174 fsl_apply_xhci_errata(); 175 176 ret = fsl_xhci_core_init(ctx); 177 if (ret < 0) { 178 puts("Failed to initialize xhci\n"); 179 return ret; 180 } 181 182 *hccr = (struct xhci_hccr *)ctx->hcd; 183 *hcor = (struct xhci_hcor *)((uintptr_t) *hccr 184 + HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); 185 186 debug("fsl-xhci: init hccr %lx and hcor %lx hc_length %lx\n", 187 (uintptr_t)*hccr, (uintptr_t)*hcor, 188 (uintptr_t)HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); 189 190 return ret; 191 } 192 193 void xhci_hcd_stop(int index) 194 { 195 struct fsl_xhci *ctx = &fsl_xhci; 196 197 fsl_xhci_core_exit(ctx); 198 } 199 #endif 200