12731b9a8SJean-Christophe PLAGNIOL-VILLARD /* 22731b9a8SJean-Christophe PLAGNIOL-VILLARD * (C) Copyright 2006 32731b9a8SJean-Christophe PLAGNIOL-VILLARD * DENX Software Engineering <mk@denx.de> 42731b9a8SJean-Christophe PLAGNIOL-VILLARD * 52731b9a8SJean-Christophe PLAGNIOL-VILLARD * See file CREDITS for list of people who contributed to this 62731b9a8SJean-Christophe PLAGNIOL-VILLARD * project. 72731b9a8SJean-Christophe PLAGNIOL-VILLARD * 82731b9a8SJean-Christophe PLAGNIOL-VILLARD * This program is free software; you can redistribute it and/or 92731b9a8SJean-Christophe PLAGNIOL-VILLARD * modify it under the terms of the GNU General Public License as 102731b9a8SJean-Christophe PLAGNIOL-VILLARD * published by the Free Software Foundation; either version 2 of 112731b9a8SJean-Christophe PLAGNIOL-VILLARD * the License, or (at your option) any later version. 122731b9a8SJean-Christophe PLAGNIOL-VILLARD * 132731b9a8SJean-Christophe PLAGNIOL-VILLARD * This program is distributed in the hope that it will be useful, 142731b9a8SJean-Christophe PLAGNIOL-VILLARD * but WITHOUT ANY WARRANTY; without even the implied warranty of 152731b9a8SJean-Christophe PLAGNIOL-VILLARD * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 162731b9a8SJean-Christophe PLAGNIOL-VILLARD * GNU General Public License for more details. 172731b9a8SJean-Christophe PLAGNIOL-VILLARD * 182731b9a8SJean-Christophe PLAGNIOL-VILLARD * You should have received a copy of the GNU General Public License 192731b9a8SJean-Christophe PLAGNIOL-VILLARD * along with this program; if not, write to the Free Software 202731b9a8SJean-Christophe PLAGNIOL-VILLARD * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 212731b9a8SJean-Christophe PLAGNIOL-VILLARD * MA 02111-1307 USA 222731b9a8SJean-Christophe PLAGNIOL-VILLARD */ 232731b9a8SJean-Christophe PLAGNIOL-VILLARD 242731b9a8SJean-Christophe PLAGNIOL-VILLARD #include <common.h> 252731b9a8SJean-Christophe PLAGNIOL-VILLARD 262731b9a8SJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) 272731b9a8SJean-Christophe PLAGNIOL-VILLARD 2886592f60SReinhard Meyer #include <asm/io.h> 292731b9a8SJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/hardware.h> 302731b9a8SJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/at91_pmc.h> 31dc39ae95SJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/clk.h> 322731b9a8SJean-Christophe PLAGNIOL-VILLARD 332731b9a8SJean-Christophe PLAGNIOL-VILLARD int usb_cpu_init(void) 342731b9a8SJean-Christophe PLAGNIOL-VILLARD { 35372f2783SReinhard Meyer at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC; 362731b9a8SJean-Christophe PLAGNIOL-VILLARD 372731b9a8SJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ 38faa14babSRONETIX - Ilko Iliev defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \ 39faa14babSRONETIX - Ilko Iliev defined(CONFIG_AT91SAM9261) 402731b9a8SJean-Christophe PLAGNIOL-VILLARD /* Enable PLLB */ 410701f730SMatthias Fuchs writel(get_pllb_init(), &pmc->pllbr); 420701f730SMatthias Fuchs while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB) 432731b9a8SJean-Christophe PLAGNIOL-VILLARD ; 44bcfc8976SRichard Genoud #elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) || \ 45*e5e8bb05SBo Shen defined(CONFIG_AT91SAM9X5) || defined(CONFIG_SAMA5D3) 4664203c7bSSergey Matyukevich /* Enable UPLL */ 4764203c7bSSergey Matyukevich writel(readl(&pmc->uckr) | AT91_PMC_UPLLEN | AT91_PMC_BIASEN, 4864203c7bSSergey Matyukevich &pmc->uckr); 4964203c7bSSergey Matyukevich while ((readl(&pmc->sr) & AT91_PMC_LOCKU) != AT91_PMC_LOCKU) 5064203c7bSSergey Matyukevich ; 5164203c7bSSergey Matyukevich 5264203c7bSSergey Matyukevich /* Select PLLA as input clock of OHCI */ 5364203c7bSSergey Matyukevich writel(AT91_PMC_USBS_USB_UPLL | AT91_PMC_USBDIV_10, &pmc->usb); 542731b9a8SJean-Christophe PLAGNIOL-VILLARD #endif 552731b9a8SJean-Christophe PLAGNIOL-VILLARD 562731b9a8SJean-Christophe PLAGNIOL-VILLARD /* Enable USB host clock. */ 57*e5e8bb05SBo Shen #ifdef CONFIG_SAMA5D3 58*e5e8bb05SBo Shen writel(1 << (ATMEL_ID_UHP - 32), &pmc->pcer1); 59*e5e8bb05SBo Shen #else 60372f2783SReinhard Meyer writel(1 << ATMEL_ID_UHP, &pmc->pcer); 61*e5e8bb05SBo Shen #endif 62*e5e8bb05SBo Shen 632731b9a8SJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_AT91SAM9261 64372f2783SReinhard Meyer writel(ATMEL_PMC_UHP | AT91_PMC_HCK0, &pmc->scer); 652731b9a8SJean-Christophe PLAGNIOL-VILLARD #else 66372f2783SReinhard Meyer writel(ATMEL_PMC_UHP, &pmc->scer); 672731b9a8SJean-Christophe PLAGNIOL-VILLARD #endif 682731b9a8SJean-Christophe PLAGNIOL-VILLARD 692731b9a8SJean-Christophe PLAGNIOL-VILLARD return 0; 702731b9a8SJean-Christophe PLAGNIOL-VILLARD } 712731b9a8SJean-Christophe PLAGNIOL-VILLARD 722731b9a8SJean-Christophe PLAGNIOL-VILLARD int usb_cpu_stop(void) 732731b9a8SJean-Christophe PLAGNIOL-VILLARD { 74372f2783SReinhard Meyer at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC; 750701f730SMatthias Fuchs 762731b9a8SJean-Christophe PLAGNIOL-VILLARD /* Disable USB host clock. */ 77*e5e8bb05SBo Shen #ifdef CONFIG_SAMA5D3 78*e5e8bb05SBo Shen writel(1 << (ATMEL_ID_UHP - 32), &pmc->pcdr1); 79*e5e8bb05SBo Shen #else 80372f2783SReinhard Meyer writel(1 << ATMEL_ID_UHP, &pmc->pcdr); 81*e5e8bb05SBo Shen #endif 82*e5e8bb05SBo Shen 832731b9a8SJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_AT91SAM9261 84372f2783SReinhard Meyer writel(ATMEL_PMC_UHP | AT91_PMC_HCK0, &pmc->scdr); 852731b9a8SJean-Christophe PLAGNIOL-VILLARD #else 86372f2783SReinhard Meyer writel(ATMEL_PMC_UHP, &pmc->scdr); 872731b9a8SJean-Christophe PLAGNIOL-VILLARD #endif 882731b9a8SJean-Christophe PLAGNIOL-VILLARD 892731b9a8SJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ 902731b9a8SJean-Christophe PLAGNIOL-VILLARD defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) 912731b9a8SJean-Christophe PLAGNIOL-VILLARD /* Disable PLLB */ 920701f730SMatthias Fuchs writel(0, &pmc->pllbr); 930701f730SMatthias Fuchs while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != 0) 942731b9a8SJean-Christophe PLAGNIOL-VILLARD ; 95bcfc8976SRichard Genoud #elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) || \ 96*e5e8bb05SBo Shen defined(CONFIG_AT91SAM9X5) || defined(CONFIG_SAMA5D3) 9764203c7bSSergey Matyukevich /* Disable UPLL */ 9864203c7bSSergey Matyukevich writel(readl(&pmc->uckr) & (~AT91_PMC_UPLLEN), &pmc->uckr); 9964203c7bSSergey Matyukevich while ((readl(&pmc->sr) & AT91_PMC_LOCKU) == AT91_PMC_LOCKU) 10064203c7bSSergey Matyukevich ; 1012731b9a8SJean-Christophe PLAGNIOL-VILLARD #endif 1022731b9a8SJean-Christophe PLAGNIOL-VILLARD 1032731b9a8SJean-Christophe PLAGNIOL-VILLARD return 0; 1042731b9a8SJean-Christophe PLAGNIOL-VILLARD } 1052731b9a8SJean-Christophe PLAGNIOL-VILLARD 1062731b9a8SJean-Christophe PLAGNIOL-VILLARD int usb_cpu_init_fail(void) 1072731b9a8SJean-Christophe PLAGNIOL-VILLARD { 1082731b9a8SJean-Christophe PLAGNIOL-VILLARD return usb_cpu_stop(); 1092731b9a8SJean-Christophe PLAGNIOL-VILLARD } 1102731b9a8SJean-Christophe PLAGNIOL-VILLARD 1112731b9a8SJean-Christophe PLAGNIOL-VILLARD #endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */ 112