12731b9a8SJean-Christophe PLAGNIOL-VILLARD /* 22731b9a8SJean-Christophe PLAGNIOL-VILLARD * (C) Copyright 2006 32731b9a8SJean-Christophe PLAGNIOL-VILLARD * DENX Software Engineering <mk@denx.de> 42731b9a8SJean-Christophe PLAGNIOL-VILLARD * 51a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 62731b9a8SJean-Christophe PLAGNIOL-VILLARD */ 72731b9a8SJean-Christophe PLAGNIOL-VILLARD 82731b9a8SJean-Christophe PLAGNIOL-VILLARD #include <common.h> 92731b9a8SJean-Christophe PLAGNIOL-VILLARD 102731b9a8SJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) 112731b9a8SJean-Christophe PLAGNIOL-VILLARD 1286592f60SReinhard Meyer #include <asm/io.h> 132731b9a8SJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/hardware.h> 142731b9a8SJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/at91_pmc.h> 15dc39ae95SJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/clk.h> 162731b9a8SJean-Christophe PLAGNIOL-VILLARD 172731b9a8SJean-Christophe PLAGNIOL-VILLARD int usb_cpu_init(void) 182731b9a8SJean-Christophe PLAGNIOL-VILLARD { 19372f2783SReinhard Meyer at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC; 202731b9a8SJean-Christophe PLAGNIOL-VILLARD 21*dcd2f1a0SBo Shen #ifdef CONFIG_USB_ATMEL_CLK_SEL_PLLB 222731b9a8SJean-Christophe PLAGNIOL-VILLARD /* Enable PLLB */ 230701f730SMatthias Fuchs writel(get_pllb_init(), &pmc->pllbr); 240701f730SMatthias Fuchs while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB) 252731b9a8SJean-Christophe PLAGNIOL-VILLARD ; 26d9bef0adSBo Shen #ifdef CONFIG_AT91SAM9N12 27d9bef0adSBo Shen writel(AT91_PMC_USBS_USB_PLLB | AT91_PMC_USB_DIV_2, &pmc->usb); 28d9bef0adSBo Shen #endif 29*dcd2f1a0SBo Shen #elif defined(CONFIG_USB_ATMEL_CLK_SEL_UPLL) 3064203c7bSSergey Matyukevich /* Enable UPLL */ 3164203c7bSSergey Matyukevich writel(readl(&pmc->uckr) | AT91_PMC_UPLLEN | AT91_PMC_BIASEN, 3264203c7bSSergey Matyukevich &pmc->uckr); 3364203c7bSSergey Matyukevich while ((readl(&pmc->sr) & AT91_PMC_LOCKU) != AT91_PMC_LOCKU) 3464203c7bSSergey Matyukevich ; 3564203c7bSSergey Matyukevich 3664203c7bSSergey Matyukevich /* Select PLLA as input clock of OHCI */ 3764203c7bSSergey Matyukevich writel(AT91_PMC_USBS_USB_UPLL | AT91_PMC_USBDIV_10, &pmc->usb); 382731b9a8SJean-Christophe PLAGNIOL-VILLARD #endif 392731b9a8SJean-Christophe PLAGNIOL-VILLARD 402731b9a8SJean-Christophe PLAGNIOL-VILLARD /* Enable USB host clock. */ 41e5e8bb05SBo Shen #ifdef CONFIG_SAMA5D3 42e5e8bb05SBo Shen writel(1 << (ATMEL_ID_UHP - 32), &pmc->pcer1); 43e5e8bb05SBo Shen #else 44372f2783SReinhard Meyer writel(1 << ATMEL_ID_UHP, &pmc->pcer); 45e5e8bb05SBo Shen #endif 46e5e8bb05SBo Shen 47158947d2SBo Shen #if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) 48372f2783SReinhard Meyer writel(ATMEL_PMC_UHP | AT91_PMC_HCK0, &pmc->scer); 492731b9a8SJean-Christophe PLAGNIOL-VILLARD #else 50372f2783SReinhard Meyer writel(ATMEL_PMC_UHP, &pmc->scer); 512731b9a8SJean-Christophe PLAGNIOL-VILLARD #endif 522731b9a8SJean-Christophe PLAGNIOL-VILLARD 532731b9a8SJean-Christophe PLAGNIOL-VILLARD return 0; 542731b9a8SJean-Christophe PLAGNIOL-VILLARD } 552731b9a8SJean-Christophe PLAGNIOL-VILLARD 562731b9a8SJean-Christophe PLAGNIOL-VILLARD int usb_cpu_stop(void) 572731b9a8SJean-Christophe PLAGNIOL-VILLARD { 58372f2783SReinhard Meyer at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC; 590701f730SMatthias Fuchs 602731b9a8SJean-Christophe PLAGNIOL-VILLARD /* Disable USB host clock. */ 61e5e8bb05SBo Shen #ifdef CONFIG_SAMA5D3 62e5e8bb05SBo Shen writel(1 << (ATMEL_ID_UHP - 32), &pmc->pcdr1); 63e5e8bb05SBo Shen #else 64372f2783SReinhard Meyer writel(1 << ATMEL_ID_UHP, &pmc->pcdr); 65e5e8bb05SBo Shen #endif 66e5e8bb05SBo Shen 67158947d2SBo Shen #if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) 68372f2783SReinhard Meyer writel(ATMEL_PMC_UHP | AT91_PMC_HCK0, &pmc->scdr); 692731b9a8SJean-Christophe PLAGNIOL-VILLARD #else 70372f2783SReinhard Meyer writel(ATMEL_PMC_UHP, &pmc->scdr); 712731b9a8SJean-Christophe PLAGNIOL-VILLARD #endif 722731b9a8SJean-Christophe PLAGNIOL-VILLARD 73*dcd2f1a0SBo Shen #ifdef CONFIG_USB_ATMEL_CLK_SEL_PLLB 74d9bef0adSBo Shen #ifdef CONFIG_AT91SAM9N12 75d9bef0adSBo Shen writel(0, &pmc->usb); 76d9bef0adSBo Shen #endif 772731b9a8SJean-Christophe PLAGNIOL-VILLARD /* Disable PLLB */ 780701f730SMatthias Fuchs writel(0, &pmc->pllbr); 790701f730SMatthias Fuchs while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != 0) 802731b9a8SJean-Christophe PLAGNIOL-VILLARD ; 81*dcd2f1a0SBo Shen #elif defined(CONFIG_USB_ATMEL_CLK_SEL_UPLL) 8264203c7bSSergey Matyukevich /* Disable UPLL */ 8364203c7bSSergey Matyukevich writel(readl(&pmc->uckr) & (~AT91_PMC_UPLLEN), &pmc->uckr); 8464203c7bSSergey Matyukevich while ((readl(&pmc->sr) & AT91_PMC_LOCKU) == AT91_PMC_LOCKU) 8564203c7bSSergey Matyukevich ; 862731b9a8SJean-Christophe PLAGNIOL-VILLARD #endif 872731b9a8SJean-Christophe PLAGNIOL-VILLARD 882731b9a8SJean-Christophe PLAGNIOL-VILLARD return 0; 892731b9a8SJean-Christophe PLAGNIOL-VILLARD } 902731b9a8SJean-Christophe PLAGNIOL-VILLARD 912731b9a8SJean-Christophe PLAGNIOL-VILLARD int usb_cpu_init_fail(void) 922731b9a8SJean-Christophe PLAGNIOL-VILLARD { 932731b9a8SJean-Christophe PLAGNIOL-VILLARD return usb_cpu_stop(); 942731b9a8SJean-Christophe PLAGNIOL-VILLARD } 952731b9a8SJean-Christophe PLAGNIOL-VILLARD 962731b9a8SJean-Christophe PLAGNIOL-VILLARD #endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */ 97