12731b9a8SJean-Christophe PLAGNIOL-VILLARD /* 22731b9a8SJean-Christophe PLAGNIOL-VILLARD * (C) Copyright 2006 32731b9a8SJean-Christophe PLAGNIOL-VILLARD * DENX Software Engineering <mk@denx.de> 42731b9a8SJean-Christophe PLAGNIOL-VILLARD * 51a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 62731b9a8SJean-Christophe PLAGNIOL-VILLARD */ 72731b9a8SJean-Christophe PLAGNIOL-VILLARD 82731b9a8SJean-Christophe PLAGNIOL-VILLARD #include <common.h> 92731b9a8SJean-Christophe PLAGNIOL-VILLARD 102731b9a8SJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) 112731b9a8SJean-Christophe PLAGNIOL-VILLARD 1286592f60SReinhard Meyer #include <asm/io.h> 132731b9a8SJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/hardware.h> 142731b9a8SJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/at91_pmc.h> 15dc39ae95SJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/clk.h> 162731b9a8SJean-Christophe PLAGNIOL-VILLARD 172731b9a8SJean-Christophe PLAGNIOL-VILLARD int usb_cpu_init(void) 182731b9a8SJean-Christophe PLAGNIOL-VILLARD { 19372f2783SReinhard Meyer at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC; 202731b9a8SJean-Christophe PLAGNIOL-VILLARD 212731b9a8SJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ 22faa14babSRONETIX - Ilko Iliev defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \ 23*d9bef0adSBo Shen defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9N12) 242731b9a8SJean-Christophe PLAGNIOL-VILLARD /* Enable PLLB */ 250701f730SMatthias Fuchs writel(get_pllb_init(), &pmc->pllbr); 260701f730SMatthias Fuchs while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB) 272731b9a8SJean-Christophe PLAGNIOL-VILLARD ; 28*d9bef0adSBo Shen #ifdef CONFIG_AT91SAM9N12 29*d9bef0adSBo Shen writel(AT91_PMC_USBS_USB_PLLB | AT91_PMC_USB_DIV_2, &pmc->usb); 30*d9bef0adSBo Shen #endif 31bcfc8976SRichard Genoud #elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) || \ 32e5e8bb05SBo Shen defined(CONFIG_AT91SAM9X5) || defined(CONFIG_SAMA5D3) 3364203c7bSSergey Matyukevich /* Enable UPLL */ 3464203c7bSSergey Matyukevich writel(readl(&pmc->uckr) | AT91_PMC_UPLLEN | AT91_PMC_BIASEN, 3564203c7bSSergey Matyukevich &pmc->uckr); 3664203c7bSSergey Matyukevich while ((readl(&pmc->sr) & AT91_PMC_LOCKU) != AT91_PMC_LOCKU) 3764203c7bSSergey Matyukevich ; 3864203c7bSSergey Matyukevich 3964203c7bSSergey Matyukevich /* Select PLLA as input clock of OHCI */ 4064203c7bSSergey Matyukevich writel(AT91_PMC_USBS_USB_UPLL | AT91_PMC_USBDIV_10, &pmc->usb); 412731b9a8SJean-Christophe PLAGNIOL-VILLARD #endif 422731b9a8SJean-Christophe PLAGNIOL-VILLARD 432731b9a8SJean-Christophe PLAGNIOL-VILLARD /* Enable USB host clock. */ 44e5e8bb05SBo Shen #ifdef CONFIG_SAMA5D3 45e5e8bb05SBo Shen writel(1 << (ATMEL_ID_UHP - 32), &pmc->pcer1); 46e5e8bb05SBo Shen #else 47372f2783SReinhard Meyer writel(1 << ATMEL_ID_UHP, &pmc->pcer); 48e5e8bb05SBo Shen #endif 49e5e8bb05SBo Shen 50158947d2SBo Shen #if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) 51372f2783SReinhard Meyer writel(ATMEL_PMC_UHP | AT91_PMC_HCK0, &pmc->scer); 522731b9a8SJean-Christophe PLAGNIOL-VILLARD #else 53372f2783SReinhard Meyer writel(ATMEL_PMC_UHP, &pmc->scer); 542731b9a8SJean-Christophe PLAGNIOL-VILLARD #endif 552731b9a8SJean-Christophe PLAGNIOL-VILLARD 562731b9a8SJean-Christophe PLAGNIOL-VILLARD return 0; 572731b9a8SJean-Christophe PLAGNIOL-VILLARD } 582731b9a8SJean-Christophe PLAGNIOL-VILLARD 592731b9a8SJean-Christophe PLAGNIOL-VILLARD int usb_cpu_stop(void) 602731b9a8SJean-Christophe PLAGNIOL-VILLARD { 61372f2783SReinhard Meyer at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC; 620701f730SMatthias Fuchs 632731b9a8SJean-Christophe PLAGNIOL-VILLARD /* Disable USB host clock. */ 64e5e8bb05SBo Shen #ifdef CONFIG_SAMA5D3 65e5e8bb05SBo Shen writel(1 << (ATMEL_ID_UHP - 32), &pmc->pcdr1); 66e5e8bb05SBo Shen #else 67372f2783SReinhard Meyer writel(1 << ATMEL_ID_UHP, &pmc->pcdr); 68e5e8bb05SBo Shen #endif 69e5e8bb05SBo Shen 70158947d2SBo Shen #if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) 71372f2783SReinhard Meyer writel(ATMEL_PMC_UHP | AT91_PMC_HCK0, &pmc->scdr); 722731b9a8SJean-Christophe PLAGNIOL-VILLARD #else 73372f2783SReinhard Meyer writel(ATMEL_PMC_UHP, &pmc->scdr); 742731b9a8SJean-Christophe PLAGNIOL-VILLARD #endif 752731b9a8SJean-Christophe PLAGNIOL-VILLARD 762731b9a8SJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ 77*d9bef0adSBo Shen defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \ 78*d9bef0adSBo Shen defined(CONFIG_AT91SAM9N12) 79*d9bef0adSBo Shen #ifdef CONFIG_AT91SAM9N12 80*d9bef0adSBo Shen writel(0, &pmc->usb); 81*d9bef0adSBo Shen #endif 822731b9a8SJean-Christophe PLAGNIOL-VILLARD /* Disable PLLB */ 830701f730SMatthias Fuchs writel(0, &pmc->pllbr); 840701f730SMatthias Fuchs while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != 0) 852731b9a8SJean-Christophe PLAGNIOL-VILLARD ; 86bcfc8976SRichard Genoud #elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) || \ 87e5e8bb05SBo Shen defined(CONFIG_AT91SAM9X5) || defined(CONFIG_SAMA5D3) 8864203c7bSSergey Matyukevich /* Disable UPLL */ 8964203c7bSSergey Matyukevich writel(readl(&pmc->uckr) & (~AT91_PMC_UPLLEN), &pmc->uckr); 9064203c7bSSergey Matyukevich while ((readl(&pmc->sr) & AT91_PMC_LOCKU) == AT91_PMC_LOCKU) 9164203c7bSSergey Matyukevich ; 922731b9a8SJean-Christophe PLAGNIOL-VILLARD #endif 932731b9a8SJean-Christophe PLAGNIOL-VILLARD 942731b9a8SJean-Christophe PLAGNIOL-VILLARD return 0; 952731b9a8SJean-Christophe PLAGNIOL-VILLARD } 962731b9a8SJean-Christophe PLAGNIOL-VILLARD 972731b9a8SJean-Christophe PLAGNIOL-VILLARD int usb_cpu_init_fail(void) 982731b9a8SJean-Christophe PLAGNIOL-VILLARD { 992731b9a8SJean-Christophe PLAGNIOL-VILLARD return usb_cpu_stop(); 1002731b9a8SJean-Christophe PLAGNIOL-VILLARD } 1012731b9a8SJean-Christophe PLAGNIOL-VILLARD 1022731b9a8SJean-Christophe PLAGNIOL-VILLARD #endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */ 103