1*2731b9a8SJean-Christophe PLAGNIOL-VILLARD /* 2*2731b9a8SJean-Christophe PLAGNIOL-VILLARD * (C) Copyright 2006 3*2731b9a8SJean-Christophe PLAGNIOL-VILLARD * DENX Software Engineering <mk@denx.de> 4*2731b9a8SJean-Christophe PLAGNIOL-VILLARD * 5*2731b9a8SJean-Christophe PLAGNIOL-VILLARD * See file CREDITS for list of people who contributed to this 6*2731b9a8SJean-Christophe PLAGNIOL-VILLARD * project. 7*2731b9a8SJean-Christophe PLAGNIOL-VILLARD * 8*2731b9a8SJean-Christophe PLAGNIOL-VILLARD * This program is free software; you can redistribute it and/or 9*2731b9a8SJean-Christophe PLAGNIOL-VILLARD * modify it under the terms of the GNU General Public License as 10*2731b9a8SJean-Christophe PLAGNIOL-VILLARD * published by the Free Software Foundation; either version 2 of 11*2731b9a8SJean-Christophe PLAGNIOL-VILLARD * the License, or (at your option) any later version. 12*2731b9a8SJean-Christophe PLAGNIOL-VILLARD * 13*2731b9a8SJean-Christophe PLAGNIOL-VILLARD * This program is distributed in the hope that it will be useful, 14*2731b9a8SJean-Christophe PLAGNIOL-VILLARD * but WITHOUT ANY WARRANTY; without even the implied warranty of 15*2731b9a8SJean-Christophe PLAGNIOL-VILLARD * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16*2731b9a8SJean-Christophe PLAGNIOL-VILLARD * GNU General Public License for more details. 17*2731b9a8SJean-Christophe PLAGNIOL-VILLARD * 18*2731b9a8SJean-Christophe PLAGNIOL-VILLARD * You should have received a copy of the GNU General Public License 19*2731b9a8SJean-Christophe PLAGNIOL-VILLARD * along with this program; if not, write to the Free Software 20*2731b9a8SJean-Christophe PLAGNIOL-VILLARD * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21*2731b9a8SJean-Christophe PLAGNIOL-VILLARD * MA 02111-1307 USA 22*2731b9a8SJean-Christophe PLAGNIOL-VILLARD */ 23*2731b9a8SJean-Christophe PLAGNIOL-VILLARD 24*2731b9a8SJean-Christophe PLAGNIOL-VILLARD #include <common.h> 25*2731b9a8SJean-Christophe PLAGNIOL-VILLARD 26*2731b9a8SJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) 27*2731b9a8SJean-Christophe PLAGNIOL-VILLARD 28*2731b9a8SJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/hardware.h> 29*2731b9a8SJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/io.h> 30*2731b9a8SJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/at91_pmc.h> 31*2731b9a8SJean-Christophe PLAGNIOL-VILLARD 32*2731b9a8SJean-Christophe PLAGNIOL-VILLARD int usb_cpu_init(void) 33*2731b9a8SJean-Christophe PLAGNIOL-VILLARD { 34*2731b9a8SJean-Christophe PLAGNIOL-VILLARD 35*2731b9a8SJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ 36*2731b9a8SJean-Christophe PLAGNIOL-VILLARD defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) 37*2731b9a8SJean-Christophe PLAGNIOL-VILLARD /* Enable PLLB */ 38*2731b9a8SJean-Christophe PLAGNIOL-VILLARD at91_sys_write(AT91_CKGR_PLLBR, CONFIG_SYS_AT91_PLLB); 39*2731b9a8SJean-Christophe PLAGNIOL-VILLARD while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB) 40*2731b9a8SJean-Christophe PLAGNIOL-VILLARD ; 41*2731b9a8SJean-Christophe PLAGNIOL-VILLARD #endif 42*2731b9a8SJean-Christophe PLAGNIOL-VILLARD 43*2731b9a8SJean-Christophe PLAGNIOL-VILLARD /* Enable USB host clock. */ 44*2731b9a8SJean-Christophe PLAGNIOL-VILLARD at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_UHP); 45*2731b9a8SJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_AT91SAM9261 46*2731b9a8SJean-Christophe PLAGNIOL-VILLARD at91_sys_write(AT91_PMC_SCER, AT91_PMC_UHP | AT91_PMC_HCK0); 47*2731b9a8SJean-Christophe PLAGNIOL-VILLARD #else 48*2731b9a8SJean-Christophe PLAGNIOL-VILLARD at91_sys_write(AT91_PMC_SCER, AT91_PMC_UHP); 49*2731b9a8SJean-Christophe PLAGNIOL-VILLARD #endif 50*2731b9a8SJean-Christophe PLAGNIOL-VILLARD 51*2731b9a8SJean-Christophe PLAGNIOL-VILLARD return 0; 52*2731b9a8SJean-Christophe PLAGNIOL-VILLARD } 53*2731b9a8SJean-Christophe PLAGNIOL-VILLARD 54*2731b9a8SJean-Christophe PLAGNIOL-VILLARD int usb_cpu_stop(void) 55*2731b9a8SJean-Christophe PLAGNIOL-VILLARD { 56*2731b9a8SJean-Christophe PLAGNIOL-VILLARD /* Disable USB host clock. */ 57*2731b9a8SJean-Christophe PLAGNIOL-VILLARD at91_sys_write(AT91_PMC_PCDR, 1 << AT91_ID_UHP); 58*2731b9a8SJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_AT91SAM9261 59*2731b9a8SJean-Christophe PLAGNIOL-VILLARD at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP | AT91_PMC_HCK0); 60*2731b9a8SJean-Christophe PLAGNIOL-VILLARD #else 61*2731b9a8SJean-Christophe PLAGNIOL-VILLARD at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP); 62*2731b9a8SJean-Christophe PLAGNIOL-VILLARD #endif 63*2731b9a8SJean-Christophe PLAGNIOL-VILLARD 64*2731b9a8SJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ 65*2731b9a8SJean-Christophe PLAGNIOL-VILLARD defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) 66*2731b9a8SJean-Christophe PLAGNIOL-VILLARD /* Disable PLLB */ 67*2731b9a8SJean-Christophe PLAGNIOL-VILLARD at91_sys_write(AT91_CKGR_PLLBR, 0); 68*2731b9a8SJean-Christophe PLAGNIOL-VILLARD while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != 0) 69*2731b9a8SJean-Christophe PLAGNIOL-VILLARD ; 70*2731b9a8SJean-Christophe PLAGNIOL-VILLARD #endif 71*2731b9a8SJean-Christophe PLAGNIOL-VILLARD 72*2731b9a8SJean-Christophe PLAGNIOL-VILLARD return 0; 73*2731b9a8SJean-Christophe PLAGNIOL-VILLARD } 74*2731b9a8SJean-Christophe PLAGNIOL-VILLARD 75*2731b9a8SJean-Christophe PLAGNIOL-VILLARD int usb_cpu_init_fail(void) 76*2731b9a8SJean-Christophe PLAGNIOL-VILLARD { 77*2731b9a8SJean-Christophe PLAGNIOL-VILLARD return usb_cpu_stop(); 78*2731b9a8SJean-Christophe PLAGNIOL-VILLARD } 79*2731b9a8SJean-Christophe PLAGNIOL-VILLARD 80*2731b9a8SJean-Christophe PLAGNIOL-VILLARD #endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */ 81