12731b9a8SJean-Christophe PLAGNIOL-VILLARD /* 22731b9a8SJean-Christophe PLAGNIOL-VILLARD * (C) Copyright 2006 32731b9a8SJean-Christophe PLAGNIOL-VILLARD * DENX Software Engineering <mk@denx.de> 42731b9a8SJean-Christophe PLAGNIOL-VILLARD * 52731b9a8SJean-Christophe PLAGNIOL-VILLARD * See file CREDITS for list of people who contributed to this 62731b9a8SJean-Christophe PLAGNIOL-VILLARD * project. 72731b9a8SJean-Christophe PLAGNIOL-VILLARD * 82731b9a8SJean-Christophe PLAGNIOL-VILLARD * This program is free software; you can redistribute it and/or 92731b9a8SJean-Christophe PLAGNIOL-VILLARD * modify it under the terms of the GNU General Public License as 102731b9a8SJean-Christophe PLAGNIOL-VILLARD * published by the Free Software Foundation; either version 2 of 112731b9a8SJean-Christophe PLAGNIOL-VILLARD * the License, or (at your option) any later version. 122731b9a8SJean-Christophe PLAGNIOL-VILLARD * 132731b9a8SJean-Christophe PLAGNIOL-VILLARD * This program is distributed in the hope that it will be useful, 142731b9a8SJean-Christophe PLAGNIOL-VILLARD * but WITHOUT ANY WARRANTY; without even the implied warranty of 152731b9a8SJean-Christophe PLAGNIOL-VILLARD * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 162731b9a8SJean-Christophe PLAGNIOL-VILLARD * GNU General Public License for more details. 172731b9a8SJean-Christophe PLAGNIOL-VILLARD * 182731b9a8SJean-Christophe PLAGNIOL-VILLARD * You should have received a copy of the GNU General Public License 192731b9a8SJean-Christophe PLAGNIOL-VILLARD * along with this program; if not, write to the Free Software 202731b9a8SJean-Christophe PLAGNIOL-VILLARD * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 212731b9a8SJean-Christophe PLAGNIOL-VILLARD * MA 02111-1307 USA 222731b9a8SJean-Christophe PLAGNIOL-VILLARD */ 232731b9a8SJean-Christophe PLAGNIOL-VILLARD 242731b9a8SJean-Christophe PLAGNIOL-VILLARD #include <common.h> 252731b9a8SJean-Christophe PLAGNIOL-VILLARD 262731b9a8SJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) 272731b9a8SJean-Christophe PLAGNIOL-VILLARD 282731b9a8SJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/hardware.h> 292731b9a8SJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/io.h> 302731b9a8SJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/at91_pmc.h> 31dc39ae95SJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/clk.h> 322731b9a8SJean-Christophe PLAGNIOL-VILLARD 332731b9a8SJean-Christophe PLAGNIOL-VILLARD int usb_cpu_init(void) 342731b9a8SJean-Christophe PLAGNIOL-VILLARD { 35*0701f730SMatthias Fuchs at91_pmc_t *pmc = (at91_pmc_t *)AT91_PMC_BASE; 362731b9a8SJean-Christophe PLAGNIOL-VILLARD 372731b9a8SJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ 38faa14babSRONETIX - Ilko Iliev defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \ 39faa14babSRONETIX - Ilko Iliev defined(CONFIG_AT91SAM9261) 402731b9a8SJean-Christophe PLAGNIOL-VILLARD /* Enable PLLB */ 41*0701f730SMatthias Fuchs writel(get_pllb_init(), &pmc->pllbr); 42*0701f730SMatthias Fuchs while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB) 432731b9a8SJean-Christophe PLAGNIOL-VILLARD ; 442731b9a8SJean-Christophe PLAGNIOL-VILLARD #endif 452731b9a8SJean-Christophe PLAGNIOL-VILLARD 462731b9a8SJean-Christophe PLAGNIOL-VILLARD /* Enable USB host clock. */ 47*0701f730SMatthias Fuchs writel(1 << AT91_ID_UHP, &pmc->pcer); 482731b9a8SJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_AT91SAM9261 49*0701f730SMatthias Fuchs writel(AT91_PMC_UHP | AT91_PMC_HCK0, &pmc->scer); 502731b9a8SJean-Christophe PLAGNIOL-VILLARD #else 51*0701f730SMatthias Fuchs writel(AT91_PMC_UHP, &pmc->scer); 522731b9a8SJean-Christophe PLAGNIOL-VILLARD #endif 532731b9a8SJean-Christophe PLAGNIOL-VILLARD 542731b9a8SJean-Christophe PLAGNIOL-VILLARD return 0; 552731b9a8SJean-Christophe PLAGNIOL-VILLARD } 562731b9a8SJean-Christophe PLAGNIOL-VILLARD 572731b9a8SJean-Christophe PLAGNIOL-VILLARD int usb_cpu_stop(void) 582731b9a8SJean-Christophe PLAGNIOL-VILLARD { 59*0701f730SMatthias Fuchs at91_pmc_t *pmc = (at91_pmc_t *)AT91_PMC_BASE; 60*0701f730SMatthias Fuchs 612731b9a8SJean-Christophe PLAGNIOL-VILLARD /* Disable USB host clock. */ 62*0701f730SMatthias Fuchs writel(1 << AT91_ID_UHP, &pmc->pcdr); 632731b9a8SJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_AT91SAM9261 64*0701f730SMatthias Fuchs writel(AT91_PMC_UHP | AT91_PMC_HCK0, &pmc->scdr); 652731b9a8SJean-Christophe PLAGNIOL-VILLARD #else 66*0701f730SMatthias Fuchs writel(AT91_PMC_UHP, &pmc->scdr); 672731b9a8SJean-Christophe PLAGNIOL-VILLARD #endif 682731b9a8SJean-Christophe PLAGNIOL-VILLARD 692731b9a8SJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ 702731b9a8SJean-Christophe PLAGNIOL-VILLARD defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) 712731b9a8SJean-Christophe PLAGNIOL-VILLARD /* Disable PLLB */ 72*0701f730SMatthias Fuchs writel(0, &pmc->pllbr); 73*0701f730SMatthias Fuchs while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != 0) 742731b9a8SJean-Christophe PLAGNIOL-VILLARD ; 752731b9a8SJean-Christophe PLAGNIOL-VILLARD #endif 762731b9a8SJean-Christophe PLAGNIOL-VILLARD 772731b9a8SJean-Christophe PLAGNIOL-VILLARD return 0; 782731b9a8SJean-Christophe PLAGNIOL-VILLARD } 792731b9a8SJean-Christophe PLAGNIOL-VILLARD 802731b9a8SJean-Christophe PLAGNIOL-VILLARD int usb_cpu_init_fail(void) 812731b9a8SJean-Christophe PLAGNIOL-VILLARD { 822731b9a8SJean-Christophe PLAGNIOL-VILLARD return usb_cpu_stop(); 832731b9a8SJean-Christophe PLAGNIOL-VILLARD } 842731b9a8SJean-Christophe PLAGNIOL-VILLARD 852731b9a8SJean-Christophe PLAGNIOL-VILLARD #endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */ 86