xref: /openbmc/u-boot/drivers/usb/host/ehci-spear.c (revision bf494d7e)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2010
4  * Armando Visconti, ST Micoelectronics, <armando.visconti@st.com>.
5  *
6  * (C) Copyright 2009
7  * Marvell Semiconductor <www.marvell.com>
8  * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
9  */
10 
11 #include <common.h>
12 #include <asm/io.h>
13 #include <usb.h>
14 #include "ehci.h"
15 #include <asm/arch/hardware.h>
16 #include <asm/arch/spr_misc.h>
17 
18 static void spear6xx_usbh_stop(void)
19 {
20 	struct misc_regs *const misc_p =
21 	    (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
22 	u32 periph1_rst = readl(misc_p->periph1_rst);
23 
24 	periph1_rst |= PERIPH_USBH1 | PERIPH_USBH2;
25 	writel(periph1_rst, misc_p->periph1_rst);
26 
27 	udelay(1000);
28 	periph1_rst &= ~(PERIPH_USBH1 | PERIPH_USBH2);
29 	writel(periph1_rst, misc_p->periph1_rst);
30 }
31 
32 /*
33  * Create the appropriate control structures to manage
34  * a new EHCI host controller.
35  */
36 int ehci_hcd_init(int index, enum usb_init_type init,
37 		struct ehci_hccr **hccr, struct ehci_hcor **hcor)
38 {
39 	u32 ehci = 0;
40 
41 	switch (index) {
42 	case 0:
43 		ehci = CONFIG_SYS_UHC0_EHCI_BASE;
44 		break;
45 	case 1:
46 		ehci = CONFIG_SYS_UHC1_EHCI_BASE;
47 		break;
48 	default:
49 		printf("ERROR: wrong controller index!\n");
50 		break;
51 	};
52 
53 	*hccr = (struct ehci_hccr *)(ehci + 0x100);
54 	*hcor = (struct ehci_hcor *)((uint32_t) *hccr +
55 			HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
56 
57 	debug("SPEAr-ehci: init hccr %x and hcor %x hc_length %d\n",
58 		(uint32_t)*hccr, (uint32_t)*hcor,
59 		(uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
60 
61 	return 0;
62 }
63 
64 /*
65  * Destroy the appropriate control structures corresponding
66  * the the EHCI host controller.
67  */
68 int ehci_hcd_stop(int index)
69 {
70 #if defined(CONFIG_SPEAR600)
71 	spear6xx_usbh_stop();
72 #endif
73 
74 	return 0;
75 }
76