xref: /openbmc/u-boot/drivers/usb/host/ehci-spear.c (revision baefb63a)
1 /*
2  * (C) Copyright 2010
3  * Armando Visconti, ST Micoelectronics, <armando.visconti@st.com>.
4  *
5  * (C) Copyright 2009
6  * Marvell Semiconductor <www.marvell.com>
7  * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
8  *
9  * SPDX-License-Identifier:	GPL-2.0+
10  */
11 
12 #include <common.h>
13 #include <asm/io.h>
14 #include <usb.h>
15 #include "ehci.h"
16 #include <asm/arch/hardware.h>
17 #include <asm/arch/spr_misc.h>
18 
19 static void spear6xx_usbh_stop(void)
20 {
21 	struct misc_regs *const misc_p =
22 	    (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
23 	u32 periph1_rst = readl(misc_p->periph1_rst);
24 
25 	periph1_rst |= PERIPH_USBH1 | PERIPH_USBH2;
26 	writel(periph1_rst, misc_p->periph1_rst);
27 
28 	udelay(1000);
29 	periph1_rst &= ~(PERIPH_USBH1 | PERIPH_USBH2);
30 	writel(periph1_rst, misc_p->periph1_rst);
31 }
32 
33 /*
34  * Create the appropriate control structures to manage
35  * a new EHCI host controller.
36  */
37 int ehci_hcd_init(int index, enum usb_init_type init,
38 		struct ehci_hccr **hccr, struct ehci_hcor **hcor)
39 {
40 	u32 ehci = 0;
41 
42 	switch (index) {
43 	case 0:
44 		ehci = CONFIG_SYS_UHC0_EHCI_BASE;
45 		break;
46 	case 1:
47 		ehci = CONFIG_SYS_UHC1_EHCI_BASE;
48 		break;
49 	default:
50 		printf("ERROR: wrong controller index!\n");
51 		break;
52 	};
53 
54 	*hccr = (struct ehci_hccr *)(ehci + 0x100);
55 	*hcor = (struct ehci_hcor *)((uint32_t) *hccr +
56 			HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
57 
58 	debug("SPEAr-ehci: init hccr %x and hcor %x hc_length %d\n",
59 		(uint32_t)*hccr, (uint32_t)*hcor,
60 		(uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
61 
62 	return 0;
63 }
64 
65 /*
66  * Destroy the appropriate control structures corresponding
67  * the the EHCI host controller.
68  */
69 int ehci_hcd_stop(int index)
70 {
71 #if defined(CONFIG_SPEAR600)
72 	spear6xx_usbh_stop();
73 #endif
74 
75 	return 0;
76 }
77