xref: /openbmc/u-boot/drivers/usb/host/ehci-mxc.c (revision 5187d8dd)
1 /*
2  * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms of the GNU General Public License as published by the
6  * Free Software Foundation; either version 2 of the License, or (at your
7  * option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful, but
10  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12  * for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software Foundation,
16  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17  */
18 
19 
20 #include <common.h>
21 #include <usb.h>
22 #include <asm/io.h>
23 #include <asm/arch/imx-regs.h>
24 #include <usb/ehci-fsl.h>
25 #include <errno.h>
26 
27 #include "ehci.h"
28 #include "ehci-core.h"
29 
30 #define USBCTRL_OTGBASE_OFFSET	0x600
31 
32 #ifdef CONFIG_MX25
33 #define MX25_USB_CTRL_IP_PUE_DOWN_BIT	(1<<6)
34 #define MX25_USB_CTRL_HSTD_BIT		(1<<5)
35 #define MX25_USB_CTRL_USBTE_BIT		(1<<4)
36 #define MX25_USB_CTRL_OCPOL_OTG_BIT	(1<<3)
37 #endif
38 
39 #ifdef CONFIG_MX31
40 #define MX31_OTG_SIC_SHIFT	29
41 #define MX31_OTG_SIC_MASK	(0x3 << MX31_OTG_SIC_SHIFT)
42 #define MX31_OTG_PM_BIT		(1 << 24)
43 
44 #define MX31_H2_SIC_SHIFT	21
45 #define MX31_H2_SIC_MASK	(0x3 << MX31_H2_SIC_SHIFT)
46 #define MX31_H2_PM_BIT		(1 << 16)
47 #define MX31_H2_DT_BIT		(1 << 5)
48 
49 #define MX31_H1_SIC_SHIFT	13
50 #define MX31_H1_SIC_MASK	(0x3 << MX31_H1_SIC_SHIFT)
51 #define MX31_H1_PM_BIT		(1 << 8)
52 #define MX31_H1_DT_BIT		(1 << 4)
53 #endif
54 
55 static int mxc_set_usbcontrol(int port, unsigned int flags)
56 {
57 	unsigned int v;
58 
59 #ifdef CONFIG_MX25
60 	v = MX25_USB_CTRL_IP_PUE_DOWN_BIT | MX25_USB_CTRL_HSTD_BIT |
61 		MX25_USB_CTRL_USBTE_BIT | MX25_USB_CTRL_OCPOL_OTG_BIT;
62 #endif
63 
64 #ifdef CONFIG_MX31
65 		v = readl(IMX_USB_BASE + USBCTRL_OTGBASE_OFFSET);
66 
67 		switch (port) {
68 		case 0:	/* OTG port */
69 			v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
70 			v |= (flags & MXC_EHCI_INTERFACE_MASK)
71 					<< MX31_OTG_SIC_SHIFT;
72 			if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
73 				v |= MX31_OTG_PM_BIT;
74 
75 			break;
76 		case 1: /* H1 port */
77 			v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT |
78 				MX31_H1_DT_BIT);
79 			v |= (flags & MXC_EHCI_INTERFACE_MASK)
80 						<< MX31_H1_SIC_SHIFT;
81 			if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
82 				v |= MX31_H1_PM_BIT;
83 
84 			if (!(flags & MXC_EHCI_TTL_ENABLED))
85 				v |= MX31_H1_DT_BIT;
86 
87 			break;
88 		case 2:	/* H2 port */
89 			v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT |
90 				MX31_H2_DT_BIT);
91 			v |= (flags & MXC_EHCI_INTERFACE_MASK)
92 						<< MX31_H2_SIC_SHIFT;
93 			if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
94 				v |= MX31_H2_PM_BIT;
95 
96 			if (!(flags & MXC_EHCI_TTL_ENABLED))
97 				v |= MX31_H2_DT_BIT;
98 
99 			break;
100 		default:
101 			return -EINVAL;
102 		}
103 #endif
104 
105 	writel(v, IMX_USB_BASE + USBCTRL_OTGBASE_OFFSET);
106 	return 0;
107 }
108 
109 int ehci_hcd_init(void)
110 {
111 	struct usb_ehci *ehci;
112 #ifdef CONFIG_MX31
113 	u32 tmp;
114 	struct clock_control_regs *sc_regs =
115 		(struct clock_control_regs *)CCM_BASE;
116 
117 	tmp = __raw_readl(&sc_regs->ccmr);
118 	__raw_writel(__raw_readl(&sc_regs->ccmr) | (1 << 9), &sc_regs->ccmr) ;
119 #endif
120 
121 	udelay(80);
122 
123 	/* Take USB2 */
124 	ehci = (struct usb_ehci *)(IMX_USB_BASE +
125 		(0x200 * CONFIG_MXC_USB_PORT));
126 	hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
127 	hcor = (struct ehci_hcor *)((uint32_t) hccr +
128 			HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
129 	setbits_le32(&ehci->usbmode, CM_HOST);
130 #ifdef CONFIG_MX31
131 	setbits_le32(&ehci->control, USB_EN);
132 
133 	__raw_writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc);
134 #endif
135 	mxc_set_usbcontrol(CONFIG_MXC_USB_PORT, CONFIG_MXC_USB_FLAGS);
136 
137 	udelay(10000);
138 
139 	return 0;
140 }
141 
142 /*
143  * Destroy the appropriate control structures corresponding
144  * the the EHCI host controller.
145  */
146 int ehci_hcd_stop(void)
147 {
148 	return 0;
149 }
150