1 /*- 2 * Copyright (c) 2007-2008, Juniper Networks, Inc. 3 * Copyright (c) 2008, Excito Elektronik i Skåne AB 4 * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it> 5 * 6 * All rights reserved. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation version 2 of 11 * the License. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 #include <common.h> 24 #include <asm/byteorder.h> 25 #include <usb.h> 26 #include <asm/io.h> 27 #include <malloc.h> 28 29 #include "ehci.h" 30 31 int rootdev; 32 struct ehci_hccr *hccr; /* R/O registers, not need for volatile */ 33 volatile struct ehci_hcor *hcor; 34 35 static uint16_t portreset; 36 static struct QH qh_list __attribute__((aligned(32))); 37 38 static struct descriptor { 39 struct usb_hub_descriptor hub; 40 struct usb_device_descriptor device; 41 struct usb_linux_config_descriptor config; 42 struct usb_linux_interface_descriptor interface; 43 struct usb_endpoint_descriptor endpoint; 44 } __attribute__ ((packed)) descriptor = { 45 { 46 0x8, /* bDescLength */ 47 0x29, /* bDescriptorType: hub descriptor */ 48 2, /* bNrPorts -- runtime modified */ 49 0, /* wHubCharacteristics */ 50 0xff, /* bPwrOn2PwrGood */ 51 0, /* bHubCntrCurrent */ 52 {}, /* Device removable */ 53 {} /* at most 7 ports! XXX */ 54 }, 55 { 56 0x12, /* bLength */ 57 1, /* bDescriptorType: UDESC_DEVICE */ 58 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */ 59 9, /* bDeviceClass: UDCLASS_HUB */ 60 0, /* bDeviceSubClass: UDSUBCLASS_HUB */ 61 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */ 62 64, /* bMaxPacketSize: 64 bytes */ 63 0x0000, /* idVendor */ 64 0x0000, /* idProduct */ 65 cpu_to_le16(0x0100), /* bcdDevice */ 66 1, /* iManufacturer */ 67 2, /* iProduct */ 68 0, /* iSerialNumber */ 69 1 /* bNumConfigurations: 1 */ 70 }, 71 { 72 0x9, 73 2, /* bDescriptorType: UDESC_CONFIG */ 74 cpu_to_le16(0x19), 75 1, /* bNumInterface */ 76 1, /* bConfigurationValue */ 77 0, /* iConfiguration */ 78 0x40, /* bmAttributes: UC_SELF_POWER */ 79 0 /* bMaxPower */ 80 }, 81 { 82 0x9, /* bLength */ 83 4, /* bDescriptorType: UDESC_INTERFACE */ 84 0, /* bInterfaceNumber */ 85 0, /* bAlternateSetting */ 86 1, /* bNumEndpoints */ 87 9, /* bInterfaceClass: UICLASS_HUB */ 88 0, /* bInterfaceSubClass: UISUBCLASS_HUB */ 89 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */ 90 0 /* iInterface */ 91 }, 92 { 93 0x7, /* bLength */ 94 5, /* bDescriptorType: UDESC_ENDPOINT */ 95 0x81, /* bEndpointAddress: 96 * UE_DIR_IN | EHCI_INTR_ENDPT 97 */ 98 3, /* bmAttributes: UE_INTERRUPT */ 99 8, /* wMaxPacketSize */ 100 255 /* bInterval */ 101 }, 102 }; 103 104 #if defined(CONFIG_EHCI_IS_TDI) 105 #define ehci_is_TDI() (1) 106 #else 107 #define ehci_is_TDI() (0) 108 #endif 109 110 #if defined(CONFIG_EHCI_DCACHE) 111 /* 112 * Routines to handle (flush/invalidate) the dcache for the QH and qTD 113 * structures and data buffers. This is needed on platforms using this 114 * EHCI support with dcache enabled. 115 */ 116 static void flush_invalidate(u32 addr, int size, int flush) 117 { 118 if (flush) 119 flush_dcache_range(addr, addr + size); 120 else 121 invalidate_dcache_range(addr, addr + size); 122 } 123 124 static void cache_qtd(struct qTD *qtd, int flush) 125 { 126 u32 *ptr = (u32 *)qtd->qt_buffer[0]; 127 int len = (qtd->qt_token & 0x7fff0000) >> 16; 128 129 flush_invalidate((u32)qtd, sizeof(struct qTD), flush); 130 if (ptr && len) 131 flush_invalidate((u32)ptr, len, flush); 132 } 133 134 135 static inline struct QH *qh_addr(struct QH *qh) 136 { 137 return (struct QH *)((u32)qh & 0xffffffe0); 138 } 139 140 static void cache_qh(struct QH *qh, int flush) 141 { 142 struct qTD *qtd; 143 struct qTD *next; 144 static struct qTD *first_qtd; 145 146 /* 147 * Walk the QH list and flush/invalidate all entries 148 */ 149 while (1) { 150 flush_invalidate((u32)qh_addr(qh), sizeof(struct QH), flush); 151 if ((u32)qh & QH_LINK_TYPE_QH) 152 break; 153 qh = qh_addr(qh); 154 qh = (struct QH *)qh->qh_link; 155 } 156 qh = qh_addr(qh); 157 158 /* 159 * Save first qTD pointer, needed for invalidating pass on this QH 160 */ 161 if (flush) 162 first_qtd = qtd = (struct qTD *)(*(u32 *)&qh->qh_overlay & 163 0xffffffe0); 164 else 165 qtd = first_qtd; 166 167 /* 168 * Walk the qTD list and flush/invalidate all entries 169 */ 170 while (1) { 171 if (qtd == NULL) 172 break; 173 cache_qtd(qtd, flush); 174 next = (struct qTD *)((u32)qtd->qt_next & 0xffffffe0); 175 if (next == qtd) 176 break; 177 qtd = next; 178 } 179 } 180 181 static inline void ehci_flush_dcache(struct QH *qh) 182 { 183 cache_qh(qh, 1); 184 } 185 186 static inline void ehci_invalidate_dcache(struct QH *qh) 187 { 188 cache_qh(qh, 0); 189 } 190 #else /* CONFIG_EHCI_DCACHE */ 191 /* 192 * 193 */ 194 static inline void ehci_flush_dcache(struct QH *qh) 195 { 196 } 197 198 static inline void ehci_invalidate_dcache(struct QH *qh) 199 { 200 } 201 #endif /* CONFIG_EHCI_DCACHE */ 202 203 static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec) 204 { 205 uint32_t result; 206 do { 207 result = ehci_readl(ptr); 208 if (result == ~(uint32_t)0) 209 return -1; 210 result &= mask; 211 if (result == done) 212 return 0; 213 udelay(1); 214 usec--; 215 } while (usec > 0); 216 return -1; 217 } 218 219 static void ehci_free(void *p, size_t sz) 220 { 221 222 } 223 224 static int ehci_reset(void) 225 { 226 uint32_t cmd; 227 uint32_t tmp; 228 uint32_t *reg_ptr; 229 int ret = 0; 230 231 cmd = ehci_readl(&hcor->or_usbcmd); 232 cmd |= CMD_RESET; 233 ehci_writel(&hcor->or_usbcmd, cmd); 234 ret = handshake((uint32_t *)&hcor->or_usbcmd, CMD_RESET, 0, 250 * 1000); 235 if (ret < 0) { 236 printf("EHCI fail to reset\n"); 237 goto out; 238 } 239 240 if (ehci_is_TDI()) { 241 reg_ptr = (uint32_t *)((u8 *)hcor + USBMODE); 242 tmp = ehci_readl(reg_ptr); 243 tmp |= USBMODE_CM_HC; 244 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN) 245 tmp |= USBMODE_BE; 246 #endif 247 ehci_writel(reg_ptr, tmp); 248 } 249 out: 250 return ret; 251 } 252 253 static void *ehci_alloc(size_t sz, size_t align) 254 { 255 static struct QH qh __attribute__((aligned(32))); 256 static struct qTD td[3] __attribute__((aligned (32))); 257 static int ntds; 258 void *p; 259 260 switch (sz) { 261 case sizeof(struct QH): 262 p = &qh; 263 ntds = 0; 264 break; 265 case sizeof(struct qTD): 266 if (ntds == 3) { 267 debug("out of TDs\n"); 268 return NULL; 269 } 270 p = &td[ntds]; 271 ntds++; 272 break; 273 default: 274 debug("unknown allocation size\n"); 275 return NULL; 276 } 277 278 memset(p, sz, 0); 279 return p; 280 } 281 282 static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz) 283 { 284 uint32_t addr, delta, next; 285 int idx; 286 287 addr = (uint32_t) buf; 288 idx = 0; 289 while (idx < 5) { 290 td->qt_buffer[idx] = cpu_to_hc32(addr); 291 next = (addr + 4096) & ~4095; 292 delta = next - addr; 293 if (delta >= sz) 294 break; 295 sz -= delta; 296 addr = next; 297 idx++; 298 } 299 300 if (idx == 5) { 301 debug("out of buffer pointers (%u bytes left)\n", sz); 302 return -1; 303 } 304 305 return 0; 306 } 307 308 static int 309 ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer, 310 int length, struct devrequest *req) 311 { 312 struct QH *qh; 313 struct qTD *td; 314 volatile struct qTD *vtd; 315 unsigned long ts; 316 uint32_t *tdp; 317 uint32_t endpt, token, usbsts; 318 uint32_t c, toggle; 319 uint32_t cmd; 320 int ret = 0; 321 322 debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe, 323 buffer, length, req); 324 if (req != NULL) 325 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n", 326 req->request, req->request, 327 req->requesttype, req->requesttype, 328 le16_to_cpu(req->value), le16_to_cpu(req->value), 329 le16_to_cpu(req->index)); 330 331 qh = ehci_alloc(sizeof(struct QH), 32); 332 if (qh == NULL) { 333 debug("unable to allocate QH\n"); 334 return -1; 335 } 336 qh->qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH); 337 c = (usb_pipespeed(pipe) != USB_SPEED_HIGH && 338 usb_pipeendpoint(pipe) == 0) ? 1 : 0; 339 endpt = (8 << 28) | 340 (c << 27) | 341 (usb_maxpacket(dev, pipe) << 16) | 342 (0 << 15) | 343 (1 << 14) | 344 (usb_pipespeed(pipe) << 12) | 345 (usb_pipeendpoint(pipe) << 8) | 346 (0 << 7) | (usb_pipedevice(pipe) << 0); 347 qh->qh_endpt1 = cpu_to_hc32(endpt); 348 endpt = (1 << 30) | 349 (dev->portnr << 23) | 350 (dev->parent->devnum << 16) | (0 << 8) | (0 << 0); 351 qh->qh_endpt2 = cpu_to_hc32(endpt); 352 qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 353 qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); 354 355 td = NULL; 356 tdp = &qh->qh_overlay.qt_next; 357 358 toggle = 359 usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe)); 360 361 if (req != NULL) { 362 td = ehci_alloc(sizeof(struct qTD), 32); 363 if (td == NULL) { 364 debug("unable to allocate SETUP td\n"); 365 goto fail; 366 } 367 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 368 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); 369 token = (0 << 31) | 370 (sizeof(*req) << 16) | 371 (0 << 15) | (0 << 12) | (3 << 10) | (2 << 8) | (0x80 << 0); 372 td->qt_token = cpu_to_hc32(token); 373 if (ehci_td_buffer(td, req, sizeof(*req)) != 0) { 374 debug("unable construct SETUP td\n"); 375 ehci_free(td, sizeof(*td)); 376 goto fail; 377 } 378 *tdp = cpu_to_hc32((uint32_t) td); 379 tdp = &td->qt_next; 380 toggle = 1; 381 } 382 383 if (length > 0 || req == NULL) { 384 td = ehci_alloc(sizeof(struct qTD), 32); 385 if (td == NULL) { 386 debug("unable to allocate DATA td\n"); 387 goto fail; 388 } 389 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 390 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); 391 token = (toggle << 31) | 392 (length << 16) | 393 ((req == NULL ? 1 : 0) << 15) | 394 (0 << 12) | 395 (3 << 10) | 396 ((usb_pipein(pipe) ? 1 : 0) << 8) | (0x80 << 0); 397 td->qt_token = cpu_to_hc32(token); 398 if (ehci_td_buffer(td, buffer, length) != 0) { 399 debug("unable construct DATA td\n"); 400 ehci_free(td, sizeof(*td)); 401 goto fail; 402 } 403 *tdp = cpu_to_hc32((uint32_t) td); 404 tdp = &td->qt_next; 405 } 406 407 if (req != NULL) { 408 td = ehci_alloc(sizeof(struct qTD), 32); 409 if (td == NULL) { 410 debug("unable to allocate ACK td\n"); 411 goto fail; 412 } 413 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 414 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); 415 token = (toggle << 31) | 416 (0 << 16) | 417 (1 << 15) | 418 (0 << 12) | 419 (3 << 10) | 420 ((usb_pipein(pipe) ? 0 : 1) << 8) | (0x80 << 0); 421 td->qt_token = cpu_to_hc32(token); 422 *tdp = cpu_to_hc32((uint32_t) td); 423 tdp = &td->qt_next; 424 } 425 426 qh_list.qh_link = cpu_to_hc32((uint32_t) qh | QH_LINK_TYPE_QH); 427 428 /* Flush dcache */ 429 ehci_flush_dcache(&qh_list); 430 431 usbsts = ehci_readl(&hcor->or_usbsts); 432 ehci_writel(&hcor->or_usbsts, (usbsts & 0x3f)); 433 434 /* Enable async. schedule. */ 435 cmd = ehci_readl(&hcor->or_usbcmd); 436 cmd |= CMD_ASE; 437 ehci_writel(&hcor->or_usbcmd, cmd); 438 439 ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, STD_ASS, 440 100 * 1000); 441 if (ret < 0) { 442 printf("EHCI fail timeout STD_ASS set\n"); 443 goto fail; 444 } 445 446 /* Wait for TDs to be processed. */ 447 ts = get_timer(0); 448 vtd = td; 449 do { 450 /* Invalidate dcache */ 451 ehci_invalidate_dcache(&qh_list); 452 token = hc32_to_cpu(vtd->qt_token); 453 if (!(token & 0x80)) 454 break; 455 } while (get_timer(ts) < CONFIG_SYS_HZ); 456 457 /* Disable async schedule. */ 458 cmd = ehci_readl(&hcor->or_usbcmd); 459 cmd &= ~CMD_ASE; 460 ehci_writel(&hcor->or_usbcmd, cmd); 461 462 ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, 0, 463 100 * 1000); 464 if (ret < 0) { 465 printf("EHCI fail timeout STD_ASS reset\n"); 466 goto fail; 467 } 468 469 qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH); 470 471 token = hc32_to_cpu(qh->qh_overlay.qt_token); 472 if (!(token & 0x80)) { 473 debug("TOKEN=%#x\n", token); 474 switch (token & 0xfc) { 475 case 0: 476 toggle = token >> 31; 477 usb_settoggle(dev, usb_pipeendpoint(pipe), 478 usb_pipeout(pipe), toggle); 479 dev->status = 0; 480 break; 481 case 0x40: 482 dev->status = USB_ST_STALLED; 483 break; 484 case 0xa0: 485 case 0x20: 486 dev->status = USB_ST_BUF_ERR; 487 break; 488 case 0x50: 489 case 0x10: 490 dev->status = USB_ST_BABBLE_DET; 491 break; 492 default: 493 dev->status = USB_ST_CRC_ERR; 494 break; 495 } 496 dev->act_len = length - ((token >> 16) & 0x7fff); 497 } else { 498 dev->act_len = 0; 499 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n", 500 dev->devnum, ehci_readl(&hcor->or_usbsts), 501 ehci_readl(&hcor->or_portsc[0]), 502 ehci_readl(&hcor->or_portsc[1])); 503 } 504 505 return (dev->status != USB_ST_NOT_PROC) ? 0 : -1; 506 507 fail: 508 td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next); 509 while (td != (void *)QT_NEXT_TERMINATE) { 510 qh->qh_overlay.qt_next = td->qt_next; 511 ehci_free(td, sizeof(*td)); 512 td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next); 513 } 514 ehci_free(qh, sizeof(*qh)); 515 return -1; 516 } 517 518 static inline int min3(int a, int b, int c) 519 { 520 521 if (b < a) 522 a = b; 523 if (c < a) 524 a = c; 525 return a; 526 } 527 528 int 529 ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer, 530 int length, struct devrequest *req) 531 { 532 uint8_t tmpbuf[4]; 533 u16 typeReq; 534 void *srcptr = NULL; 535 int len, srclen; 536 uint32_t reg; 537 uint32_t *status_reg; 538 539 if (le16_to_cpu(req->index) > CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) { 540 printf("The request port(%d) is not configured\n", 541 le16_to_cpu(req->index) - 1); 542 return -1; 543 } 544 status_reg = (uint32_t *)&hcor->or_portsc[ 545 le16_to_cpu(req->index) - 1]; 546 srclen = 0; 547 548 debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n", 549 req->request, req->request, 550 req->requesttype, req->requesttype, 551 le16_to_cpu(req->value), le16_to_cpu(req->index)); 552 553 typeReq = req->request | req->requesttype << 8; 554 555 switch (typeReq) { 556 case DeviceRequest | USB_REQ_GET_DESCRIPTOR: 557 switch (le16_to_cpu(req->value) >> 8) { 558 case USB_DT_DEVICE: 559 debug("USB_DT_DEVICE request\n"); 560 srcptr = &descriptor.device; 561 srclen = 0x12; 562 break; 563 case USB_DT_CONFIG: 564 debug("USB_DT_CONFIG config\n"); 565 srcptr = &descriptor.config; 566 srclen = 0x19; 567 break; 568 case USB_DT_STRING: 569 debug("USB_DT_STRING config\n"); 570 switch (le16_to_cpu(req->value) & 0xff) { 571 case 0: /* Language */ 572 srcptr = "\4\3\1\0"; 573 srclen = 4; 574 break; 575 case 1: /* Vendor */ 576 srcptr = "\16\3u\0-\0b\0o\0o\0t\0"; 577 srclen = 14; 578 break; 579 case 2: /* Product */ 580 srcptr = "\52\3E\0H\0C\0I\0 " 581 "\0H\0o\0s\0t\0 " 582 "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0"; 583 srclen = 42; 584 break; 585 default: 586 debug("unknown value DT_STRING %x\n", 587 le16_to_cpu(req->value)); 588 goto unknown; 589 } 590 break; 591 default: 592 debug("unknown value %x\n", le16_to_cpu(req->value)); 593 goto unknown; 594 } 595 break; 596 case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8): 597 switch (le16_to_cpu(req->value) >> 8) { 598 case USB_DT_HUB: 599 debug("USB_DT_HUB config\n"); 600 srcptr = &descriptor.hub; 601 srclen = 0x8; 602 break; 603 default: 604 debug("unknown value %x\n", le16_to_cpu(req->value)); 605 goto unknown; 606 } 607 break; 608 case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8): 609 debug("USB_REQ_SET_ADDRESS\n"); 610 rootdev = le16_to_cpu(req->value); 611 break; 612 case DeviceOutRequest | USB_REQ_SET_CONFIGURATION: 613 debug("USB_REQ_SET_CONFIGURATION\n"); 614 /* Nothing to do */ 615 break; 616 case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8): 617 tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */ 618 tmpbuf[1] = 0; 619 srcptr = tmpbuf; 620 srclen = 2; 621 break; 622 case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8): 623 memset(tmpbuf, 0, 4); 624 reg = ehci_readl(status_reg); 625 if (reg & EHCI_PS_CS) 626 tmpbuf[0] |= USB_PORT_STAT_CONNECTION; 627 if (reg & EHCI_PS_PE) 628 tmpbuf[0] |= USB_PORT_STAT_ENABLE; 629 if (reg & EHCI_PS_SUSP) 630 tmpbuf[0] |= USB_PORT_STAT_SUSPEND; 631 if (reg & EHCI_PS_OCA) 632 tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT; 633 if (reg & EHCI_PS_PR) 634 tmpbuf[0] |= USB_PORT_STAT_RESET; 635 if (reg & EHCI_PS_PP) 636 tmpbuf[1] |= USB_PORT_STAT_POWER >> 8; 637 638 if (ehci_is_TDI()) { 639 switch ((reg >> 26) & 3) { 640 case 0: 641 break; 642 case 1: 643 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8; 644 break; 645 case 2: 646 default: 647 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8; 648 break; 649 } 650 } else { 651 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8; 652 } 653 654 if (reg & EHCI_PS_CSC) 655 tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION; 656 if (reg & EHCI_PS_PEC) 657 tmpbuf[2] |= USB_PORT_STAT_C_ENABLE; 658 if (reg & EHCI_PS_OCC) 659 tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT; 660 if (portreset & (1 << le16_to_cpu(req->index))) 661 tmpbuf[2] |= USB_PORT_STAT_C_RESET; 662 663 srcptr = tmpbuf; 664 srclen = 4; 665 break; 666 case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8): 667 reg = ehci_readl(status_reg); 668 reg &= ~EHCI_PS_CLEAR; 669 switch (le16_to_cpu(req->value)) { 670 case USB_PORT_FEAT_ENABLE: 671 reg |= EHCI_PS_PE; 672 ehci_writel(status_reg, reg); 673 break; 674 case USB_PORT_FEAT_POWER: 675 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams))) { 676 reg |= EHCI_PS_PP; 677 ehci_writel(status_reg, reg); 678 } 679 break; 680 case USB_PORT_FEAT_RESET: 681 if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS && 682 !ehci_is_TDI() && 683 EHCI_PS_IS_LOWSPEED(reg)) { 684 /* Low speed device, give up ownership. */ 685 debug("port %d low speed --> companion\n", 686 req->index - 1); 687 reg |= EHCI_PS_PO; 688 ehci_writel(status_reg, reg); 689 break; 690 } else { 691 int ret; 692 693 reg |= EHCI_PS_PR; 694 reg &= ~EHCI_PS_PE; 695 ehci_writel(status_reg, reg); 696 /* 697 * caller must wait, then call GetPortStatus 698 * usb 2.0 specification say 50 ms resets on 699 * root 700 */ 701 wait_ms(50); 702 /* terminate the reset */ 703 ehci_writel(status_reg, reg & ~EHCI_PS_PR); 704 /* 705 * A host controller must terminate the reset 706 * and stabilize the state of the port within 707 * 2 milliseconds 708 */ 709 ret = handshake(status_reg, EHCI_PS_PR, 0, 710 2 * 1000); 711 if (!ret) 712 portreset |= 713 1 << le16_to_cpu(req->index); 714 else 715 printf("port(%d) reset error\n", 716 le16_to_cpu(req->index) - 1); 717 } 718 break; 719 default: 720 debug("unknown feature %x\n", le16_to_cpu(req->value)); 721 goto unknown; 722 } 723 /* unblock posted writes */ 724 (void) ehci_readl(&hcor->or_usbcmd); 725 break; 726 case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8): 727 reg = ehci_readl(status_reg); 728 switch (le16_to_cpu(req->value)) { 729 case USB_PORT_FEAT_ENABLE: 730 reg &= ~EHCI_PS_PE; 731 break; 732 case USB_PORT_FEAT_C_ENABLE: 733 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_PE; 734 break; 735 case USB_PORT_FEAT_POWER: 736 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams))) 737 reg = reg & ~(EHCI_PS_CLEAR | EHCI_PS_PP); 738 case USB_PORT_FEAT_C_CONNECTION: 739 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_CSC; 740 break; 741 case USB_PORT_FEAT_OVER_CURRENT: 742 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_OCC; 743 break; 744 case USB_PORT_FEAT_C_RESET: 745 portreset &= ~(1 << le16_to_cpu(req->index)); 746 break; 747 default: 748 debug("unknown feature %x\n", le16_to_cpu(req->value)); 749 goto unknown; 750 } 751 ehci_writel(status_reg, reg); 752 /* unblock posted write */ 753 (void) ehci_readl(&hcor->or_usbcmd); 754 break; 755 default: 756 debug("Unknown request\n"); 757 goto unknown; 758 } 759 760 wait_ms(1); 761 len = min3(srclen, le16_to_cpu(req->length), length); 762 if (srcptr != NULL && len > 0) 763 memcpy(buffer, srcptr, len); 764 else 765 debug("Len is 0\n"); 766 767 dev->act_len = len; 768 dev->status = 0; 769 return 0; 770 771 unknown: 772 debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n", 773 req->requesttype, req->request, le16_to_cpu(req->value), 774 le16_to_cpu(req->index), le16_to_cpu(req->length)); 775 776 dev->act_len = 0; 777 dev->status = USB_ST_STALLED; 778 return -1; 779 } 780 781 int usb_lowlevel_stop(void) 782 { 783 return ehci_hcd_stop(); 784 } 785 786 int usb_lowlevel_init(void) 787 { 788 uint32_t reg; 789 uint32_t cmd; 790 791 if (ehci_hcd_init() != 0) 792 return -1; 793 794 /* EHCI spec section 4.1 */ 795 if (ehci_reset() != 0) 796 return -1; 797 798 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET) 799 if (ehci_hcd_init() != 0) 800 return -1; 801 #endif 802 803 /* Set head of reclaim list */ 804 memset(&qh_list, 0, sizeof(qh_list)); 805 qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH); 806 qh_list.qh_endpt1 = cpu_to_hc32((1 << 15) | (USB_SPEED_HIGH << 12)); 807 qh_list.qh_curtd = cpu_to_hc32(QT_NEXT_TERMINATE); 808 qh_list.qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 809 qh_list.qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); 810 qh_list.qh_overlay.qt_token = cpu_to_hc32(0x40); 811 812 /* Set async. queue head pointer. */ 813 ehci_writel(&hcor->or_asynclistaddr, (uint32_t)&qh_list); 814 815 reg = ehci_readl(&hccr->cr_hcsparams); 816 descriptor.hub.bNbrPorts = HCS_N_PORTS(reg); 817 printf("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts); 818 /* Port Indicators */ 819 if (HCS_INDICATOR(reg)) 820 descriptor.hub.wHubCharacteristics |= 0x80; 821 /* Port Power Control */ 822 if (HCS_PPC(reg)) 823 descriptor.hub.wHubCharacteristics |= 0x01; 824 825 /* Start the host controller. */ 826 cmd = ehci_readl(&hcor->or_usbcmd); 827 /* 828 * Philips, Intel, and maybe others need CMD_RUN before the 829 * root hub will detect new devices (why?); NEC doesn't 830 */ 831 cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET); 832 cmd |= CMD_RUN; 833 ehci_writel(&hcor->or_usbcmd, cmd); 834 835 /* take control over the ports */ 836 cmd = ehci_readl(&hcor->or_configflag); 837 cmd |= FLAG_CF; 838 ehci_writel(&hcor->or_configflag, cmd); 839 /* unblock posted write */ 840 cmd = ehci_readl(&hcor->or_usbcmd); 841 wait_ms(5); 842 reg = HC_VERSION(ehci_readl(&hccr->cr_capbase)); 843 printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff); 844 845 rootdev = 0; 846 847 return 0; 848 } 849 850 int 851 submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer, 852 int length) 853 { 854 855 if (usb_pipetype(pipe) != PIPE_BULK) { 856 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe)); 857 return -1; 858 } 859 return ehci_submit_async(dev, pipe, buffer, length, NULL); 860 } 861 862 int 863 submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer, 864 int length, struct devrequest *setup) 865 { 866 867 if (usb_pipetype(pipe) != PIPE_CONTROL) { 868 debug("non-control pipe (type=%lu)", usb_pipetype(pipe)); 869 return -1; 870 } 871 872 if (usb_pipedevice(pipe) == rootdev) { 873 if (rootdev == 0) 874 dev->speed = USB_SPEED_HIGH; 875 return ehci_submit_root(dev, pipe, buffer, length, setup); 876 } 877 return ehci_submit_async(dev, pipe, buffer, length, setup); 878 } 879 880 int 881 submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer, 882 int length, int interval) 883 { 884 885 debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d", 886 dev, pipe, buffer, length, interval); 887 return -1; 888 } 889