1 /*- 2 * Copyright (c) 2007-2008, Juniper Networks, Inc. 3 * Copyright (c) 2008, Excito Elektronik i Skåne AB 4 * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it> 5 * 6 * All rights reserved. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation version 2 of 11 * the License. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 #include <common.h> 24 #include <asm/byteorder.h> 25 #include <usb.h> 26 #include <asm/io.h> 27 #include <malloc.h> 28 #include <watchdog.h> 29 #ifdef CONFIG_USB_KEYBOARD 30 #include <stdio_dev.h> 31 extern unsigned char new[]; 32 #endif 33 34 #include "ehci.h" 35 36 int rootdev; 37 struct ehci_hccr *hccr; /* R/O registers, not need for volatile */ 38 volatile struct ehci_hcor *hcor; 39 40 static uint16_t portreset; 41 static struct QH qh_list __attribute__((aligned(32))); 42 43 static struct descriptor { 44 struct usb_hub_descriptor hub; 45 struct usb_device_descriptor device; 46 struct usb_linux_config_descriptor config; 47 struct usb_linux_interface_descriptor interface; 48 struct usb_endpoint_descriptor endpoint; 49 } __attribute__ ((packed)) descriptor = { 50 { 51 0x8, /* bDescLength */ 52 0x29, /* bDescriptorType: hub descriptor */ 53 2, /* bNrPorts -- runtime modified */ 54 0, /* wHubCharacteristics */ 55 10, /* bPwrOn2PwrGood */ 56 0, /* bHubCntrCurrent */ 57 {}, /* Device removable */ 58 {} /* at most 7 ports! XXX */ 59 }, 60 { 61 0x12, /* bLength */ 62 1, /* bDescriptorType: UDESC_DEVICE */ 63 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */ 64 9, /* bDeviceClass: UDCLASS_HUB */ 65 0, /* bDeviceSubClass: UDSUBCLASS_HUB */ 66 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */ 67 64, /* bMaxPacketSize: 64 bytes */ 68 0x0000, /* idVendor */ 69 0x0000, /* idProduct */ 70 cpu_to_le16(0x0100), /* bcdDevice */ 71 1, /* iManufacturer */ 72 2, /* iProduct */ 73 0, /* iSerialNumber */ 74 1 /* bNumConfigurations: 1 */ 75 }, 76 { 77 0x9, 78 2, /* bDescriptorType: UDESC_CONFIG */ 79 cpu_to_le16(0x19), 80 1, /* bNumInterface */ 81 1, /* bConfigurationValue */ 82 0, /* iConfiguration */ 83 0x40, /* bmAttributes: UC_SELF_POWER */ 84 0 /* bMaxPower */ 85 }, 86 { 87 0x9, /* bLength */ 88 4, /* bDescriptorType: UDESC_INTERFACE */ 89 0, /* bInterfaceNumber */ 90 0, /* bAlternateSetting */ 91 1, /* bNumEndpoints */ 92 9, /* bInterfaceClass: UICLASS_HUB */ 93 0, /* bInterfaceSubClass: UISUBCLASS_HUB */ 94 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */ 95 0 /* iInterface */ 96 }, 97 { 98 0x7, /* bLength */ 99 5, /* bDescriptorType: UDESC_ENDPOINT */ 100 0x81, /* bEndpointAddress: 101 * UE_DIR_IN | EHCI_INTR_ENDPT 102 */ 103 3, /* bmAttributes: UE_INTERRUPT */ 104 8, /* wMaxPacketSize */ 105 255 /* bInterval */ 106 }, 107 }; 108 109 #if defined(CONFIG_EHCI_IS_TDI) 110 #define ehci_is_TDI() (1) 111 #else 112 #define ehci_is_TDI() (0) 113 #endif 114 115 #if defined(CONFIG_EHCI_DCACHE) 116 /* 117 * Routines to handle (flush/invalidate) the dcache for the QH and qTD 118 * structures and data buffers. This is needed on platforms using this 119 * EHCI support with dcache enabled. 120 */ 121 static void flush_invalidate(u32 addr, int size, int flush) 122 { 123 if (flush) 124 flush_dcache_range(addr, addr + size); 125 else 126 invalidate_dcache_range(addr, addr + size); 127 } 128 129 static void cache_qtd(struct qTD *qtd, int flush) 130 { 131 u32 *ptr = (u32 *)qtd->qt_buffer[0]; 132 int len = (qtd->qt_token & 0x7fff0000) >> 16; 133 134 flush_invalidate((u32)qtd, sizeof(struct qTD), flush); 135 if (ptr && len) 136 flush_invalidate((u32)ptr, len, flush); 137 } 138 139 140 static inline struct QH *qh_addr(struct QH *qh) 141 { 142 return (struct QH *)((u32)qh & 0xffffffe0); 143 } 144 145 static void cache_qh(struct QH *qh, int flush) 146 { 147 struct qTD *qtd; 148 struct qTD *next; 149 static struct qTD *first_qtd; 150 151 /* 152 * Walk the QH list and flush/invalidate all entries 153 */ 154 while (1) { 155 flush_invalidate((u32)qh_addr(qh), sizeof(struct QH), flush); 156 if ((u32)qh & QH_LINK_TYPE_QH) 157 break; 158 qh = qh_addr(qh); 159 qh = (struct QH *)qh->qh_link; 160 } 161 qh = qh_addr(qh); 162 163 /* 164 * Save first qTD pointer, needed for invalidating pass on this QH 165 */ 166 if (flush) 167 first_qtd = qtd = (struct qTD *)(*(u32 *)&qh->qh_overlay & 168 0xffffffe0); 169 else 170 qtd = first_qtd; 171 172 /* 173 * Walk the qTD list and flush/invalidate all entries 174 */ 175 while (1) { 176 if (qtd == NULL) 177 break; 178 cache_qtd(qtd, flush); 179 next = (struct qTD *)((u32)qtd->qt_next & 0xffffffe0); 180 if (next == qtd) 181 break; 182 qtd = next; 183 } 184 } 185 186 static inline void ehci_flush_dcache(struct QH *qh) 187 { 188 cache_qh(qh, 1); 189 } 190 191 static inline void ehci_invalidate_dcache(struct QH *qh) 192 { 193 cache_qh(qh, 0); 194 } 195 #else /* CONFIG_EHCI_DCACHE */ 196 /* 197 * 198 */ 199 static inline void ehci_flush_dcache(struct QH *qh) 200 { 201 } 202 203 static inline void ehci_invalidate_dcache(struct QH *qh) 204 { 205 } 206 #endif /* CONFIG_EHCI_DCACHE */ 207 208 void __ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg) 209 { 210 mdelay(50); 211 } 212 213 void ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg) 214 __attribute__((weak, alias("__ehci_powerup_fixup"))); 215 216 static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec) 217 { 218 uint32_t result; 219 do { 220 result = ehci_readl(ptr); 221 udelay(5); 222 if (result == ~(uint32_t)0) 223 return -1; 224 result &= mask; 225 if (result == done) 226 return 0; 227 usec--; 228 } while (usec > 0); 229 return -1; 230 } 231 232 static void ehci_free(void *p, size_t sz) 233 { 234 235 } 236 237 static int ehci_reset(void) 238 { 239 uint32_t cmd; 240 uint32_t tmp; 241 uint32_t *reg_ptr; 242 int ret = 0; 243 244 cmd = ehci_readl(&hcor->or_usbcmd); 245 cmd = (cmd & ~CMD_RUN) | CMD_RESET; 246 ehci_writel(&hcor->or_usbcmd, cmd); 247 ret = handshake((uint32_t *)&hcor->or_usbcmd, CMD_RESET, 0, 250 * 1000); 248 if (ret < 0) { 249 printf("EHCI fail to reset\n"); 250 goto out; 251 } 252 253 if (ehci_is_TDI()) { 254 reg_ptr = (uint32_t *)((u8 *)hcor + USBMODE); 255 tmp = ehci_readl(reg_ptr); 256 tmp |= USBMODE_CM_HC; 257 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN) 258 tmp |= USBMODE_BE; 259 #endif 260 ehci_writel(reg_ptr, tmp); 261 } 262 out: 263 return ret; 264 } 265 266 static void *ehci_alloc(size_t sz, size_t align) 267 { 268 static struct QH qh __attribute__((aligned(32))); 269 static struct qTD td[3] __attribute__((aligned (32))); 270 static int ntds; 271 void *p; 272 273 switch (sz) { 274 case sizeof(struct QH): 275 p = &qh; 276 ntds = 0; 277 break; 278 case sizeof(struct qTD): 279 if (ntds == 3) { 280 debug("out of TDs\n"); 281 return NULL; 282 } 283 p = &td[ntds]; 284 ntds++; 285 break; 286 default: 287 debug("unknown allocation size\n"); 288 return NULL; 289 } 290 291 memset(p, 0, sz); 292 return p; 293 } 294 295 static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz) 296 { 297 uint32_t addr, delta, next; 298 int idx; 299 300 addr = (uint32_t) buf; 301 idx = 0; 302 while (idx < 5) { 303 td->qt_buffer[idx] = cpu_to_hc32(addr); 304 td->qt_buffer_hi[idx] = 0; 305 next = (addr + 4096) & ~4095; 306 delta = next - addr; 307 if (delta >= sz) 308 break; 309 sz -= delta; 310 addr = next; 311 idx++; 312 } 313 314 if (idx == 5) { 315 debug("out of buffer pointers (%u bytes left)\n", sz); 316 return -1; 317 } 318 319 return 0; 320 } 321 322 static int 323 ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer, 324 int length, struct devrequest *req) 325 { 326 struct QH *qh; 327 struct qTD *td; 328 volatile struct qTD *vtd; 329 unsigned long ts; 330 uint32_t *tdp; 331 uint32_t endpt, token, usbsts; 332 uint32_t c, toggle; 333 uint32_t cmd; 334 int timeout; 335 int ret = 0; 336 337 debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe, 338 buffer, length, req); 339 if (req != NULL) 340 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n", 341 req->request, req->request, 342 req->requesttype, req->requesttype, 343 le16_to_cpu(req->value), le16_to_cpu(req->value), 344 le16_to_cpu(req->index)); 345 346 qh = ehci_alloc(sizeof(struct QH), 32); 347 if (qh == NULL) { 348 debug("unable to allocate QH\n"); 349 return -1; 350 } 351 qh->qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH); 352 c = (usb_pipespeed(pipe) != USB_SPEED_HIGH && 353 usb_pipeendpoint(pipe) == 0) ? 1 : 0; 354 endpt = (8 << 28) | 355 (c << 27) | 356 (usb_maxpacket(dev, pipe) << 16) | 357 (0 << 15) | 358 (1 << 14) | 359 (usb_pipespeed(pipe) << 12) | 360 (usb_pipeendpoint(pipe) << 8) | 361 (0 << 7) | (usb_pipedevice(pipe) << 0); 362 qh->qh_endpt1 = cpu_to_hc32(endpt); 363 endpt = (1 << 30) | 364 (dev->portnr << 23) | 365 (dev->parent->devnum << 16) | (0 << 8) | (0 << 0); 366 qh->qh_endpt2 = cpu_to_hc32(endpt); 367 qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 368 369 td = NULL; 370 tdp = &qh->qh_overlay.qt_next; 371 372 toggle = 373 usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe)); 374 375 if (req != NULL) { 376 td = ehci_alloc(sizeof(struct qTD), 32); 377 if (td == NULL) { 378 debug("unable to allocate SETUP td\n"); 379 goto fail; 380 } 381 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 382 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); 383 token = (0 << 31) | 384 (sizeof(*req) << 16) | 385 (0 << 15) | (0 << 12) | (3 << 10) | (2 << 8) | (0x80 << 0); 386 td->qt_token = cpu_to_hc32(token); 387 if (ehci_td_buffer(td, req, sizeof(*req)) != 0) { 388 debug("unable construct SETUP td\n"); 389 ehci_free(td, sizeof(*td)); 390 goto fail; 391 } 392 *tdp = cpu_to_hc32((uint32_t) td); 393 tdp = &td->qt_next; 394 toggle = 1; 395 } 396 397 if (length > 0 || req == NULL) { 398 td = ehci_alloc(sizeof(struct qTD), 32); 399 if (td == NULL) { 400 debug("unable to allocate DATA td\n"); 401 goto fail; 402 } 403 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 404 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); 405 token = (toggle << 31) | 406 (length << 16) | 407 ((req == NULL ? 1 : 0) << 15) | 408 (0 << 12) | 409 (3 << 10) | 410 ((usb_pipein(pipe) ? 1 : 0) << 8) | (0x80 << 0); 411 td->qt_token = cpu_to_hc32(token); 412 if (ehci_td_buffer(td, buffer, length) != 0) { 413 debug("unable construct DATA td\n"); 414 ehci_free(td, sizeof(*td)); 415 goto fail; 416 } 417 *tdp = cpu_to_hc32((uint32_t) td); 418 tdp = &td->qt_next; 419 } 420 421 if (req != NULL) { 422 td = ehci_alloc(sizeof(struct qTD), 32); 423 if (td == NULL) { 424 debug("unable to allocate ACK td\n"); 425 goto fail; 426 } 427 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 428 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); 429 token = (toggle << 31) | 430 (0 << 16) | 431 (1 << 15) | 432 (0 << 12) | 433 (3 << 10) | 434 ((usb_pipein(pipe) ? 0 : 1) << 8) | (0x80 << 0); 435 td->qt_token = cpu_to_hc32(token); 436 *tdp = cpu_to_hc32((uint32_t) td); 437 tdp = &td->qt_next; 438 } 439 440 qh_list.qh_link = cpu_to_hc32((uint32_t) qh | QH_LINK_TYPE_QH); 441 442 /* Flush dcache */ 443 ehci_flush_dcache(&qh_list); 444 445 usbsts = ehci_readl(&hcor->or_usbsts); 446 ehci_writel(&hcor->or_usbsts, (usbsts & 0x3f)); 447 448 /* Enable async. schedule. */ 449 cmd = ehci_readl(&hcor->or_usbcmd); 450 cmd |= CMD_ASE; 451 ehci_writel(&hcor->or_usbcmd, cmd); 452 453 ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, STD_ASS, 454 100 * 1000); 455 if (ret < 0) { 456 printf("EHCI fail timeout STD_ASS set\n"); 457 goto fail; 458 } 459 460 /* Wait for TDs to be processed. */ 461 ts = get_timer(0); 462 vtd = td; 463 timeout = USB_TIMEOUT_MS(pipe); 464 do { 465 /* Invalidate dcache */ 466 ehci_invalidate_dcache(&qh_list); 467 token = hc32_to_cpu(vtd->qt_token); 468 if (!(token & 0x80)) 469 break; 470 WATCHDOG_RESET(); 471 } while (get_timer(ts) < timeout); 472 473 /* Check that the TD processing happened */ 474 if (token & 0x80) { 475 printf("EHCI timed out on TD - token=%#x\n", token); 476 } 477 478 /* Disable async schedule. */ 479 cmd = ehci_readl(&hcor->or_usbcmd); 480 cmd &= ~CMD_ASE; 481 ehci_writel(&hcor->or_usbcmd, cmd); 482 483 ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, 0, 484 100 * 1000); 485 if (ret < 0) { 486 printf("EHCI fail timeout STD_ASS reset\n"); 487 goto fail; 488 } 489 490 qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH); 491 492 token = hc32_to_cpu(qh->qh_overlay.qt_token); 493 if (!(token & 0x80)) { 494 debug("TOKEN=%#x\n", token); 495 switch (token & 0xfc) { 496 case 0: 497 toggle = token >> 31; 498 usb_settoggle(dev, usb_pipeendpoint(pipe), 499 usb_pipeout(pipe), toggle); 500 dev->status = 0; 501 break; 502 case 0x40: 503 dev->status = USB_ST_STALLED; 504 break; 505 case 0xa0: 506 case 0x20: 507 dev->status = USB_ST_BUF_ERR; 508 break; 509 case 0x50: 510 case 0x10: 511 dev->status = USB_ST_BABBLE_DET; 512 break; 513 default: 514 dev->status = USB_ST_CRC_ERR; 515 if ((token & 0x40) == 0x40) 516 dev->status |= USB_ST_STALLED; 517 break; 518 } 519 dev->act_len = length - ((token >> 16) & 0x7fff); 520 } else { 521 dev->act_len = 0; 522 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n", 523 dev->devnum, ehci_readl(&hcor->or_usbsts), 524 ehci_readl(&hcor->or_portsc[0]), 525 ehci_readl(&hcor->or_portsc[1])); 526 } 527 528 return (dev->status != USB_ST_NOT_PROC) ? 0 : -1; 529 530 fail: 531 td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next); 532 while (td != (void *)QT_NEXT_TERMINATE) { 533 qh->qh_overlay.qt_next = td->qt_next; 534 ehci_free(td, sizeof(*td)); 535 td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next); 536 } 537 ehci_free(qh, sizeof(*qh)); 538 return -1; 539 } 540 541 static inline int min3(int a, int b, int c) 542 { 543 544 if (b < a) 545 a = b; 546 if (c < a) 547 a = c; 548 return a; 549 } 550 551 int 552 ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer, 553 int length, struct devrequest *req) 554 { 555 uint8_t tmpbuf[4]; 556 u16 typeReq; 557 void *srcptr = NULL; 558 int len, srclen; 559 uint32_t reg; 560 uint32_t *status_reg; 561 562 if (le16_to_cpu(req->index) > CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) { 563 printf("The request port(%d) is not configured\n", 564 le16_to_cpu(req->index) - 1); 565 return -1; 566 } 567 status_reg = (uint32_t *)&hcor->or_portsc[ 568 le16_to_cpu(req->index) - 1]; 569 srclen = 0; 570 571 debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n", 572 req->request, req->request, 573 req->requesttype, req->requesttype, 574 le16_to_cpu(req->value), le16_to_cpu(req->index)); 575 576 typeReq = req->request | req->requesttype << 8; 577 578 switch (typeReq) { 579 case DeviceRequest | USB_REQ_GET_DESCRIPTOR: 580 switch (le16_to_cpu(req->value) >> 8) { 581 case USB_DT_DEVICE: 582 debug("USB_DT_DEVICE request\n"); 583 srcptr = &descriptor.device; 584 srclen = 0x12; 585 break; 586 case USB_DT_CONFIG: 587 debug("USB_DT_CONFIG config\n"); 588 srcptr = &descriptor.config; 589 srclen = 0x19; 590 break; 591 case USB_DT_STRING: 592 debug("USB_DT_STRING config\n"); 593 switch (le16_to_cpu(req->value) & 0xff) { 594 case 0: /* Language */ 595 srcptr = "\4\3\1\0"; 596 srclen = 4; 597 break; 598 case 1: /* Vendor */ 599 srcptr = "\16\3u\0-\0b\0o\0o\0t\0"; 600 srclen = 14; 601 break; 602 case 2: /* Product */ 603 srcptr = "\52\3E\0H\0C\0I\0 " 604 "\0H\0o\0s\0t\0 " 605 "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0"; 606 srclen = 42; 607 break; 608 default: 609 debug("unknown value DT_STRING %x\n", 610 le16_to_cpu(req->value)); 611 goto unknown; 612 } 613 break; 614 default: 615 debug("unknown value %x\n", le16_to_cpu(req->value)); 616 goto unknown; 617 } 618 break; 619 case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8): 620 switch (le16_to_cpu(req->value) >> 8) { 621 case USB_DT_HUB: 622 debug("USB_DT_HUB config\n"); 623 srcptr = &descriptor.hub; 624 srclen = 0x8; 625 break; 626 default: 627 debug("unknown value %x\n", le16_to_cpu(req->value)); 628 goto unknown; 629 } 630 break; 631 case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8): 632 debug("USB_REQ_SET_ADDRESS\n"); 633 rootdev = le16_to_cpu(req->value); 634 break; 635 case DeviceOutRequest | USB_REQ_SET_CONFIGURATION: 636 debug("USB_REQ_SET_CONFIGURATION\n"); 637 /* Nothing to do */ 638 break; 639 case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8): 640 tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */ 641 tmpbuf[1] = 0; 642 srcptr = tmpbuf; 643 srclen = 2; 644 break; 645 case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8): 646 memset(tmpbuf, 0, 4); 647 reg = ehci_readl(status_reg); 648 if (reg & EHCI_PS_CS) 649 tmpbuf[0] |= USB_PORT_STAT_CONNECTION; 650 if (reg & EHCI_PS_PE) 651 tmpbuf[0] |= USB_PORT_STAT_ENABLE; 652 if (reg & EHCI_PS_SUSP) 653 tmpbuf[0] |= USB_PORT_STAT_SUSPEND; 654 if (reg & EHCI_PS_OCA) 655 tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT; 656 if (reg & EHCI_PS_PR) 657 tmpbuf[0] |= USB_PORT_STAT_RESET; 658 if (reg & EHCI_PS_PP) 659 tmpbuf[1] |= USB_PORT_STAT_POWER >> 8; 660 661 if (ehci_is_TDI()) { 662 switch ((reg >> 26) & 3) { 663 case 0: 664 break; 665 case 1: 666 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8; 667 break; 668 case 2: 669 default: 670 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8; 671 break; 672 } 673 } else { 674 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8; 675 } 676 677 if (reg & EHCI_PS_CSC) 678 tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION; 679 if (reg & EHCI_PS_PEC) 680 tmpbuf[2] |= USB_PORT_STAT_C_ENABLE; 681 if (reg & EHCI_PS_OCC) 682 tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT; 683 if (portreset & (1 << le16_to_cpu(req->index))) 684 tmpbuf[2] |= USB_PORT_STAT_C_RESET; 685 686 srcptr = tmpbuf; 687 srclen = 4; 688 break; 689 case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8): 690 reg = ehci_readl(status_reg); 691 reg &= ~EHCI_PS_CLEAR; 692 switch (le16_to_cpu(req->value)) { 693 case USB_PORT_FEAT_ENABLE: 694 reg |= EHCI_PS_PE; 695 ehci_writel(status_reg, reg); 696 break; 697 case USB_PORT_FEAT_POWER: 698 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams))) { 699 reg |= EHCI_PS_PP; 700 ehci_writel(status_reg, reg); 701 } 702 break; 703 case USB_PORT_FEAT_RESET: 704 if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS && 705 !ehci_is_TDI() && 706 EHCI_PS_IS_LOWSPEED(reg)) { 707 /* Low speed device, give up ownership. */ 708 debug("port %d low speed --> companion\n", 709 req->index - 1); 710 reg |= EHCI_PS_PO; 711 ehci_writel(status_reg, reg); 712 break; 713 } else { 714 int ret; 715 716 reg |= EHCI_PS_PR; 717 reg &= ~EHCI_PS_PE; 718 ehci_writel(status_reg, reg); 719 /* 720 * caller must wait, then call GetPortStatus 721 * usb 2.0 specification say 50 ms resets on 722 * root 723 */ 724 ehci_powerup_fixup(status_reg, ®); 725 726 ehci_writel(status_reg, reg & ~EHCI_PS_PR); 727 /* 728 * A host controller must terminate the reset 729 * and stabilize the state of the port within 730 * 2 milliseconds 731 */ 732 ret = handshake(status_reg, EHCI_PS_PR, 0, 733 2 * 1000); 734 if (!ret) 735 portreset |= 736 1 << le16_to_cpu(req->index); 737 else 738 printf("port(%d) reset error\n", 739 le16_to_cpu(req->index) - 1); 740 } 741 break; 742 default: 743 debug("unknown feature %x\n", le16_to_cpu(req->value)); 744 goto unknown; 745 } 746 /* unblock posted writes */ 747 (void) ehci_readl(&hcor->or_usbcmd); 748 break; 749 case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8): 750 reg = ehci_readl(status_reg); 751 switch (le16_to_cpu(req->value)) { 752 case USB_PORT_FEAT_ENABLE: 753 reg &= ~EHCI_PS_PE; 754 break; 755 case USB_PORT_FEAT_C_ENABLE: 756 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_PE; 757 break; 758 case USB_PORT_FEAT_POWER: 759 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams))) 760 reg = reg & ~(EHCI_PS_CLEAR | EHCI_PS_PP); 761 case USB_PORT_FEAT_C_CONNECTION: 762 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_CSC; 763 break; 764 case USB_PORT_FEAT_OVER_CURRENT: 765 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_OCC; 766 break; 767 case USB_PORT_FEAT_C_RESET: 768 portreset &= ~(1 << le16_to_cpu(req->index)); 769 break; 770 default: 771 debug("unknown feature %x\n", le16_to_cpu(req->value)); 772 goto unknown; 773 } 774 ehci_writel(status_reg, reg); 775 /* unblock posted write */ 776 (void) ehci_readl(&hcor->or_usbcmd); 777 break; 778 default: 779 debug("Unknown request\n"); 780 goto unknown; 781 } 782 783 wait_ms(1); 784 len = min3(srclen, le16_to_cpu(req->length), length); 785 if (srcptr != NULL && len > 0) 786 memcpy(buffer, srcptr, len); 787 else 788 debug("Len is 0\n"); 789 790 dev->act_len = len; 791 dev->status = 0; 792 return 0; 793 794 unknown: 795 debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n", 796 req->requesttype, req->request, le16_to_cpu(req->value), 797 le16_to_cpu(req->index), le16_to_cpu(req->length)); 798 799 dev->act_len = 0; 800 dev->status = USB_ST_STALLED; 801 return -1; 802 } 803 804 int usb_lowlevel_stop(void) 805 { 806 return ehci_hcd_stop(); 807 } 808 809 int usb_lowlevel_init(void) 810 { 811 uint32_t reg; 812 uint32_t cmd; 813 814 if (ehci_hcd_init() != 0) 815 return -1; 816 817 /* EHCI spec section 4.1 */ 818 if (ehci_reset() != 0) 819 return -1; 820 821 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET) 822 if (ehci_hcd_init() != 0) 823 return -1; 824 #endif 825 826 /* Set head of reclaim list */ 827 memset(&qh_list, 0, sizeof(qh_list)); 828 qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH); 829 qh_list.qh_endpt1 = cpu_to_hc32((1 << 15) | (USB_SPEED_HIGH << 12)); 830 qh_list.qh_curtd = cpu_to_hc32(QT_NEXT_TERMINATE); 831 qh_list.qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 832 qh_list.qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); 833 qh_list.qh_overlay.qt_token = cpu_to_hc32(0x40); 834 835 /* Set async. queue head pointer. */ 836 ehci_writel(&hcor->or_asynclistaddr, (uint32_t)&qh_list); 837 838 reg = ehci_readl(&hccr->cr_hcsparams); 839 descriptor.hub.bNbrPorts = HCS_N_PORTS(reg); 840 printf("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts); 841 /* Port Indicators */ 842 if (HCS_INDICATOR(reg)) 843 descriptor.hub.wHubCharacteristics |= 0x80; 844 /* Port Power Control */ 845 if (HCS_PPC(reg)) 846 descriptor.hub.wHubCharacteristics |= 0x01; 847 848 /* Start the host controller. */ 849 cmd = ehci_readl(&hcor->or_usbcmd); 850 /* 851 * Philips, Intel, and maybe others need CMD_RUN before the 852 * root hub will detect new devices (why?); NEC doesn't 853 */ 854 cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET); 855 cmd |= CMD_RUN; 856 ehci_writel(&hcor->or_usbcmd, cmd); 857 858 /* take control over the ports */ 859 cmd = ehci_readl(&hcor->or_configflag); 860 cmd |= FLAG_CF; 861 ehci_writel(&hcor->or_configflag, cmd); 862 /* unblock posted write */ 863 cmd = ehci_readl(&hcor->or_usbcmd); 864 wait_ms(5); 865 reg = HC_VERSION(ehci_readl(&hccr->cr_capbase)); 866 printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff); 867 868 rootdev = 0; 869 870 return 0; 871 } 872 873 int 874 submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer, 875 int length) 876 { 877 878 if (usb_pipetype(pipe) != PIPE_BULK) { 879 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe)); 880 return -1; 881 } 882 return ehci_submit_async(dev, pipe, buffer, length, NULL); 883 } 884 885 int 886 submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer, 887 int length, struct devrequest *setup) 888 { 889 890 if (usb_pipetype(pipe) != PIPE_CONTROL) { 891 debug("non-control pipe (type=%lu)", usb_pipetype(pipe)); 892 return -1; 893 } 894 895 if (usb_pipedevice(pipe) == rootdev) { 896 if (rootdev == 0) 897 dev->speed = USB_SPEED_HIGH; 898 return ehci_submit_root(dev, pipe, buffer, length, setup); 899 } 900 return ehci_submit_async(dev, pipe, buffer, length, setup); 901 } 902 903 int 904 submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer, 905 int length, int interval) 906 { 907 908 debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d", 909 dev, pipe, buffer, length, interval); 910 return ehci_submit_async(dev, pipe, buffer, length, NULL); 911 } 912 913 #ifdef CONFIG_SYS_USB_EVENT_POLL 914 /* 915 * This function polls for USB keyboard data. 916 */ 917 void usb_event_poll() 918 { 919 struct stdio_dev *dev; 920 struct usb_device *usb_kbd_dev; 921 struct usb_interface *iface; 922 struct usb_endpoint_descriptor *ep; 923 int pipe; 924 int maxp; 925 926 /* Get the pointer to USB Keyboard device pointer */ 927 dev = stdio_get_by_name("usbkbd"); 928 usb_kbd_dev = (struct usb_device *)dev->priv; 929 iface = &usb_kbd_dev->config.if_desc[0]; 930 ep = &iface->ep_desc[0]; 931 pipe = usb_rcvintpipe(usb_kbd_dev, ep->bEndpointAddress); 932 933 /* Submit a interrupt transfer request */ 934 maxp = usb_maxpacket(usb_kbd_dev, pipe); 935 usb_submit_int_msg(usb_kbd_dev, pipe, &new[0], 936 maxp > 8 ? 8 : maxp, ep->bInterval); 937 } 938 #endif /* CONFIG_SYS_USB_EVENT_POLL */ 939