1 /*- 2 * Copyright (c) 2007-2008, Juniper Networks, Inc. 3 * Copyright (c) 2008, Excito Elektronik i Skåne AB 4 * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it> 5 * 6 * All rights reserved. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation version 2 of 11 * the License. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 #include <common.h> 24 #include <asm/byteorder.h> 25 #include <usb.h> 26 #include <asm/io.h> 27 #include <malloc.h> 28 #include <watchdog.h> 29 30 #include "ehci.h" 31 32 int rootdev; 33 struct ehci_hccr *hccr; /* R/O registers, not need for volatile */ 34 volatile struct ehci_hcor *hcor; 35 36 static uint16_t portreset; 37 DEFINE_ALIGN_BUFFER(struct QH, qh_list, 1, USB_DMA_MINALIGN); 38 39 #define ALIGN_END_ADDR(type, ptr, size) \ 40 ((uint32_t)(ptr) + roundup((size) * sizeof(type), USB_DMA_MINALIGN)) 41 42 static struct descriptor { 43 struct usb_hub_descriptor hub; 44 struct usb_device_descriptor device; 45 struct usb_linux_config_descriptor config; 46 struct usb_linux_interface_descriptor interface; 47 struct usb_endpoint_descriptor endpoint; 48 } __attribute__ ((packed)) descriptor = { 49 { 50 0x8, /* bDescLength */ 51 0x29, /* bDescriptorType: hub descriptor */ 52 2, /* bNrPorts -- runtime modified */ 53 0, /* wHubCharacteristics */ 54 10, /* bPwrOn2PwrGood */ 55 0, /* bHubCntrCurrent */ 56 {}, /* Device removable */ 57 {} /* at most 7 ports! XXX */ 58 }, 59 { 60 0x12, /* bLength */ 61 1, /* bDescriptorType: UDESC_DEVICE */ 62 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */ 63 9, /* bDeviceClass: UDCLASS_HUB */ 64 0, /* bDeviceSubClass: UDSUBCLASS_HUB */ 65 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */ 66 64, /* bMaxPacketSize: 64 bytes */ 67 0x0000, /* idVendor */ 68 0x0000, /* idProduct */ 69 cpu_to_le16(0x0100), /* bcdDevice */ 70 1, /* iManufacturer */ 71 2, /* iProduct */ 72 0, /* iSerialNumber */ 73 1 /* bNumConfigurations: 1 */ 74 }, 75 { 76 0x9, 77 2, /* bDescriptorType: UDESC_CONFIG */ 78 cpu_to_le16(0x19), 79 1, /* bNumInterface */ 80 1, /* bConfigurationValue */ 81 0, /* iConfiguration */ 82 0x40, /* bmAttributes: UC_SELF_POWER */ 83 0 /* bMaxPower */ 84 }, 85 { 86 0x9, /* bLength */ 87 4, /* bDescriptorType: UDESC_INTERFACE */ 88 0, /* bInterfaceNumber */ 89 0, /* bAlternateSetting */ 90 1, /* bNumEndpoints */ 91 9, /* bInterfaceClass: UICLASS_HUB */ 92 0, /* bInterfaceSubClass: UISUBCLASS_HUB */ 93 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */ 94 0 /* iInterface */ 95 }, 96 { 97 0x7, /* bLength */ 98 5, /* bDescriptorType: UDESC_ENDPOINT */ 99 0x81, /* bEndpointAddress: 100 * UE_DIR_IN | EHCI_INTR_ENDPT 101 */ 102 3, /* bmAttributes: UE_INTERRUPT */ 103 8, /* wMaxPacketSize */ 104 255 /* bInterval */ 105 }, 106 }; 107 108 #if defined(CONFIG_EHCI_IS_TDI) 109 #define ehci_is_TDI() (1) 110 #else 111 #define ehci_is_TDI() (0) 112 #endif 113 114 void __ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg) 115 { 116 mdelay(50); 117 } 118 119 void ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg) 120 __attribute__((weak, alias("__ehci_powerup_fixup"))); 121 122 static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec) 123 { 124 uint32_t result; 125 do { 126 result = ehci_readl(ptr); 127 udelay(5); 128 if (result == ~(uint32_t)0) 129 return -1; 130 result &= mask; 131 if (result == done) 132 return 0; 133 usec--; 134 } while (usec > 0); 135 return -1; 136 } 137 138 static int ehci_reset(void) 139 { 140 uint32_t cmd; 141 uint32_t tmp; 142 uint32_t *reg_ptr; 143 int ret = 0; 144 145 cmd = ehci_readl(&hcor->or_usbcmd); 146 cmd = (cmd & ~CMD_RUN) | CMD_RESET; 147 ehci_writel(&hcor->or_usbcmd, cmd); 148 ret = handshake((uint32_t *)&hcor->or_usbcmd, CMD_RESET, 0, 250 * 1000); 149 if (ret < 0) { 150 printf("EHCI fail to reset\n"); 151 goto out; 152 } 153 154 if (ehci_is_TDI()) { 155 reg_ptr = (uint32_t *)((u8 *)hcor + USBMODE); 156 tmp = ehci_readl(reg_ptr); 157 tmp |= USBMODE_CM_HC; 158 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN) 159 tmp |= USBMODE_BE; 160 #endif 161 ehci_writel(reg_ptr, tmp); 162 } 163 164 #ifdef CONFIG_USB_EHCI_TXFIFO_THRESH 165 cmd = ehci_readl(&hcor->or_txfilltuning); 166 cmd &= ~TXFIFO_THRESH(0x3f); 167 cmd |= TXFIFO_THRESH(CONFIG_USB_EHCI_TXFIFO_THRESH); 168 ehci_writel(&hcor->or_txfilltuning, cmd); 169 #endif 170 out: 171 return ret; 172 } 173 174 static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz) 175 { 176 uint32_t delta, next; 177 uint32_t addr = (uint32_t)buf; 178 int idx; 179 180 if (addr != ALIGN(addr, ARCH_DMA_MINALIGN)) 181 debug("EHCI-HCD: Misaligned buffer address (%p)\n", buf); 182 183 flush_dcache_range(addr, ALIGN(addr + sz, ARCH_DMA_MINALIGN)); 184 185 idx = 0; 186 while (idx < 5) { 187 td->qt_buffer[idx] = cpu_to_hc32(addr); 188 td->qt_buffer_hi[idx] = 0; 189 next = (addr + 4096) & ~4095; 190 delta = next - addr; 191 if (delta >= sz) 192 break; 193 sz -= delta; 194 addr = next; 195 idx++; 196 } 197 198 if (idx == 5) { 199 printf("out of buffer pointers (%u bytes left)\n", sz); 200 return -1; 201 } 202 203 return 0; 204 } 205 206 static int 207 ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer, 208 int length, struct devrequest *req) 209 { 210 ALLOC_ALIGN_BUFFER(struct QH, qh, 1, USB_DMA_MINALIGN); 211 ALLOC_ALIGN_BUFFER(struct qTD, qtd, 3, USB_DMA_MINALIGN); 212 int qtd_counter = 0; 213 214 volatile struct qTD *vtd; 215 unsigned long ts; 216 uint32_t *tdp; 217 uint32_t endpt, token, usbsts; 218 uint32_t c, toggle; 219 uint32_t cmd; 220 int timeout; 221 int ret = 0; 222 223 debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe, 224 buffer, length, req); 225 if (req != NULL) 226 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n", 227 req->request, req->request, 228 req->requesttype, req->requesttype, 229 le16_to_cpu(req->value), le16_to_cpu(req->value), 230 le16_to_cpu(req->index)); 231 232 memset(qh, 0, sizeof(struct QH)); 233 memset(qtd, 0, 3 * sizeof(*qtd)); 234 235 toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe)); 236 237 /* 238 * Setup QH (3.6 in ehci-r10.pdf) 239 * 240 * qh_link ................. 03-00 H 241 * qh_endpt1 ............... 07-04 H 242 * qh_endpt2 ............... 0B-08 H 243 * - qh_curtd 244 * qh_overlay.qt_next ...... 13-10 H 245 * - qh_overlay.qt_altnext 246 */ 247 qh->qh_link = cpu_to_hc32((uint32_t)qh_list | QH_LINK_TYPE_QH); 248 c = (usb_pipespeed(pipe) != USB_SPEED_HIGH && 249 usb_pipeendpoint(pipe) == 0) ? 1 : 0; 250 endpt = (8 << 28) | 251 (c << 27) | 252 (usb_maxpacket(dev, pipe) << 16) | 253 (0 << 15) | 254 (1 << 14) | 255 (usb_pipespeed(pipe) << 12) | 256 (usb_pipeendpoint(pipe) << 8) | 257 (0 << 7) | (usb_pipedevice(pipe) << 0); 258 qh->qh_endpt1 = cpu_to_hc32(endpt); 259 endpt = (1 << 30) | 260 (dev->portnr << 23) | 261 (dev->parent->devnum << 16) | (0 << 8) | (0 << 0); 262 qh->qh_endpt2 = cpu_to_hc32(endpt); 263 qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 264 265 tdp = &qh->qh_overlay.qt_next; 266 267 if (req != NULL) { 268 /* 269 * Setup request qTD (3.5 in ehci-r10.pdf) 270 * 271 * qt_next ................ 03-00 H 272 * qt_altnext ............. 07-04 H 273 * qt_token ............... 0B-08 H 274 * 275 * [ buffer, buffer_hi ] loaded with "req". 276 */ 277 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 278 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); 279 token = (0 << 31) | 280 (sizeof(*req) << 16) | 281 (0 << 15) | (0 << 12) | (3 << 10) | (2 << 8) | (0x80 << 0); 282 qtd[qtd_counter].qt_token = cpu_to_hc32(token); 283 if (ehci_td_buffer(&qtd[qtd_counter], req, sizeof(*req)) != 0) { 284 printf("unable construct SETUP td\n"); 285 goto fail; 286 } 287 /* Update previous qTD! */ 288 *tdp = cpu_to_hc32((uint32_t)&qtd[qtd_counter]); 289 tdp = &qtd[qtd_counter++].qt_next; 290 toggle = 1; 291 } 292 293 if (length > 0 || req == NULL) { 294 /* 295 * Setup request qTD (3.5 in ehci-r10.pdf) 296 * 297 * qt_next ................ 03-00 H 298 * qt_altnext ............. 07-04 H 299 * qt_token ............... 0B-08 H 300 * 301 * [ buffer, buffer_hi ] loaded with "buffer". 302 */ 303 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 304 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); 305 token = (toggle << 31) | 306 (length << 16) | 307 ((req == NULL ? 1 : 0) << 15) | 308 (0 << 12) | 309 (3 << 10) | 310 ((usb_pipein(pipe) ? 1 : 0) << 8) | (0x80 << 0); 311 qtd[qtd_counter].qt_token = cpu_to_hc32(token); 312 if (ehci_td_buffer(&qtd[qtd_counter], buffer, length) != 0) { 313 printf("unable construct DATA td\n"); 314 goto fail; 315 } 316 /* Update previous qTD! */ 317 *tdp = cpu_to_hc32((uint32_t)&qtd[qtd_counter]); 318 tdp = &qtd[qtd_counter++].qt_next; 319 } 320 321 if (req != NULL) { 322 /* 323 * Setup request qTD (3.5 in ehci-r10.pdf) 324 * 325 * qt_next ................ 03-00 H 326 * qt_altnext ............. 07-04 H 327 * qt_token ............... 0B-08 H 328 */ 329 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 330 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); 331 token = (toggle << 31) | 332 (0 << 16) | 333 (1 << 15) | 334 (0 << 12) | 335 (3 << 10) | 336 ((usb_pipein(pipe) ? 0 : 1) << 8) | (0x80 << 0); 337 qtd[qtd_counter].qt_token = cpu_to_hc32(token); 338 /* Update previous qTD! */ 339 *tdp = cpu_to_hc32((uint32_t)&qtd[qtd_counter]); 340 tdp = &qtd[qtd_counter++].qt_next; 341 } 342 343 qh_list->qh_link = cpu_to_hc32((uint32_t)qh | QH_LINK_TYPE_QH); 344 345 /* Flush dcache */ 346 flush_dcache_range((uint32_t)qh_list, 347 ALIGN_END_ADDR(struct QH, qh_list, 1)); 348 flush_dcache_range((uint32_t)qh, ALIGN_END_ADDR(struct QH, qh, 1)); 349 flush_dcache_range((uint32_t)qtd, ALIGN_END_ADDR(struct qTD, qtd, 3)); 350 351 /* Set async. queue head pointer. */ 352 ehci_writel(&hcor->or_asynclistaddr, (uint32_t)qh_list); 353 354 usbsts = ehci_readl(&hcor->or_usbsts); 355 ehci_writel(&hcor->or_usbsts, (usbsts & 0x3f)); 356 357 /* Enable async. schedule. */ 358 cmd = ehci_readl(&hcor->or_usbcmd); 359 cmd |= CMD_ASE; 360 ehci_writel(&hcor->or_usbcmd, cmd); 361 362 ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, STD_ASS, 363 100 * 1000); 364 if (ret < 0) { 365 printf("EHCI fail timeout STD_ASS set\n"); 366 goto fail; 367 } 368 369 /* Wait for TDs to be processed. */ 370 ts = get_timer(0); 371 vtd = &qtd[qtd_counter - 1]; 372 timeout = USB_TIMEOUT_MS(pipe); 373 do { 374 /* Invalidate dcache */ 375 invalidate_dcache_range((uint32_t)qh_list, 376 ALIGN_END_ADDR(struct QH, qh_list, 1)); 377 invalidate_dcache_range((uint32_t)qh, 378 ALIGN_END_ADDR(struct QH, qh, 1)); 379 invalidate_dcache_range((uint32_t)qtd, 380 ALIGN_END_ADDR(struct qTD, qtd, 3)); 381 382 token = hc32_to_cpu(vtd->qt_token); 383 if (!(token & 0x80)) 384 break; 385 WATCHDOG_RESET(); 386 } while (get_timer(ts) < timeout); 387 388 /* 389 * Invalidate the memory area occupied by buffer 390 * Don't try to fix the buffer alignment, if it isn't properly 391 * aligned it's upper layer's fault so let invalidate_dcache_range() 392 * vow about it. But we have to fix the length as it's actual 393 * transfer length and can be unaligned. This is potentially 394 * dangerous operation, it's responsibility of the calling 395 * code to make sure enough space is reserved. 396 */ 397 invalidate_dcache_range((uint32_t)buffer, 398 ALIGN((uint32_t)buffer + length, ARCH_DMA_MINALIGN)); 399 400 /* Check that the TD processing happened */ 401 if (token & 0x80) { 402 printf("EHCI timed out on TD - token=%#x\n", token); 403 } 404 405 /* Disable async schedule. */ 406 cmd = ehci_readl(&hcor->or_usbcmd); 407 cmd &= ~CMD_ASE; 408 ehci_writel(&hcor->or_usbcmd, cmd); 409 410 ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, 0, 411 100 * 1000); 412 if (ret < 0) { 413 printf("EHCI fail timeout STD_ASS reset\n"); 414 goto fail; 415 } 416 417 token = hc32_to_cpu(qh->qh_overlay.qt_token); 418 if (!(token & 0x80)) { 419 debug("TOKEN=%#x\n", token); 420 switch (token & 0xfc) { 421 case 0: 422 toggle = token >> 31; 423 usb_settoggle(dev, usb_pipeendpoint(pipe), 424 usb_pipeout(pipe), toggle); 425 dev->status = 0; 426 break; 427 case 0x40: 428 dev->status = USB_ST_STALLED; 429 break; 430 case 0xa0: 431 case 0x20: 432 dev->status = USB_ST_BUF_ERR; 433 break; 434 case 0x50: 435 case 0x10: 436 dev->status = USB_ST_BABBLE_DET; 437 break; 438 default: 439 dev->status = USB_ST_CRC_ERR; 440 if ((token & 0x40) == 0x40) 441 dev->status |= USB_ST_STALLED; 442 break; 443 } 444 dev->act_len = length - ((token >> 16) & 0x7fff); 445 } else { 446 dev->act_len = 0; 447 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n", 448 dev->devnum, ehci_readl(&hcor->or_usbsts), 449 ehci_readl(&hcor->or_portsc[0]), 450 ehci_readl(&hcor->or_portsc[1])); 451 } 452 453 return (dev->status != USB_ST_NOT_PROC) ? 0 : -1; 454 455 fail: 456 return -1; 457 } 458 459 static inline int min3(int a, int b, int c) 460 { 461 462 if (b < a) 463 a = b; 464 if (c < a) 465 a = c; 466 return a; 467 } 468 469 int 470 ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer, 471 int length, struct devrequest *req) 472 { 473 uint8_t tmpbuf[4]; 474 u16 typeReq; 475 void *srcptr = NULL; 476 int len, srclen; 477 uint32_t reg; 478 uint32_t *status_reg; 479 480 if (le16_to_cpu(req->index) > CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) { 481 printf("The request port(%d) is not configured\n", 482 le16_to_cpu(req->index) - 1); 483 return -1; 484 } 485 status_reg = (uint32_t *)&hcor->or_portsc[ 486 le16_to_cpu(req->index) - 1]; 487 srclen = 0; 488 489 debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n", 490 req->request, req->request, 491 req->requesttype, req->requesttype, 492 le16_to_cpu(req->value), le16_to_cpu(req->index)); 493 494 typeReq = req->request | req->requesttype << 8; 495 496 switch (typeReq) { 497 case DeviceRequest | USB_REQ_GET_DESCRIPTOR: 498 switch (le16_to_cpu(req->value) >> 8) { 499 case USB_DT_DEVICE: 500 debug("USB_DT_DEVICE request\n"); 501 srcptr = &descriptor.device; 502 srclen = 0x12; 503 break; 504 case USB_DT_CONFIG: 505 debug("USB_DT_CONFIG config\n"); 506 srcptr = &descriptor.config; 507 srclen = 0x19; 508 break; 509 case USB_DT_STRING: 510 debug("USB_DT_STRING config\n"); 511 switch (le16_to_cpu(req->value) & 0xff) { 512 case 0: /* Language */ 513 srcptr = "\4\3\1\0"; 514 srclen = 4; 515 break; 516 case 1: /* Vendor */ 517 srcptr = "\16\3u\0-\0b\0o\0o\0t\0"; 518 srclen = 14; 519 break; 520 case 2: /* Product */ 521 srcptr = "\52\3E\0H\0C\0I\0 " 522 "\0H\0o\0s\0t\0 " 523 "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0"; 524 srclen = 42; 525 break; 526 default: 527 debug("unknown value DT_STRING %x\n", 528 le16_to_cpu(req->value)); 529 goto unknown; 530 } 531 break; 532 default: 533 debug("unknown value %x\n", le16_to_cpu(req->value)); 534 goto unknown; 535 } 536 break; 537 case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8): 538 switch (le16_to_cpu(req->value) >> 8) { 539 case USB_DT_HUB: 540 debug("USB_DT_HUB config\n"); 541 srcptr = &descriptor.hub; 542 srclen = 0x8; 543 break; 544 default: 545 debug("unknown value %x\n", le16_to_cpu(req->value)); 546 goto unknown; 547 } 548 break; 549 case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8): 550 debug("USB_REQ_SET_ADDRESS\n"); 551 rootdev = le16_to_cpu(req->value); 552 break; 553 case DeviceOutRequest | USB_REQ_SET_CONFIGURATION: 554 debug("USB_REQ_SET_CONFIGURATION\n"); 555 /* Nothing to do */ 556 break; 557 case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8): 558 tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */ 559 tmpbuf[1] = 0; 560 srcptr = tmpbuf; 561 srclen = 2; 562 break; 563 case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8): 564 memset(tmpbuf, 0, 4); 565 reg = ehci_readl(status_reg); 566 if (reg & EHCI_PS_CS) 567 tmpbuf[0] |= USB_PORT_STAT_CONNECTION; 568 if (reg & EHCI_PS_PE) 569 tmpbuf[0] |= USB_PORT_STAT_ENABLE; 570 if (reg & EHCI_PS_SUSP) 571 tmpbuf[0] |= USB_PORT_STAT_SUSPEND; 572 if (reg & EHCI_PS_OCA) 573 tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT; 574 if (reg & EHCI_PS_PR) 575 tmpbuf[0] |= USB_PORT_STAT_RESET; 576 if (reg & EHCI_PS_PP) 577 tmpbuf[1] |= USB_PORT_STAT_POWER >> 8; 578 579 if (ehci_is_TDI()) { 580 switch ((reg >> 26) & 3) { 581 case 0: 582 break; 583 case 1: 584 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8; 585 break; 586 case 2: 587 default: 588 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8; 589 break; 590 } 591 } else { 592 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8; 593 } 594 595 if (reg & EHCI_PS_CSC) 596 tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION; 597 if (reg & EHCI_PS_PEC) 598 tmpbuf[2] |= USB_PORT_STAT_C_ENABLE; 599 if (reg & EHCI_PS_OCC) 600 tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT; 601 if (portreset & (1 << le16_to_cpu(req->index))) 602 tmpbuf[2] |= USB_PORT_STAT_C_RESET; 603 604 srcptr = tmpbuf; 605 srclen = 4; 606 break; 607 case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8): 608 reg = ehci_readl(status_reg); 609 reg &= ~EHCI_PS_CLEAR; 610 switch (le16_to_cpu(req->value)) { 611 case USB_PORT_FEAT_ENABLE: 612 reg |= EHCI_PS_PE; 613 ehci_writel(status_reg, reg); 614 break; 615 case USB_PORT_FEAT_POWER: 616 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams))) { 617 reg |= EHCI_PS_PP; 618 ehci_writel(status_reg, reg); 619 } 620 break; 621 case USB_PORT_FEAT_RESET: 622 if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS && 623 !ehci_is_TDI() && 624 EHCI_PS_IS_LOWSPEED(reg)) { 625 /* Low speed device, give up ownership. */ 626 debug("port %d low speed --> companion\n", 627 req->index - 1); 628 reg |= EHCI_PS_PO; 629 ehci_writel(status_reg, reg); 630 break; 631 } else { 632 int ret; 633 634 reg |= EHCI_PS_PR; 635 reg &= ~EHCI_PS_PE; 636 ehci_writel(status_reg, reg); 637 /* 638 * caller must wait, then call GetPortStatus 639 * usb 2.0 specification say 50 ms resets on 640 * root 641 */ 642 ehci_powerup_fixup(status_reg, ®); 643 644 ehci_writel(status_reg, reg & ~EHCI_PS_PR); 645 /* 646 * A host controller must terminate the reset 647 * and stabilize the state of the port within 648 * 2 milliseconds 649 */ 650 ret = handshake(status_reg, EHCI_PS_PR, 0, 651 2 * 1000); 652 if (!ret) 653 portreset |= 654 1 << le16_to_cpu(req->index); 655 else 656 printf("port(%d) reset error\n", 657 le16_to_cpu(req->index) - 1); 658 } 659 break; 660 default: 661 debug("unknown feature %x\n", le16_to_cpu(req->value)); 662 goto unknown; 663 } 664 /* unblock posted writes */ 665 (void) ehci_readl(&hcor->or_usbcmd); 666 break; 667 case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8): 668 reg = ehci_readl(status_reg); 669 switch (le16_to_cpu(req->value)) { 670 case USB_PORT_FEAT_ENABLE: 671 reg &= ~EHCI_PS_PE; 672 break; 673 case USB_PORT_FEAT_C_ENABLE: 674 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_PE; 675 break; 676 case USB_PORT_FEAT_POWER: 677 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams))) 678 reg = reg & ~(EHCI_PS_CLEAR | EHCI_PS_PP); 679 case USB_PORT_FEAT_C_CONNECTION: 680 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_CSC; 681 break; 682 case USB_PORT_FEAT_OVER_CURRENT: 683 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_OCC; 684 break; 685 case USB_PORT_FEAT_C_RESET: 686 portreset &= ~(1 << le16_to_cpu(req->index)); 687 break; 688 default: 689 debug("unknown feature %x\n", le16_to_cpu(req->value)); 690 goto unknown; 691 } 692 ehci_writel(status_reg, reg); 693 /* unblock posted write */ 694 (void) ehci_readl(&hcor->or_usbcmd); 695 break; 696 default: 697 debug("Unknown request\n"); 698 goto unknown; 699 } 700 701 mdelay(1); 702 len = min3(srclen, le16_to_cpu(req->length), length); 703 if (srcptr != NULL && len > 0) 704 memcpy(buffer, srcptr, len); 705 else 706 debug("Len is 0\n"); 707 708 dev->act_len = len; 709 dev->status = 0; 710 return 0; 711 712 unknown: 713 debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n", 714 req->requesttype, req->request, le16_to_cpu(req->value), 715 le16_to_cpu(req->index), le16_to_cpu(req->length)); 716 717 dev->act_len = 0; 718 dev->status = USB_ST_STALLED; 719 return -1; 720 } 721 722 int usb_lowlevel_stop(void) 723 { 724 return ehci_hcd_stop(); 725 } 726 727 int usb_lowlevel_init(void) 728 { 729 uint32_t reg; 730 uint32_t cmd; 731 732 if (ehci_hcd_init() != 0) 733 return -1; 734 735 /* EHCI spec section 4.1 */ 736 if (ehci_reset() != 0) 737 return -1; 738 739 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET) 740 if (ehci_hcd_init() != 0) 741 return -1; 742 #endif 743 744 /* Set head of reclaim list */ 745 memset(qh_list, 0, sizeof(*qh_list)); 746 qh_list->qh_link = cpu_to_hc32((uint32_t)qh_list | QH_LINK_TYPE_QH); 747 qh_list->qh_endpt1 = cpu_to_hc32((1 << 15) | (USB_SPEED_HIGH << 12)); 748 qh_list->qh_curtd = cpu_to_hc32(QT_NEXT_TERMINATE); 749 qh_list->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 750 qh_list->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); 751 qh_list->qh_overlay.qt_token = cpu_to_hc32(0x40); 752 753 reg = ehci_readl(&hccr->cr_hcsparams); 754 descriptor.hub.bNbrPorts = HCS_N_PORTS(reg); 755 printf("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts); 756 /* Port Indicators */ 757 if (HCS_INDICATOR(reg)) 758 descriptor.hub.wHubCharacteristics |= 0x80; 759 /* Port Power Control */ 760 if (HCS_PPC(reg)) 761 descriptor.hub.wHubCharacteristics |= 0x01; 762 763 /* Start the host controller. */ 764 cmd = ehci_readl(&hcor->or_usbcmd); 765 /* 766 * Philips, Intel, and maybe others need CMD_RUN before the 767 * root hub will detect new devices (why?); NEC doesn't 768 */ 769 cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET); 770 cmd |= CMD_RUN; 771 ehci_writel(&hcor->or_usbcmd, cmd); 772 773 /* take control over the ports */ 774 cmd = ehci_readl(&hcor->or_configflag); 775 cmd |= FLAG_CF; 776 ehci_writel(&hcor->or_configflag, cmd); 777 /* unblock posted write */ 778 cmd = ehci_readl(&hcor->or_usbcmd); 779 mdelay(5); 780 reg = HC_VERSION(ehci_readl(&hccr->cr_capbase)); 781 printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff); 782 783 rootdev = 0; 784 785 return 0; 786 } 787 788 int 789 submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer, 790 int length) 791 { 792 793 if (usb_pipetype(pipe) != PIPE_BULK) { 794 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe)); 795 return -1; 796 } 797 return ehci_submit_async(dev, pipe, buffer, length, NULL); 798 } 799 800 int 801 submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer, 802 int length, struct devrequest *setup) 803 { 804 805 if (usb_pipetype(pipe) != PIPE_CONTROL) { 806 debug("non-control pipe (type=%lu)", usb_pipetype(pipe)); 807 return -1; 808 } 809 810 if (usb_pipedevice(pipe) == rootdev) { 811 if (rootdev == 0) 812 dev->speed = USB_SPEED_HIGH; 813 return ehci_submit_root(dev, pipe, buffer, length, setup); 814 } 815 return ehci_submit_async(dev, pipe, buffer, length, setup); 816 } 817 818 int 819 submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer, 820 int length, int interval) 821 { 822 823 debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d", 824 dev, pipe, buffer, length, interval); 825 return ehci_submit_async(dev, pipe, buffer, length, NULL); 826 } 827