1 /* 2 * SAMSUNG EXYNOS USB HOST EHCI Controller 3 * 4 * Copyright (C) 2012 Samsung Electronics Co.Ltd 5 * Vivek Gautam <gautam.vivek@samsung.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as 9 * published by the Free Software Foundation; either version 2 of 10 * the License, or (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 20 * MA 02110-1301 USA 21 */ 22 23 #include <common.h> 24 #include <usb.h> 25 #include <asm/arch/cpu.h> 26 #include <asm/arch/ehci.h> 27 #include <asm/arch/system.h> 28 #include <asm/arch/power.h> 29 #include "ehci.h" 30 #include "ehci-core.h" 31 32 /* Setup the EHCI host controller. */ 33 static void setup_usb_phy(struct exynos_usb_phy *usb) 34 { 35 set_usbhost_mode(USB20_PHY_CFG_HOST_LINK_EN); 36 37 set_usbhost_phy_ctrl(POWER_USB_HOST_PHY_CTRL_EN); 38 39 clrbits_le32(&usb->usbphyctrl0, 40 HOST_CTRL0_FSEL_MASK | 41 HOST_CTRL0_COMMONON_N | 42 /* HOST Phy setting */ 43 HOST_CTRL0_PHYSWRST | 44 HOST_CTRL0_PHYSWRSTALL | 45 HOST_CTRL0_SIDDQ | 46 HOST_CTRL0_FORCESUSPEND | 47 HOST_CTRL0_FORCESLEEP); 48 49 setbits_le32(&usb->usbphyctrl0, 50 /* Setting up the ref freq */ 51 (CLK_24MHZ << 16) | 52 /* HOST Phy setting */ 53 HOST_CTRL0_LINKSWRST | 54 HOST_CTRL0_UTMISWRST); 55 udelay(10); 56 clrbits_le32(&usb->usbphyctrl0, 57 HOST_CTRL0_LINKSWRST | 58 HOST_CTRL0_UTMISWRST); 59 udelay(20); 60 61 /* EHCI Ctrl setting */ 62 setbits_le32(&usb->ehcictrl, 63 EHCICTRL_ENAINCRXALIGN | 64 EHCICTRL_ENAINCR4 | 65 EHCICTRL_ENAINCR8 | 66 EHCICTRL_ENAINCR16); 67 } 68 69 /* Reset the EHCI host controller. */ 70 static void reset_usb_phy(struct exynos_usb_phy *usb) 71 { 72 /* HOST_PHY reset */ 73 setbits_le32(&usb->usbphyctrl0, 74 HOST_CTRL0_PHYSWRST | 75 HOST_CTRL0_PHYSWRSTALL | 76 HOST_CTRL0_SIDDQ | 77 HOST_CTRL0_FORCESUSPEND | 78 HOST_CTRL0_FORCESLEEP); 79 80 set_usbhost_phy_ctrl(POWER_USB_HOST_PHY_CTRL_DISABLE); 81 } 82 83 /* 84 * EHCI-initialization 85 * Create the appropriate control structures to manage 86 * a new EHCI host controller. 87 */ 88 int ehci_hcd_init(void) 89 { 90 struct exynos_usb_phy *usb; 91 92 usb = (struct exynos_usb_phy *)samsung_get_base_usb_phy(); 93 setup_usb_phy(usb); 94 95 hccr = (struct ehci_hccr *)samsung_get_base_usb_ehci(); 96 hcor = (struct ehci_hcor *)((uint32_t) hccr 97 + HC_LENGTH(ehci_readl(&hccr->cr_capbase))); 98 99 debug("Exynos5-ehci: init hccr %x and hcor %x hc_length %d\n", 100 (uint32_t)hccr, (uint32_t)hcor, 101 (uint32_t)HC_LENGTH(ehci_readl(&hccr->cr_capbase))); 102 103 return 0; 104 } 105 106 /* 107 * Destroy the appropriate control structures corresponding 108 * the EHCI host controller. 109 */ 110 int ehci_hcd_stop() 111 { 112 struct exynos_usb_phy *usb; 113 114 usb = (struct exynos_usb_phy *)samsung_get_base_usb_phy(); 115 reset_usb_phy(usb); 116 117 return 0; 118 } 119