1 /* 2 * PXA27x USB device driver for u-boot. 3 * 4 * Copyright (C) 2007 Rodolfo Giometti <giometti@linux.it> 5 * Copyright (C) 2007 Eurotech S.p.A. <info@eurotech.it> 6 * Copyright (C) 2008 Vivek Kutal <vivek.kutal@azingo.com> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 12 #include <common.h> 13 #include <config.h> 14 #include <asm/byteorder.h> 15 #include <usbdevice.h> 16 #include <asm/arch/hardware.h> 17 #include <asm/io.h> 18 #include <usb/pxa27x_udc.h> 19 20 #include "ep0.h" 21 22 /* number of endpoints on this UDC */ 23 #define UDC_MAX_ENDPOINTS 24 24 25 static struct urb *ep0_urb; 26 static struct usb_device_instance *udc_device; 27 static int ep0state = EP0_IDLE; 28 29 #ifdef USBDDBG 30 static void udc_dump_buffer(char *name, u8 *buf, int len) 31 { 32 usbdbg("%s - buf %p, len %d", name, buf, len); 33 print_buffer(0, buf, 1, len, 0); 34 } 35 #else 36 #define udc_dump_buffer(name, buf, len) /* void */ 37 #endif 38 39 static inline void udc_ack_int_UDCCR(int mask) 40 { 41 writel(readl(USIR1) | mask, USIR1); 42 } 43 44 /* 45 * If the endpoint has an active tx_urb, then the next packet of data from the 46 * URB is written to the tx FIFO. 47 * The total amount of data in the urb is given by urb->actual_length. 48 * The maximum amount of data that can be sent in any one packet is given by 49 * endpoint->tx_packetSize. 50 * The number of data bytes from this URB that have already been transmitted 51 * is given by endpoint->sent. 52 * endpoint->last is updated by this routine with the number of data bytes 53 * transmitted in this packet. 54 */ 55 static int udc_write_urb(struct usb_endpoint_instance *endpoint) 56 { 57 struct urb *urb = endpoint->tx_urb; 58 int ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK; 59 u32 *data32 = (u32 *) urb->buffer; 60 u8 *data8 = (u8 *) urb->buffer; 61 unsigned int i, n, w, b, is_short; 62 int timeout = 2000; /* 2ms */ 63 64 if (!urb || !urb->actual_length) 65 return -1; 66 67 n = MIN(urb->actual_length - endpoint->sent, endpoint->tx_packetSize); 68 if (n <= 0) 69 return -1; 70 71 usbdbg("write urb on ep %d", ep_num); 72 #if defined(USBDDBG) && defined(USBDPARANOIA) 73 usbdbg("urb: buf %p, buf_len %d, actual_len %d", 74 urb->buffer, urb->buffer_length, urb->actual_length); 75 usbdbg("endpoint: sent %d, tx_packetSize %d, last %d", 76 endpoint->sent, endpoint->tx_packetSize, endpoint->last); 77 #endif 78 79 is_short = n != endpoint->tx_packetSize; 80 w = n / 4; 81 b = n % 4; 82 usbdbg("n %d%s w %d b %d", n, is_short ? "-s" : "", w, b); 83 udc_dump_buffer("urb write", data8 + endpoint->sent, n); 84 85 /* Prepare for data send */ 86 if (ep_num) 87 writel(UDCCSR_PC ,UDCCSN(ep_num)); 88 89 for (i = 0; i < w; i++) 90 writel(data32[endpoint->sent / 4 + i], UDCDN(ep_num)); 91 92 for (i = 0; i < b; i++) 93 writeb(data8[endpoint->sent + w * 4 + i], UDCDN(ep_num)); 94 95 /* Set "Packet Complete" if less data then tx_packetSize */ 96 if (is_short) 97 writel(ep_num ? UDCCSR_SP : UDCCSR0_IPR, UDCCSN(ep_num)); 98 99 /* Wait for data sent */ 100 if (ep_num) { 101 while (!(readl(UDCCSN(ep_num)) & UDCCSR_PC)) { 102 if (timeout-- == 0) 103 return -1; 104 else 105 udelay(1); 106 } 107 } 108 109 endpoint->last = n; 110 111 if (ep_num) { 112 usbd_tx_complete(endpoint); 113 } else { 114 endpoint->sent += n; 115 endpoint->last -= n; 116 } 117 118 if (endpoint->sent >= urb->actual_length) { 119 urb->actual_length = 0; 120 endpoint->sent = 0; 121 endpoint->last = 0; 122 } 123 124 if ((endpoint->sent >= urb->actual_length) && (!ep_num)) { 125 usbdbg("ep0 IN stage done"); 126 if (is_short) 127 ep0state = EP0_IDLE; 128 else 129 ep0state = EP0_XFER_COMPLETE; 130 } 131 132 return 0; 133 } 134 135 static int udc_read_urb(struct usb_endpoint_instance *endpoint) 136 { 137 struct urb *urb = endpoint->rcv_urb; 138 int ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK; 139 u32 *data32 = (u32 *) urb->buffer; 140 unsigned int i, n; 141 142 usbdbg("read urb on ep %d", ep_num); 143 #if defined(USBDDBG) && defined(USBDPARANOIA) 144 usbdbg("urb: buf %p, buf_len %d, actual_len %d", 145 urb->buffer, urb->buffer_length, urb->actual_length); 146 usbdbg("endpoint: rcv_packetSize %d", 147 endpoint->rcv_packetSize); 148 #endif 149 150 if (readl(UDCCSN(ep_num)) & UDCCSR_BNE) 151 n = readl(UDCBCN(ep_num)) & 0x3ff; 152 else /* zlp */ 153 n = 0; 154 155 usbdbg("n %d%s", n, n != endpoint->rcv_packetSize ? "-s" : ""); 156 for (i = 0; i < n; i += 4) 157 data32[urb->actual_length / 4 + i / 4] = readl(UDCDN(ep_num)); 158 159 udc_dump_buffer("urb read", (u8 *) data32, urb->actual_length + n); 160 usbd_rcv_complete(endpoint, n, 0); 161 162 return 0; 163 } 164 165 static int udc_read_urb_ep0(void) 166 { 167 u32 *data32 = (u32 *) ep0_urb->buffer; 168 u8 *data8 = (u8 *) ep0_urb->buffer; 169 unsigned int i, n, w, b; 170 171 usbdbg("read urb on ep 0"); 172 #if defined(USBDDBG) && defined(USBDPARANOIA) 173 usbdbg("urb: buf %p, buf_len %d, actual_len %d", 174 ep0_urb->buffer, ep0_urb->buffer_length, ep0_urb->actual_length); 175 #endif 176 177 n = readl(UDCBCR0); 178 w = n / 4; 179 b = n % 4; 180 181 for (i = 0; i < w; i++) { 182 data32[ep0_urb->actual_length / 4 + i] = readl(UDCDN(0)); 183 /* ep0_urb->actual_length += 4; */ 184 } 185 186 for (i = 0; i < b; i++) { 187 data8[ep0_urb->actual_length + w * 4 + i] = readb(UDCDN(0)); 188 /* ep0_urb->actual_length++; */ 189 } 190 191 ep0_urb->actual_length += n; 192 193 udc_dump_buffer("urb read", (u8 *) data32, ep0_urb->actual_length); 194 195 writel(UDCCSR0_OPC | UDCCSR0_IPR, UDCCSR0); 196 if (ep0_urb->actual_length == ep0_urb->device_request.wLength) 197 return 1; 198 199 return 0; 200 } 201 202 static void udc_handle_ep0(struct usb_endpoint_instance *endpoint) 203 { 204 u32 udccsr0 = readl(UDCCSR0); 205 u32 *data = (u32 *) &ep0_urb->device_request; 206 int i; 207 208 usbdbg("udccsr0 %x", udccsr0); 209 210 /* Clear stall status */ 211 if (udccsr0 & UDCCSR0_SST) { 212 usberr("clear stall status"); 213 writel(UDCCSR0_SST, UDCCSR0); 214 ep0state = EP0_IDLE; 215 } 216 217 /* previous request unfinished? non-error iff back-to-back ... */ 218 if ((udccsr0 & UDCCSR0_SA) != 0 && ep0state != EP0_IDLE) 219 ep0state = EP0_IDLE; 220 221 switch (ep0state) { 222 223 case EP0_IDLE: 224 udccsr0 = readl(UDCCSR0); 225 /* Start control request? */ 226 if ((udccsr0 & (UDCCSR0_OPC | UDCCSR0_SA | UDCCSR0_RNE)) 227 == (UDCCSR0_OPC | UDCCSR0_SA | UDCCSR0_RNE)) { 228 229 /* Read SETUP packet. 230 * SETUP packet size is 8 bytes (aka 2 words) 231 */ 232 usbdbg("try reading SETUP packet"); 233 for (i = 0; i < 2; i++) { 234 if ((readl(UDCCSR0) & UDCCSR0_RNE) == 0) { 235 usberr("setup packet too short:%d", i); 236 goto stall; 237 } 238 data[i] = readl(UDCDR0); 239 } 240 241 writel(readl(UDCCSR0) | UDCCSR0_OPC | UDCCSR0_SA, UDCCSR0); 242 if ((readl(UDCCSR0) & UDCCSR0_RNE) != 0) { 243 usberr("setup packet too long"); 244 goto stall; 245 } 246 247 udc_dump_buffer("ep0 setup read", (u8 *) data, 8); 248 249 if (ep0_urb->device_request.wLength == 0) { 250 usbdbg("Zero Data control Packet\n"); 251 if (ep0_recv_setup(ep0_urb)) { 252 usberr("Invalid Setup Packet\n"); 253 udc_dump_buffer("ep0 setup read", 254 (u8 *)data, 8); 255 goto stall; 256 } 257 writel(UDCCSR0_IPR, UDCCSR0); 258 ep0state = EP0_IDLE; 259 } else { 260 /* Check direction */ 261 if ((ep0_urb->device_request.bmRequestType & 262 USB_REQ_DIRECTION_MASK) 263 == USB_REQ_HOST2DEVICE) { 264 ep0state = EP0_OUT_DATA; 265 ep0_urb->buffer = 266 (u8 *)ep0_urb->buffer_data; 267 ep0_urb->buffer_length = 268 sizeof(ep0_urb->buffer_data); 269 ep0_urb->actual_length = 0; 270 writel(UDCCSR0_IPR, UDCCSR0); 271 } else { 272 /* The ep0_recv_setup function has 273 * already placed our response packet 274 * data in ep0_urb->buffer and the 275 * packet length in 276 * ep0_urb->actual_length. 277 */ 278 if (ep0_recv_setup(ep0_urb)) { 279 stall: 280 usberr("Invalid setup packet"); 281 udc_dump_buffer("ep0 setup read" 282 , (u8 *) data, 8); 283 ep0state = EP0_IDLE; 284 285 writel(UDCCSR0_SA | 286 UDCCSR0_OPC | UDCCSR0_FST | 287 UDCCS0_FTF, UDCCSR0); 288 289 return; 290 } 291 292 endpoint->tx_urb = ep0_urb; 293 endpoint->sent = 0; 294 usbdbg("EP0_IN_DATA"); 295 ep0state = EP0_IN_DATA; 296 if (udc_write_urb(endpoint) < 0) 297 goto stall; 298 299 } 300 } 301 return; 302 } else if ((udccsr0 & (UDCCSR0_OPC | UDCCSR0_SA)) 303 == (UDCCSR0_OPC|UDCCSR0_SA)) { 304 usberr("Setup Active but no data. Stalling ....\n"); 305 goto stall; 306 } else { 307 usbdbg("random early IRQs"); 308 /* Some random early IRQs: 309 * - we acked FST 310 * - IPR cleared 311 * - OPC got set, without SA (likely status stage) 312 */ 313 writel(udccsr0 & (UDCCSR0_SA | UDCCSR0_OPC), UDCCSR0); 314 } 315 break; 316 317 case EP0_OUT_DATA: 318 319 if ((udccsr0 & UDCCSR0_OPC) && !(udccsr0 & UDCCSR0_SA)) { 320 if (udc_read_urb_ep0()) { 321 read_complete: 322 ep0state = EP0_IDLE; 323 if (ep0_recv_setup(ep0_urb)) { 324 /* Not a setup packet, stall next 325 * EP0 transaction 326 */ 327 udc_dump_buffer("ep0 setup read", 328 (u8 *) data, 8); 329 usberr("can't parse setup packet\n"); 330 goto stall; 331 } 332 } 333 } else if (!(udccsr0 & UDCCSR0_OPC) && 334 !(udccsr0 & UDCCSR0_IPR)) { 335 if (ep0_urb->device_request.wLength == 336 ep0_urb->actual_length) 337 goto read_complete; 338 339 usberr("Premature Status\n"); 340 ep0state = EP0_IDLE; 341 } 342 break; 343 344 case EP0_IN_DATA: 345 /* GET_DESCRIPTOR etc */ 346 if (udccsr0 & UDCCSR0_OPC) { 347 writel(UDCCSR0_OPC | UDCCSR0_FTF, UDCCSR0); 348 usberr("ep0in premature status"); 349 ep0state = EP0_IDLE; 350 } else { 351 /* irq was IPR clearing */ 352 if (udc_write_urb(endpoint) < 0) { 353 usberr("ep0_write_error\n"); 354 goto stall; 355 } 356 } 357 break; 358 359 case EP0_XFER_COMPLETE: 360 writel(UDCCSR0_IPR, UDCCSR0); 361 ep0state = EP0_IDLE; 362 break; 363 364 default: 365 usbdbg("Default\n"); 366 } 367 writel(USIR0_IR0, USIR0); 368 } 369 370 static void udc_handle_ep(struct usb_endpoint_instance *endpoint) 371 { 372 int ep_addr = endpoint->endpoint_address; 373 int ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK; 374 int ep_isout = (ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT; 375 376 u32 flags = readl(UDCCSN(ep_num)) & (UDCCSR_SST | UDCCSR_TRN); 377 if (flags) 378 writel(flags, UDCCSN(ep_num)); 379 380 if (ep_isout) 381 udc_read_urb(endpoint); 382 else 383 udc_write_urb(endpoint); 384 385 writel(UDCCSR_PC, UDCCSN(ep_num)); 386 } 387 388 static void udc_state_changed(void) 389 { 390 391 writel(readl(UDCCR) | UDCCR_SMAC, UDCCR); 392 393 usbdbg("New UDC settings are: conf %d - inter %d - alter %d", 394 (readl(UDCCR) & UDCCR_ACN) >> UDCCR_ACN_S, 395 (readl(UDCCR) & UDCCR_AIN) >> UDCCR_AIN_S, 396 (readl(UDCCR) & UDCCR_AAISN) >> UDCCR_AAISN_S); 397 398 usbd_device_event_irq(udc_device, DEVICE_CONFIGURED, 0); 399 writel(UDCISR1_IRCC, UDCISR1); 400 } 401 402 void udc_irq(void) 403 { 404 int handled; 405 struct usb_endpoint_instance *endpoint; 406 int ep_num, i; 407 u32 udcisr0; 408 409 do { 410 handled = 0; 411 /* Suspend Interrupt Request */ 412 if (readl(USIR1) & UDCCR_SUSIR) { 413 usbdbg("Suspend\n"); 414 udc_ack_int_UDCCR(UDCCR_SUSIR); 415 handled = 1; 416 ep0state = EP0_IDLE; 417 } 418 419 /* Resume Interrupt Request */ 420 if (readl(USIR1) & UDCCR_RESIR) { 421 udc_ack_int_UDCCR(UDCCR_RESIR); 422 handled = 1; 423 usbdbg("USB resume\n"); 424 } 425 426 if (readl(USIR1) & (1<<31)) { 427 handled = 1; 428 udc_state_changed(); 429 } 430 431 /* Reset Interrupt Request */ 432 if (readl(USIR1) & UDCCR_RSTIR) { 433 udc_ack_int_UDCCR(UDCCR_RSTIR); 434 handled = 1; 435 usbdbg("Reset\n"); 436 usbd_device_event_irq(udc_device, DEVICE_RESET, 0); 437 } else { 438 if (readl(USIR0)) 439 usbdbg("UISR0: %x \n", readl(USIR0)); 440 441 if (readl(USIR0) & 0x2) 442 writel(0x2, USIR0); 443 444 /* Control traffic */ 445 if (readl(USIR0) & USIR0_IR0) { 446 handled = 1; 447 writel(USIR0_IR0, USIR0); 448 udc_handle_ep0(udc_device->bus->endpoint_array); 449 } 450 451 endpoint = udc_device->bus->endpoint_array; 452 for (i = 0; i < udc_device->bus->max_endpoints; i++) { 453 ep_num = (endpoint[i].endpoint_address) & 454 USB_ENDPOINT_NUMBER_MASK; 455 if (!ep_num) 456 continue; 457 udcisr0 = readl(UDCISR0); 458 if (udcisr0 & 459 UDCISR_INT(ep_num, UDC_INT_PACKETCMP)) { 460 writel(UDCISR_INT(ep_num, UDC_INT_PACKETCMP), 461 UDCISR0); 462 udc_handle_ep(&endpoint[i]); 463 } 464 } 465 } 466 467 } while (handled); 468 } 469 470 /* The UDCCR reg contains mask and interrupt status bits, 471 * so using '|=' isn't safe as it may ack an interrupt. 472 */ 473 #define UDCCR_OEN (1 << 31) /* On-the-Go Enable */ 474 #define UDCCR_MASK_BITS (UDCCR_OEN | UDCCR_UDE) 475 476 static inline void udc_set_mask_UDCCR(int mask) 477 { 478 writel((readl(UDCCR) & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS), UDCCR); 479 } 480 481 static inline void udc_clear_mask_UDCCR(int mask) 482 { 483 writel((readl(UDCCR) & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS), UDCCR); 484 } 485 486 static void pio_irq_enable(int ep_num) 487 { 488 if (ep_num < 16) 489 writel(readl(UDCICR0) | 3 << (ep_num * 2), UDCICR0); 490 else { 491 ep_num -= 16; 492 writel(readl(UDCICR1) | 3 << (ep_num * 2), UDCICR1); 493 } 494 } 495 496 /* 497 * udc_set_nak 498 * 499 * Allow upper layers to signal lower layers should not accept more RX data 500 */ 501 void udc_set_nak(int ep_num) 502 { 503 /* TODO */ 504 } 505 506 /* 507 * udc_unset_nak 508 * 509 * Suspend sending of NAK tokens for DATA OUT tokens on a given endpoint. 510 * Switch off NAKing on this endpoint to accept more data output from host. 511 */ 512 void udc_unset_nak(int ep_num) 513 { 514 /* TODO */ 515 } 516 517 int udc_endpoint_write(struct usb_endpoint_instance *endpoint) 518 { 519 return udc_write_urb(endpoint); 520 } 521 522 /* Associate a physical endpoint with endpoint instance */ 523 void udc_setup_ep(struct usb_device_instance *device, unsigned int id, 524 struct usb_endpoint_instance *endpoint) 525 { 526 int ep_num, ep_addr, ep_isout, ep_type, ep_size; 527 int config, interface, alternate; 528 u32 tmp; 529 530 usbdbg("setting up endpoint id %d", id); 531 532 if (!endpoint) { 533 usberr("endpoint void!"); 534 return; 535 } 536 537 ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK; 538 if (ep_num >= UDC_MAX_ENDPOINTS) { 539 usberr("unable to setup ep %d!", ep_num); 540 return; 541 } 542 543 pio_irq_enable(ep_num); 544 if (ep_num == 0) { 545 /* Done for ep0 */ 546 return; 547 } 548 549 config = 1; 550 interface = 0; 551 alternate = 0; 552 553 usbdbg("config %d - interface %d - alternate %d", 554 config, interface, alternate); 555 556 ep_addr = endpoint->endpoint_address; 557 ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK; 558 ep_isout = (ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT; 559 ep_type = ep_isout ? endpoint->rcv_attributes : endpoint->tx_attributes; 560 ep_size = ep_isout ? endpoint->rcv_packetSize : endpoint->tx_packetSize; 561 562 usbdbg("addr %x, num %d, dir %s, type %s, packet size %d", 563 ep_addr, ep_num, 564 ep_isout ? "out" : "in", 565 ep_type == USB_ENDPOINT_XFER_ISOC ? "isoc" : 566 ep_type == USB_ENDPOINT_XFER_BULK ? "bulk" : 567 ep_type == USB_ENDPOINT_XFER_INT ? "int" : "???", 568 ep_size 569 ); 570 571 /* Configure UDCCRx */ 572 tmp = 0; 573 tmp |= (config << UDCCONR_CN_S) & UDCCONR_CN; 574 tmp |= (interface << UDCCONR_IN_S) & UDCCONR_IN; 575 tmp |= (alternate << UDCCONR_AISN_S) & UDCCONR_AISN; 576 tmp |= (ep_num << UDCCONR_EN_S) & UDCCONR_EN; 577 tmp |= (ep_type << UDCCONR_ET_S) & UDCCONR_ET; 578 tmp |= ep_isout ? 0 : UDCCONR_ED; 579 tmp |= (ep_size << UDCCONR_MPS_S) & UDCCONR_MPS; 580 tmp |= UDCCONR_EE; 581 582 writel(tmp, UDCCN(ep_num)); 583 584 usbdbg("UDCCR%c = %x", 'A' + ep_num-1, readl(UDCCN(ep_num))); 585 usbdbg("UDCCSR%c = %x", 'A' + ep_num-1, readl(UDCCSN(ep_num))); 586 } 587 588 /* Connect the USB device to the bus */ 589 void udc_connect(void) 590 { 591 usbdbg("UDC connect"); 592 593 #ifdef CONFIG_USB_DEV_PULLUP_GPIO 594 /* Turn on the USB connection by enabling the pullup resistor */ 595 writel(readl(GPDR(CONFIG_USB_DEV_PULLUP_GPIO)) 596 | GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), 597 GPDR(CONFIG_USB_DEV_PULLUP_GPIO)); 598 writel(GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), GPSR(CONFIG_USB_DEV_PULLUP_GPIO)); 599 #else 600 /* Host port 2 transceiver D+ pull up enable */ 601 writel(readl(UP2OCR) | UP2OCR_DPPUE, UP2OCR); 602 #endif 603 } 604 605 /* Disconnect the USB device to the bus */ 606 void udc_disconnect(void) 607 { 608 usbdbg("UDC disconnect"); 609 610 #ifdef CONFIG_USB_DEV_PULLUP_GPIO 611 /* Turn off the USB connection by disabling the pullup resistor */ 612 writel(GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), GPCR(CONFIG_USB_DEV_PULLUP_GPIO)); 613 #else 614 /* Host port 2 transceiver D+ pull up disable */ 615 writel(readl(UP2OCR) & ~UP2OCR_DPPUE, UP2OCR); 616 #endif 617 } 618 619 /* Switch on the UDC */ 620 void udc_enable(struct usb_device_instance *device) 621 { 622 623 ep0state = EP0_IDLE; 624 625 /* enable endpoint 0, A, B's Packet Complete Interrupt. */ 626 writel(0xffffffff, UDCICR0); 627 writel(0xa8000000, UDCICR1); 628 629 /* clear the interrupt status/control registers */ 630 writel(0xffffffff, UDCISR0); 631 writel(0xffffffff, UDCISR1); 632 633 /* set UDC-enable */ 634 udc_set_mask_UDCCR(UDCCR_UDE); 635 636 udc_device = device; 637 if (!ep0_urb) 638 ep0_urb = usbd_alloc_urb(udc_device, 639 udc_device->bus->endpoint_array); 640 else 641 usbinfo("ep0_urb %p already allocated", ep0_urb); 642 643 usbdbg("UDC Enabled\n"); 644 } 645 646 /* Need to check this again */ 647 void udc_disable(void) 648 { 649 usbdbg("disable UDC"); 650 651 udc_clear_mask_UDCCR(UDCCR_UDE); 652 653 /* Disable clock for USB device */ 654 writel(readl(CKEN) & ~CKEN11_USB, CKEN); 655 656 /* Free ep0 URB */ 657 if (ep0_urb) { 658 usbd_dealloc_urb(ep0_urb); 659 ep0_urb = NULL; 660 } 661 662 /* Reset device pointer */ 663 udc_device = NULL; 664 } 665 666 /* Allow udc code to do any additional startup */ 667 void udc_startup_events(struct usb_device_instance *device) 668 { 669 /* The DEVICE_INIT event puts the USB device in the state STATE_INIT */ 670 usbd_device_event_irq(device, DEVICE_INIT, 0); 671 672 /* The DEVICE_CREATE event puts the USB device in the state 673 * STATE_ATTACHED */ 674 usbd_device_event_irq(device, DEVICE_CREATE, 0); 675 676 /* Some USB controller driver implementations signal 677 * DEVICE_HUB_CONFIGURED and DEVICE_RESET events here. 678 * DEVICE_HUB_CONFIGURED causes a transition to the state 679 * STATE_POWERED, and DEVICE_RESET causes a transition to 680 * the state STATE_DEFAULT. 681 */ 682 udc_enable(device); 683 } 684 685 /* Initialize h/w stuff */ 686 int udc_init(void) 687 { 688 udc_device = NULL; 689 usbdbg("PXA27x usbd start"); 690 691 /* Enable clock for USB device */ 692 writel(readl(CKEN) | CKEN11_USB, CKEN); 693 694 /* Disable the UDC */ 695 udc_clear_mask_UDCCR(UDCCR_UDE); 696 697 /* Disable IRQs: we don't use them */ 698 writel(0, UDCICR0); 699 writel(0, UDCICR1); 700 701 return 0; 702 } 703