1 /* 2 * PXA27x USB device driver for u-boot. 3 * 4 * Copyright (C) 2007 Rodolfo Giometti <giometti@linux.it> 5 * Copyright (C) 2007 Eurotech S.p.A. <info@eurotech.it> 6 * Copyright (C) 2008 Vivek Kutal <vivek.kutal@azingo.com> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 12 #include <common.h> 13 #include <asm/arch/hardware.h> 14 #include <asm/byteorder.h> 15 #include <asm/io.h> 16 #include <usbdevice.h> 17 #include <usb/pxa27x_udc.h> 18 #include <usb/udc.h> 19 20 #include "ep0.h" 21 22 /* number of endpoints on this UDC */ 23 #define UDC_MAX_ENDPOINTS 24 24 25 static struct urb *ep0_urb; 26 static struct usb_device_instance *udc_device; 27 static int ep0state = EP0_IDLE; 28 29 #ifdef USBDDBG 30 static void udc_dump_buffer(char *name, u8 *buf, int len) 31 { 32 usbdbg("%s - buf %p, len %d", name, buf, len); 33 print_buffer(0, buf, 1, len, 0); 34 } 35 #else 36 #define udc_dump_buffer(name, buf, len) /* void */ 37 #endif 38 39 static inline void udc_ack_int_UDCCR(int mask) 40 { 41 writel(readl(USIR1) | mask, USIR1); 42 } 43 44 /* 45 * If the endpoint has an active tx_urb, then the next packet of data from the 46 * URB is written to the tx FIFO. 47 * The total amount of data in the urb is given by urb->actual_length. 48 * The maximum amount of data that can be sent in any one packet is given by 49 * endpoint->tx_packetSize. 50 * The number of data bytes from this URB that have already been transmitted 51 * is given by endpoint->sent. 52 * endpoint->last is updated by this routine with the number of data bytes 53 * transmitted in this packet. 54 */ 55 static int udc_write_urb(struct usb_endpoint_instance *endpoint) 56 { 57 struct urb *urb = endpoint->tx_urb; 58 int ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK; 59 u32 *data32 = (u32 *) urb->buffer; 60 u8 *data8 = (u8 *) urb->buffer; 61 unsigned int i, n, w, b, is_short; 62 int timeout = 2000; /* 2ms */ 63 64 if (!urb || !urb->actual_length) 65 return -1; 66 67 n = min_t(unsigned int, urb->actual_length - endpoint->sent, 68 endpoint->tx_packetSize); 69 if (n <= 0) 70 return -1; 71 72 usbdbg("write urb on ep %d", ep_num); 73 #if defined(USBDDBG) && defined(USBDPARANOIA) 74 usbdbg("urb: buf %p, buf_len %d, actual_len %d", 75 urb->buffer, urb->buffer_length, urb->actual_length); 76 usbdbg("endpoint: sent %d, tx_packetSize %d, last %d", 77 endpoint->sent, endpoint->tx_packetSize, endpoint->last); 78 #endif 79 80 is_short = n != endpoint->tx_packetSize; 81 w = n / 4; 82 b = n % 4; 83 usbdbg("n %d%s w %d b %d", n, is_short ? "-s" : "", w, b); 84 udc_dump_buffer("urb write", data8 + endpoint->sent, n); 85 86 /* Prepare for data send */ 87 if (ep_num) 88 writel(UDCCSR_PC ,UDCCSN(ep_num)); 89 90 for (i = 0; i < w; i++) 91 writel(data32[endpoint->sent / 4 + i], UDCDN(ep_num)); 92 93 for (i = 0; i < b; i++) 94 writeb(data8[endpoint->sent + w * 4 + i], UDCDN(ep_num)); 95 96 /* Set "Packet Complete" if less data then tx_packetSize */ 97 if (is_short) 98 writel(ep_num ? UDCCSR_SP : UDCCSR0_IPR, UDCCSN(ep_num)); 99 100 /* Wait for data sent */ 101 if (ep_num) { 102 while (!(readl(UDCCSN(ep_num)) & UDCCSR_PC)) { 103 if (timeout-- == 0) 104 return -1; 105 else 106 udelay(1); 107 } 108 } 109 110 endpoint->last = n; 111 112 if (ep_num) { 113 usbd_tx_complete(endpoint); 114 } else { 115 endpoint->sent += n; 116 endpoint->last -= n; 117 } 118 119 if (endpoint->sent >= urb->actual_length) { 120 urb->actual_length = 0; 121 endpoint->sent = 0; 122 endpoint->last = 0; 123 } 124 125 if ((endpoint->sent >= urb->actual_length) && (!ep_num)) { 126 usbdbg("ep0 IN stage done"); 127 if (is_short) 128 ep0state = EP0_IDLE; 129 else 130 ep0state = EP0_XFER_COMPLETE; 131 } 132 133 return 0; 134 } 135 136 static int udc_read_urb(struct usb_endpoint_instance *endpoint) 137 { 138 struct urb *urb = endpoint->rcv_urb; 139 int ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK; 140 u32 *data32 = (u32 *) urb->buffer; 141 unsigned int i, n; 142 143 usbdbg("read urb on ep %d", ep_num); 144 #if defined(USBDDBG) && defined(USBDPARANOIA) 145 usbdbg("urb: buf %p, buf_len %d, actual_len %d", 146 urb->buffer, urb->buffer_length, urb->actual_length); 147 usbdbg("endpoint: rcv_packetSize %d", 148 endpoint->rcv_packetSize); 149 #endif 150 151 if (readl(UDCCSN(ep_num)) & UDCCSR_BNE) 152 n = readl(UDCBCN(ep_num)) & 0x3ff; 153 else /* zlp */ 154 n = 0; 155 156 usbdbg("n %d%s", n, n != endpoint->rcv_packetSize ? "-s" : ""); 157 for (i = 0; i < n; i += 4) 158 data32[urb->actual_length / 4 + i / 4] = readl(UDCDN(ep_num)); 159 160 udc_dump_buffer("urb read", (u8 *) data32, urb->actual_length + n); 161 usbd_rcv_complete(endpoint, n, 0); 162 163 return 0; 164 } 165 166 static int udc_read_urb_ep0(void) 167 { 168 u32 *data32 = (u32 *) ep0_urb->buffer; 169 u8 *data8 = (u8 *) ep0_urb->buffer; 170 unsigned int i, n, w, b; 171 172 usbdbg("read urb on ep 0"); 173 #if defined(USBDDBG) && defined(USBDPARANOIA) 174 usbdbg("urb: buf %p, buf_len %d, actual_len %d", 175 ep0_urb->buffer, ep0_urb->buffer_length, ep0_urb->actual_length); 176 #endif 177 178 n = readl(UDCBCR0); 179 w = n / 4; 180 b = n % 4; 181 182 for (i = 0; i < w; i++) { 183 data32[ep0_urb->actual_length / 4 + i] = readl(UDCDN(0)); 184 /* ep0_urb->actual_length += 4; */ 185 } 186 187 for (i = 0; i < b; i++) { 188 data8[ep0_urb->actual_length + w * 4 + i] = readb(UDCDN(0)); 189 /* ep0_urb->actual_length++; */ 190 } 191 192 ep0_urb->actual_length += n; 193 194 udc_dump_buffer("urb read", (u8 *) data32, ep0_urb->actual_length); 195 196 writel(UDCCSR0_OPC | UDCCSR0_IPR, UDCCSR0); 197 if (ep0_urb->actual_length == ep0_urb->device_request.wLength) 198 return 1; 199 200 return 0; 201 } 202 203 static void udc_handle_ep0(struct usb_endpoint_instance *endpoint) 204 { 205 u32 udccsr0 = readl(UDCCSR0); 206 u32 *data = (u32 *) &ep0_urb->device_request; 207 int i; 208 209 usbdbg("udccsr0 %x", udccsr0); 210 211 /* Clear stall status */ 212 if (udccsr0 & UDCCSR0_SST) { 213 usberr("clear stall status"); 214 writel(UDCCSR0_SST, UDCCSR0); 215 ep0state = EP0_IDLE; 216 } 217 218 /* previous request unfinished? non-error iff back-to-back ... */ 219 if ((udccsr0 & UDCCSR0_SA) != 0 && ep0state != EP0_IDLE) 220 ep0state = EP0_IDLE; 221 222 switch (ep0state) { 223 224 case EP0_IDLE: 225 udccsr0 = readl(UDCCSR0); 226 /* Start control request? */ 227 if ((udccsr0 & (UDCCSR0_OPC | UDCCSR0_SA | UDCCSR0_RNE)) 228 == (UDCCSR0_OPC | UDCCSR0_SA | UDCCSR0_RNE)) { 229 230 /* Read SETUP packet. 231 * SETUP packet size is 8 bytes (aka 2 words) 232 */ 233 usbdbg("try reading SETUP packet"); 234 for (i = 0; i < 2; i++) { 235 if ((readl(UDCCSR0) & UDCCSR0_RNE) == 0) { 236 usberr("setup packet too short:%d", i); 237 goto stall; 238 } 239 data[i] = readl(UDCDR0); 240 } 241 242 writel(readl(UDCCSR0) | UDCCSR0_OPC | UDCCSR0_SA, UDCCSR0); 243 if ((readl(UDCCSR0) & UDCCSR0_RNE) != 0) { 244 usberr("setup packet too long"); 245 goto stall; 246 } 247 248 udc_dump_buffer("ep0 setup read", (u8 *) data, 8); 249 250 if (ep0_urb->device_request.wLength == 0) { 251 usbdbg("Zero Data control Packet\n"); 252 if (ep0_recv_setup(ep0_urb)) { 253 usberr("Invalid Setup Packet\n"); 254 udc_dump_buffer("ep0 setup read", 255 (u8 *)data, 8); 256 goto stall; 257 } 258 writel(UDCCSR0_IPR, UDCCSR0); 259 ep0state = EP0_IDLE; 260 } else { 261 /* Check direction */ 262 if ((ep0_urb->device_request.bmRequestType & 263 USB_REQ_DIRECTION_MASK) 264 == USB_REQ_HOST2DEVICE) { 265 ep0state = EP0_OUT_DATA; 266 ep0_urb->buffer = 267 (u8 *)ep0_urb->buffer_data; 268 ep0_urb->buffer_length = 269 sizeof(ep0_urb->buffer_data); 270 ep0_urb->actual_length = 0; 271 writel(UDCCSR0_IPR, UDCCSR0); 272 } else { 273 /* The ep0_recv_setup function has 274 * already placed our response packet 275 * data in ep0_urb->buffer and the 276 * packet length in 277 * ep0_urb->actual_length. 278 */ 279 if (ep0_recv_setup(ep0_urb)) { 280 stall: 281 usberr("Invalid setup packet"); 282 udc_dump_buffer("ep0 setup read" 283 , (u8 *) data, 8); 284 ep0state = EP0_IDLE; 285 286 writel(UDCCSR0_SA | 287 UDCCSR0_OPC | UDCCSR0_FST | 288 UDCCS0_FTF, UDCCSR0); 289 290 return; 291 } 292 293 endpoint->tx_urb = ep0_urb; 294 endpoint->sent = 0; 295 usbdbg("EP0_IN_DATA"); 296 ep0state = EP0_IN_DATA; 297 if (udc_write_urb(endpoint) < 0) 298 goto stall; 299 300 } 301 } 302 return; 303 } else if ((udccsr0 & (UDCCSR0_OPC | UDCCSR0_SA)) 304 == (UDCCSR0_OPC|UDCCSR0_SA)) { 305 usberr("Setup Active but no data. Stalling ....\n"); 306 goto stall; 307 } else { 308 usbdbg("random early IRQs"); 309 /* Some random early IRQs: 310 * - we acked FST 311 * - IPR cleared 312 * - OPC got set, without SA (likely status stage) 313 */ 314 writel(udccsr0 & (UDCCSR0_SA | UDCCSR0_OPC), UDCCSR0); 315 } 316 break; 317 318 case EP0_OUT_DATA: 319 320 if ((udccsr0 & UDCCSR0_OPC) && !(udccsr0 & UDCCSR0_SA)) { 321 if (udc_read_urb_ep0()) { 322 read_complete: 323 ep0state = EP0_IDLE; 324 if (ep0_recv_setup(ep0_urb)) { 325 /* Not a setup packet, stall next 326 * EP0 transaction 327 */ 328 udc_dump_buffer("ep0 setup read", 329 (u8 *) data, 8); 330 usberr("can't parse setup packet\n"); 331 goto stall; 332 } 333 } 334 } else if (!(udccsr0 & UDCCSR0_OPC) && 335 !(udccsr0 & UDCCSR0_IPR)) { 336 if (ep0_urb->device_request.wLength == 337 ep0_urb->actual_length) 338 goto read_complete; 339 340 usberr("Premature Status\n"); 341 ep0state = EP0_IDLE; 342 } 343 break; 344 345 case EP0_IN_DATA: 346 /* GET_DESCRIPTOR etc */ 347 if (udccsr0 & UDCCSR0_OPC) { 348 writel(UDCCSR0_OPC | UDCCSR0_FTF, UDCCSR0); 349 usberr("ep0in premature status"); 350 ep0state = EP0_IDLE; 351 } else { 352 /* irq was IPR clearing */ 353 if (udc_write_urb(endpoint) < 0) { 354 usberr("ep0_write_error\n"); 355 goto stall; 356 } 357 } 358 break; 359 360 case EP0_XFER_COMPLETE: 361 writel(UDCCSR0_IPR, UDCCSR0); 362 ep0state = EP0_IDLE; 363 break; 364 365 default: 366 usbdbg("Default\n"); 367 } 368 writel(USIR0_IR0, USIR0); 369 } 370 371 static void udc_handle_ep(struct usb_endpoint_instance *endpoint) 372 { 373 int ep_addr = endpoint->endpoint_address; 374 int ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK; 375 int ep_isout = (ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT; 376 377 u32 flags = readl(UDCCSN(ep_num)) & (UDCCSR_SST | UDCCSR_TRN); 378 if (flags) 379 writel(flags, UDCCSN(ep_num)); 380 381 if (ep_isout) 382 udc_read_urb(endpoint); 383 else 384 udc_write_urb(endpoint); 385 386 writel(UDCCSR_PC, UDCCSN(ep_num)); 387 } 388 389 static void udc_state_changed(void) 390 { 391 392 writel(readl(UDCCR) | UDCCR_SMAC, UDCCR); 393 394 usbdbg("New UDC settings are: conf %d - inter %d - alter %d", 395 (readl(UDCCR) & UDCCR_ACN) >> UDCCR_ACN_S, 396 (readl(UDCCR) & UDCCR_AIN) >> UDCCR_AIN_S, 397 (readl(UDCCR) & UDCCR_AAISN) >> UDCCR_AAISN_S); 398 399 usbd_device_event_irq(udc_device, DEVICE_CONFIGURED, 0); 400 writel(UDCISR1_IRCC, UDCISR1); 401 } 402 403 void udc_irq(void) 404 { 405 int handled; 406 struct usb_endpoint_instance *endpoint; 407 int ep_num, i; 408 u32 udcisr0; 409 410 do { 411 handled = 0; 412 /* Suspend Interrupt Request */ 413 if (readl(USIR1) & UDCCR_SUSIR) { 414 usbdbg("Suspend\n"); 415 udc_ack_int_UDCCR(UDCCR_SUSIR); 416 handled = 1; 417 ep0state = EP0_IDLE; 418 } 419 420 /* Resume Interrupt Request */ 421 if (readl(USIR1) & UDCCR_RESIR) { 422 udc_ack_int_UDCCR(UDCCR_RESIR); 423 handled = 1; 424 usbdbg("USB resume\n"); 425 } 426 427 if (readl(USIR1) & (1<<31)) { 428 handled = 1; 429 udc_state_changed(); 430 } 431 432 /* Reset Interrupt Request */ 433 if (readl(USIR1) & UDCCR_RSTIR) { 434 udc_ack_int_UDCCR(UDCCR_RSTIR); 435 handled = 1; 436 usbdbg("Reset\n"); 437 usbd_device_event_irq(udc_device, DEVICE_RESET, 0); 438 } else { 439 if (readl(USIR0)) 440 usbdbg("UISR0: %x \n", readl(USIR0)); 441 442 if (readl(USIR0) & 0x2) 443 writel(0x2, USIR0); 444 445 /* Control traffic */ 446 if (readl(USIR0) & USIR0_IR0) { 447 handled = 1; 448 writel(USIR0_IR0, USIR0); 449 udc_handle_ep0(udc_device->bus->endpoint_array); 450 } 451 452 endpoint = udc_device->bus->endpoint_array; 453 for (i = 0; i < udc_device->bus->max_endpoints; i++) { 454 ep_num = (endpoint[i].endpoint_address) & 455 USB_ENDPOINT_NUMBER_MASK; 456 if (!ep_num) 457 continue; 458 udcisr0 = readl(UDCISR0); 459 if (udcisr0 & 460 UDCISR_INT(ep_num, UDC_INT_PACKETCMP)) { 461 writel(UDCISR_INT(ep_num, UDC_INT_PACKETCMP), 462 UDCISR0); 463 udc_handle_ep(&endpoint[i]); 464 } 465 } 466 } 467 468 } while (handled); 469 } 470 471 /* The UDCCR reg contains mask and interrupt status bits, 472 * so using '|=' isn't safe as it may ack an interrupt. 473 */ 474 #define UDCCR_OEN (1 << 31) /* On-the-Go Enable */ 475 #define UDCCR_MASK_BITS (UDCCR_OEN | UDCCR_UDE) 476 477 static inline void udc_set_mask_UDCCR(int mask) 478 { 479 writel((readl(UDCCR) & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS), UDCCR); 480 } 481 482 static inline void udc_clear_mask_UDCCR(int mask) 483 { 484 writel((readl(UDCCR) & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS), UDCCR); 485 } 486 487 static void pio_irq_enable(int ep_num) 488 { 489 if (ep_num < 16) 490 writel(readl(UDCICR0) | 3 << (ep_num * 2), UDCICR0); 491 else { 492 ep_num -= 16; 493 writel(readl(UDCICR1) | 3 << (ep_num * 2), UDCICR1); 494 } 495 } 496 497 /* 498 * udc_set_nak 499 * 500 * Allow upper layers to signal lower layers should not accept more RX data 501 */ 502 void udc_set_nak(int ep_num) 503 { 504 /* TODO */ 505 } 506 507 /* 508 * udc_unset_nak 509 * 510 * Suspend sending of NAK tokens for DATA OUT tokens on a given endpoint. 511 * Switch off NAKing on this endpoint to accept more data output from host. 512 */ 513 void udc_unset_nak(int ep_num) 514 { 515 /* TODO */ 516 } 517 518 int udc_endpoint_write(struct usb_endpoint_instance *endpoint) 519 { 520 return udc_write_urb(endpoint); 521 } 522 523 /* Associate a physical endpoint with endpoint instance */ 524 void udc_setup_ep(struct usb_device_instance *device, unsigned int id, 525 struct usb_endpoint_instance *endpoint) 526 { 527 int ep_num, ep_addr, ep_isout, ep_type, ep_size; 528 int config, interface, alternate; 529 u32 tmp; 530 531 usbdbg("setting up endpoint id %d", id); 532 533 if (!endpoint) { 534 usberr("endpoint void!"); 535 return; 536 } 537 538 ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK; 539 if (ep_num >= UDC_MAX_ENDPOINTS) { 540 usberr("unable to setup ep %d!", ep_num); 541 return; 542 } 543 544 pio_irq_enable(ep_num); 545 if (ep_num == 0) { 546 /* Done for ep0 */ 547 return; 548 } 549 550 config = 1; 551 interface = 0; 552 alternate = 0; 553 554 usbdbg("config %d - interface %d - alternate %d", 555 config, interface, alternate); 556 557 ep_addr = endpoint->endpoint_address; 558 ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK; 559 ep_isout = (ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT; 560 ep_type = ep_isout ? endpoint->rcv_attributes : endpoint->tx_attributes; 561 ep_size = ep_isout ? endpoint->rcv_packetSize : endpoint->tx_packetSize; 562 563 usbdbg("addr %x, num %d, dir %s, type %s, packet size %d", 564 ep_addr, ep_num, 565 ep_isout ? "out" : "in", 566 ep_type == USB_ENDPOINT_XFER_ISOC ? "isoc" : 567 ep_type == USB_ENDPOINT_XFER_BULK ? "bulk" : 568 ep_type == USB_ENDPOINT_XFER_INT ? "int" : "???", 569 ep_size 570 ); 571 572 /* Configure UDCCRx */ 573 tmp = 0; 574 tmp |= (config << UDCCONR_CN_S) & UDCCONR_CN; 575 tmp |= (interface << UDCCONR_IN_S) & UDCCONR_IN; 576 tmp |= (alternate << UDCCONR_AISN_S) & UDCCONR_AISN; 577 tmp |= (ep_num << UDCCONR_EN_S) & UDCCONR_EN; 578 tmp |= (ep_type << UDCCONR_ET_S) & UDCCONR_ET; 579 tmp |= ep_isout ? 0 : UDCCONR_ED; 580 tmp |= (ep_size << UDCCONR_MPS_S) & UDCCONR_MPS; 581 tmp |= UDCCONR_EE; 582 583 writel(tmp, UDCCN(ep_num)); 584 585 usbdbg("UDCCR%c = %x", 'A' + ep_num-1, readl(UDCCN(ep_num))); 586 usbdbg("UDCCSR%c = %x", 'A' + ep_num-1, readl(UDCCSN(ep_num))); 587 } 588 589 /* Connect the USB device to the bus */ 590 void udc_connect(void) 591 { 592 usbdbg("UDC connect"); 593 594 #ifdef CONFIG_USB_DEV_PULLUP_GPIO 595 /* Turn on the USB connection by enabling the pullup resistor */ 596 writel(readl(GPDR(CONFIG_USB_DEV_PULLUP_GPIO)) 597 | GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), 598 GPDR(CONFIG_USB_DEV_PULLUP_GPIO)); 599 writel(GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), GPSR(CONFIG_USB_DEV_PULLUP_GPIO)); 600 #else 601 /* Host port 2 transceiver D+ pull up enable */ 602 writel(readl(UP2OCR) | UP2OCR_DPPUE, UP2OCR); 603 #endif 604 } 605 606 /* Disconnect the USB device to the bus */ 607 void udc_disconnect(void) 608 { 609 usbdbg("UDC disconnect"); 610 611 #ifdef CONFIG_USB_DEV_PULLUP_GPIO 612 /* Turn off the USB connection by disabling the pullup resistor */ 613 writel(GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), GPCR(CONFIG_USB_DEV_PULLUP_GPIO)); 614 #else 615 /* Host port 2 transceiver D+ pull up disable */ 616 writel(readl(UP2OCR) & ~UP2OCR_DPPUE, UP2OCR); 617 #endif 618 } 619 620 /* Switch on the UDC */ 621 void udc_enable(struct usb_device_instance *device) 622 { 623 624 ep0state = EP0_IDLE; 625 626 /* enable endpoint 0, A, B's Packet Complete Interrupt. */ 627 writel(0xffffffff, UDCICR0); 628 writel(0xa8000000, UDCICR1); 629 630 /* clear the interrupt status/control registers */ 631 writel(0xffffffff, UDCISR0); 632 writel(0xffffffff, UDCISR1); 633 634 /* set UDC-enable */ 635 udc_set_mask_UDCCR(UDCCR_UDE); 636 637 udc_device = device; 638 if (!ep0_urb) 639 ep0_urb = usbd_alloc_urb(udc_device, 640 udc_device->bus->endpoint_array); 641 else 642 usbinfo("ep0_urb %p already allocated", ep0_urb); 643 644 usbdbg("UDC Enabled\n"); 645 } 646 647 /* Need to check this again */ 648 void udc_disable(void) 649 { 650 usbdbg("disable UDC"); 651 652 udc_clear_mask_UDCCR(UDCCR_UDE); 653 654 /* Disable clock for USB device */ 655 writel(readl(CKEN) & ~CKEN11_USB, CKEN); 656 657 /* Free ep0 URB */ 658 if (ep0_urb) { 659 usbd_dealloc_urb(ep0_urb); 660 ep0_urb = NULL; 661 } 662 663 /* Reset device pointer */ 664 udc_device = NULL; 665 } 666 667 /* Allow udc code to do any additional startup */ 668 void udc_startup_events(struct usb_device_instance *device) 669 { 670 /* The DEVICE_INIT event puts the USB device in the state STATE_INIT */ 671 usbd_device_event_irq(device, DEVICE_INIT, 0); 672 673 /* The DEVICE_CREATE event puts the USB device in the state 674 * STATE_ATTACHED */ 675 usbd_device_event_irq(device, DEVICE_CREATE, 0); 676 677 /* Some USB controller driver implementations signal 678 * DEVICE_HUB_CONFIGURED and DEVICE_RESET events here. 679 * DEVICE_HUB_CONFIGURED causes a transition to the state 680 * STATE_POWERED, and DEVICE_RESET causes a transition to 681 * the state STATE_DEFAULT. 682 */ 683 udc_enable(device); 684 } 685 686 /* Initialize h/w stuff */ 687 int udc_init(void) 688 { 689 udc_device = NULL; 690 usbdbg("PXA27x usbd start"); 691 692 /* Enable clock for USB device */ 693 writel(readl(CKEN) | CKEN11_USB, CKEN); 694 695 /* Disable the UDC */ 696 udc_clear_mask_UDCCR(UDCCR_UDE); 697 698 /* Disable IRQs: we don't use them */ 699 writel(0, UDCICR0); 700 writel(0, UDCICR1); 701 702 return 0; 703 } 704