1 /*
2  * Designware DWC2 on-chip full/high speed USB device controllers
3  * Copyright (C) 2005 for Samsung Electronics
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #ifndef __DWC2_UDC_OTG_PRIV__
9 #define __DWC2_UDC_OTG_PRIV__
10 
11 #include <asm/errno.h>
12 #include <linux/sizes.h>
13 #include <linux/usb/ch9.h>
14 #include <linux/usb/gadget.h>
15 #include <linux/list.h>
16 #include <usb/lin_gadget_compat.h>
17 #include <usb/dwc2_udc.h>
18 
19 /*-------------------------------------------------------------------------*/
20 /* DMA bounce buffer size, 16K is enough even for mass storage */
21 #define DMA_BUFFER_SIZE	(16*SZ_1K)
22 
23 #define EP0_FIFO_SIZE		64
24 #define EP_FIFO_SIZE		512
25 #define EP_FIFO_SIZE2		1024
26 /* ep0-control, ep1in-bulk, ep2out-bulk, ep3in-int */
27 #define DWC2_MAX_ENDPOINTS	4
28 #define DWC2_MAX_HW_ENDPOINTS	16
29 
30 #define WAIT_FOR_SETUP          0
31 #define DATA_STATE_XMIT         1
32 #define DATA_STATE_NEED_ZLP     2
33 #define WAIT_FOR_OUT_STATUS     3
34 #define DATA_STATE_RECV         4
35 #define WAIT_FOR_COMPLETE	5
36 #define WAIT_FOR_OUT_COMPLETE	6
37 #define WAIT_FOR_IN_COMPLETE	7
38 #define WAIT_FOR_NULL_COMPLETE	8
39 
40 #define TEST_J_SEL		0x1
41 #define TEST_K_SEL		0x2
42 #define TEST_SE0_NAK_SEL	0x3
43 #define TEST_PACKET_SEL		0x4
44 #define TEST_FORCE_ENABLE_SEL	0x5
45 
46 /* ************************************************************************* */
47 /* IO
48  */
49 
50 enum ep_type {
51 	ep_control, ep_bulk_in, ep_bulk_out, ep_interrupt
52 };
53 
54 struct dwc2_ep {
55 	struct usb_ep ep;
56 	struct dwc2_udc *dev;
57 
58 	const struct usb_endpoint_descriptor *desc;
59 	struct list_head queue;
60 	unsigned long pio_irqs;
61 	int len;
62 	void *dma_buf;
63 
64 	u8 stopped;
65 	u8 bEndpointAddress;
66 	u8 bmAttributes;
67 
68 	enum ep_type ep_type;
69 	int fifo_num;
70 };
71 
72 struct dwc2_request {
73 	struct usb_request req;
74 	struct list_head queue;
75 };
76 
77 struct dwc2_udc {
78 	struct usb_gadget gadget;
79 	struct usb_gadget_driver *driver;
80 
81 	struct dwc2_plat_otg_data *pdata;
82 
83 	int ep0state;
84 	struct dwc2_ep ep[DWC2_MAX_ENDPOINTS];
85 
86 	unsigned char usb_address;
87 
88 	unsigned req_pending:1, req_std:1;
89 };
90 
91 #define ep_is_in(EP) (((EP)->bEndpointAddress&USB_DIR_IN) == USB_DIR_IN)
92 #define ep_index(EP) ((EP)->bEndpointAddress&0xF)
93 #define ep_maxpacket(EP) ((EP)->ep.maxpacket)
94 
95 void otg_phy_init(struct dwc2_udc *dev);
96 void otg_phy_off(struct dwc2_udc *dev);
97 
98 #endif	/* __DWC2_UDC_OTG_PRIV__ */
99