1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Designware DWC2 on-chip full/high speed USB device controllers
4  * Copyright (C) 2005 for Samsung Electronics
5  */
6 
7 #ifndef __DWC2_UDC_OTG_PRIV__
8 #define __DWC2_UDC_OTG_PRIV__
9 
10 #include <linux/errno.h>
11 #include <linux/sizes.h>
12 #include <linux/usb/ch9.h>
13 #include <linux/usb/gadget.h>
14 #include <linux/list.h>
15 #include <usb/lin_gadget_compat.h>
16 #include <usb/dwc2_udc.h>
17 
18 /*-------------------------------------------------------------------------*/
19 /* DMA bounce buffer size, 16K is enough even for mass storage */
20 #define DMA_BUFFER_SIZE	(16*SZ_1K)
21 
22 #define EP0_FIFO_SIZE		64
23 #define EP_FIFO_SIZE		512
24 #define EP_FIFO_SIZE2		1024
25 /* ep0-control, ep1in-bulk, ep2out-bulk, ep3in-int */
26 #define DWC2_MAX_ENDPOINTS	4
27 #define DWC2_MAX_HW_ENDPOINTS	16
28 
29 #define WAIT_FOR_SETUP          0
30 #define DATA_STATE_XMIT         1
31 #define DATA_STATE_NEED_ZLP     2
32 #define WAIT_FOR_OUT_STATUS     3
33 #define DATA_STATE_RECV         4
34 #define WAIT_FOR_COMPLETE	5
35 #define WAIT_FOR_OUT_COMPLETE	6
36 #define WAIT_FOR_IN_COMPLETE	7
37 #define WAIT_FOR_NULL_COMPLETE	8
38 
39 #define TEST_J_SEL		0x1
40 #define TEST_K_SEL		0x2
41 #define TEST_SE0_NAK_SEL	0x3
42 #define TEST_PACKET_SEL		0x4
43 #define TEST_FORCE_ENABLE_SEL	0x5
44 
45 /* ************************************************************************* */
46 /* IO
47  */
48 
49 enum ep_type {
50 	ep_control, ep_bulk_in, ep_bulk_out, ep_interrupt
51 };
52 
53 struct dwc2_ep {
54 	struct usb_ep ep;
55 	struct dwc2_udc *dev;
56 
57 	const struct usb_endpoint_descriptor *desc;
58 	struct list_head queue;
59 	unsigned long pio_irqs;
60 	int len;
61 	void *dma_buf;
62 
63 	u8 stopped;
64 	u8 bEndpointAddress;
65 	u8 bmAttributes;
66 
67 	enum ep_type ep_type;
68 	int fifo_num;
69 };
70 
71 struct dwc2_request {
72 	struct usb_request req;
73 	struct list_head queue;
74 };
75 
76 struct dwc2_udc {
77 	struct usb_gadget gadget;
78 	struct usb_gadget_driver *driver;
79 
80 	struct dwc2_plat_otg_data *pdata;
81 
82 	int ep0state;
83 	struct dwc2_ep ep[DWC2_MAX_ENDPOINTS];
84 
85 	unsigned char usb_address;
86 
87 	unsigned req_pending:1, req_std:1;
88 };
89 
90 #define ep_is_in(EP) (((EP)->bEndpointAddress&USB_DIR_IN) == USB_DIR_IN)
91 #define ep_index(EP) ((EP)->bEndpointAddress&0xF)
92 #define ep_maxpacket(EP) ((EP)->ep.maxpacket)
93 
94 void otg_phy_init(struct dwc2_udc *dev);
95 void otg_phy_off(struct dwc2_udc *dev);
96 
97 #endif	/* __DWC2_UDC_OTG_PRIV__ */
98